commit | ededcb004117eb60d9a2316ae6a8db660e7006a1 | [log] [tgz] |
---|---|---|
author | Momchil Velikov <[email protected]> | Thu Sep 21 17:07:16 2023 |
committer | Momchil Velikov <[email protected]> | Thu Sep 21 17:30:01 2023 |
tree | 8eab8df28db5a6b56a17d78971cf3ff238e8e52d | |
parent | b4301df61fc77a9d54ac236bc88742a731285f1c [diff] |
[AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC) - remove `FeatureCustomCheapAsMoveHandling`: when you have target features affecting `isAsCheapAsAMove` that can be given on command line or passed via attributes, then every sub-target effectively has custom handling - remove special handling of `FMOVD0`/etc: `FVMOV` with an immediate zero operand is never[1] more expensive tha an `FMOV` with a register operand. - remove special handling of `COPY` - copy is trivially as cheap as itself - make the function default to the `MachineInstr` attribute `isAsCheapAsAMove` - remove special handling of `ANDWrr`/etc and of `ANDWri`/etc: the fallback `MachineInstr` attribute is already non-zero. - remove special handling of `ADDWri`/`SUBWri`/`ADDXri`/`SUBXri` - there are always[1] one cycle latency with maximum (for the micro-architecture) throughput - check if `MOVi32Imm`/`MOVi64Imm` can be expanded into a "cheap" sequence of instructions There is a little twist with determining whether a MOVi32Imm`/`MOVi64Imm` is "as-cheap-as-a-move". Even if one of these pseudo-instructions needs to be expanded to more than one MOVZ, MOVN, or MOVK instructions, materialisation may be preferrable to allocating a register to hold the constant. For the moment a cutoff at two instructions seems like a reasonable compromise. [1] according to 19 software optimisation manuals Reviewed By: dmgreen Differential Revision: https://reviews.llvm.org/D154722
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