tree b21caf2aeeceaed1226eb0f2bf460d9fe81e5cdf
parent 5e007afa9d4f175decc328ee89533a5fe89be99b
author Momchil Velikov <momchil.velikov@arm.com> 1733924235 +0000
committer GitHub <noreply@github.com> 1733924235 +0000
gpgsig -----BEGIN PGP SIGNATURE-----
 
 wsFcBAABCAAQBQJnWZWLCRC1aQ7uu5UhlAAArIwQAEY77zLc9w5FvLBMsEqRBMLD
 6ni/EA6pRybBBBhJqVrCvf3sd4erJ4AnRJR9mgt0c6hd+aKftqynG2Sog8kcxl/X
 7/fLwt7d7q7odKwMf0gNSFeZ0RzIYD0Rc4WWREaQYgs9o8a6VKru9SHK+w7ebo0U
 suKzZGfSoO11njiqPKu6dkVEXkkxUM+bK7EvztmuU/u6f922y7paWqxsITjWTS6J
 nM5Zo7W23HZTEjKlcqUR2njM2o+DN4uKfjL5Kaifrk9wWL5tx0StKZh6rYUgq1OT
 Xsa/iKz1wpQfTN02xmDp6ksNnkqZnW6ctiJ5gCVepS5jpZ/kQ/CgalDqWuwka5VR
 vitG/qqaQMJhb2DMlkN56EKasq8EVKGQsiqX5M6mkPNM9QEDg5lNuz4kbR6XsqLf
 Hy93do0FHTvDg0isImZNbnjAWlzne07C2q1U12nr1HaIQ62Tui0Z1egtPQtQZDqE
 mlp+y62m8BDivpsWE0W2d7KYfN6e+YvhztKC4jOvOSxJFxvYeyNXGwFYQVJjwpeA
 jK3M40dX/Lou0vmE/Gl2rGgJDsK7MVqRF4Jdly9grHsgBzRsLzj6nPB55MoXv2Pj
 eAkW+mNAuMOSD+ZqmhG/L5GBdnL9Fzl1PLLHAPR2PQcUcYM/o+PTBQxqZ+f8bfWf
 ZhsA4LQEFuXp5l/2IgCz
 =AEsv
 -----END PGP SIGNATURE-----
 

[AArch64] Implement FP8 SVE Intrinsics for narrowing conversions (#118124)

This patch adds the following instrinsics:

* Half-precision and BFloat16 convert, narrow, and interleave to 8-bit
floating-point.

  // Variant is also available for: _bf16_x2
  svmfloat8_t svcvtn_mf8[_f16_x2]_fpm(svfloat16x2_t zn, fpm_t fpm);

* Single-precision convert, narrow, and interleave to 8-bit
floating-point (top and bottom).

svmfloat8_t svcvtnt_mf8[_f32_x2]_fpm(svmfloat8_t zd, svfloat32x2_t zn,
fpm_t fpm);
  svmfloat8_t svcvtnb_mf8[_f32_x2]_fpm(svfloat32x2_t zn, fpm_t fpm);