[BOLT] Add minimal RISC-V 64-bit support
Just enough features are implemented to process a simple "hello world"
executable and produce something that still runs (including libc calls).
This was mainly a matter of implementing support for various
relocations. Currently, the following are handled:
- R_RISCV_JAL
- R_RISCV_CALL
- R_RISCV_CALL_PLT
- R_RISCV_BRANCH
- R_RISCV_RVC_BRANCH
- R_RISCV_RVC_JUMP
- R_RISCV_GOT_HI20
- R_RISCV_PCREL_HI20
- R_RISCV_PCREL_LO12_I
- R_RISCV_RELAX
- R_RISCV_NONE
Executables linked with linker relaxation will probably fail to be
processed. BOLT relocates .text to a high address while leaving .plt at
its original (low) address. This causes PC-relative PLT calls that were
relaxed to a JAL to not fit their offset in an I-immediate anymore. This
is something that will be addressed in a later patch.
Changes to the BOLT core are relatively minor. Two things were tricky to
implement and needed slightly larger changes. I'll explain those below.
The R_RISCV_CALL(_PLT) relocation is put on the first instruction of a
AUIPC/JALR pair, the second does not get any relocation (unlike other
PCREL pairs). This causes issues with the combinations of the way BOLT
processes binaries and the RISC-V MC-layer handles relocations:
- BOLT reassembles instructions one by one and since the JALR doesn't
have a relocation, it simply gets copied without modification;
- Even though the MC-layer handles R_RISCV_CALL properly (adjusts both
the AUIPC and the JALR), it assumes the immediates of both
instructions are 0 (to be able to or-in a new value). This will most
likely not be the case for the JALR that got copied over.
To handle this difficulty without resorting to RISC-V-specific hacks in
the BOLT core, a new binary pass was added that searches for
AUIPC/JALR pairs and zeroes-out the immediate of the JALR.
A second difficulty was supporting ABS symbols. As far as I can tell,
ABS symbols were not handled at all, causing __global_pointer$ to break.
RewriteInstance::analyzeRelocation was updated to handle these
generically.
Tests are provided for all supported relocations. Note that in order to
test the correct handling of PLT entries, an ELF file produced by GCC
had to be used. While I tried to strip the YAML representation, it's
still quite large. Any suggestions on how to improve this would be
appreciated.
Reviewed By: rafauler
Differential Revision: https://reviews.llvm.org/D145687
diff --git a/bolt/test/RISCV/Inputs/plt-gnu-ld.yaml b/bolt/test/RISCV/Inputs/plt-gnu-ld.yaml
new file mode 100644
index 0000000..c03f308
--- /dev/null
+++ b/bolt/test/RISCV/Inputs/plt-gnu-ld.yaml
@@ -0,0 +1,830 @@
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diff --git a/bolt/test/RISCV/lit.local.cfg b/bolt/test/RISCV/lit.local.cfg
new file mode 100644
index 0000000..a1ebbfc
--- /dev/null
+++ b/bolt/test/RISCV/lit.local.cfg
@@ -0,0 +1,7 @@
+if 'RISCV' not in config.root.targets:
+ config.unsupported = True
+
+flags = '--target=riscv64 -nostdlib -ffreestanding -Wl,--no-relax,--emit-relocs'
+
+config.substitutions.insert(0, ('%cflags', f'%cflags {flags}'))
+config.substitutions.insert(0, ('%cxxflags', f'%cxxflags {flags}'))
diff --git a/bolt/test/RISCV/plt-gnu-ld.test b/bolt/test/RISCV/plt-gnu-ld.test
new file mode 100644
index 0000000..f87f51d
--- /dev/null
+++ b/bolt/test/RISCV/plt-gnu-ld.test
@@ -0,0 +1,9 @@
+// This test checks that the PLT symbols are properly recognized
+// by the BOLT tool.
+
+// RUN: yaml2obj %p/Inputs/plt-gnu-ld.yaml &> %t.exe
+// RUN: llvm-bolt %t.exe -o %t.bolt.exe --print-cfg --print-only=main \
+// RUN: | FileCheck %s
+
+// CHECK: Binary Function "main" after building cfg {
+// CHECK: auipc ra, puts@PLT
diff --git a/bolt/test/RISCV/reloc-abs.s b/bolt/test/RISCV/reloc-abs.s
new file mode 100644
index 0000000..3e4b8b1
--- /dev/null
+++ b/bolt/test/RISCV/reloc-abs.s
@@ -0,0 +1,26 @@
+// RUN: %clang %cflags -Wl,--defsym='__global_pointer$'=0x2800 -o %t %s
+// RUN: llvm-bolt --print-cfg --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .data
+ .globl d
+ .p2align 3
+d:
+ .dword 0
+
+ .text
+ .globl _start
+ .p2align 1
+// CHECK: Binary Function "_start" after building cfg {
+_start:
+ nop
+ .option push
+ .option norelax
+1:
+// CHECK: .Ltmp0
+// CHECK: auipc gp, %pcrel_hi(__global_pointer$)
+// CHECK-NEXT: addi gp, gp, %pcrel_lo(.Ltmp0)
+ auipc gp, %pcrel_hi(__global_pointer$)
+ addi gp, gp, %pcrel_lo(1b)
+ .option pop
+ .size _start, .-_start
diff --git a/bolt/test/RISCV/reloc-branch.s b/bolt/test/RISCV/reloc-branch.s
new file mode 100644
index 0000000..4399114
--- /dev/null
+++ b/bolt/test/RISCV/reloc-branch.s
@@ -0,0 +1,16 @@
+// RUN: %clang %cflags -o %t %s
+// RUN: llvm-bolt --print-cfg --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .text
+ .globl _start
+ .p2align 1
+// CHECK: Binary Function "_start" after building cfg {
+_start:
+// CHECK: beq zero, zero, .Ltmp0
+ beq zero, zero, 1f
+ nop
+// CHECK: .Ltmp0
+1:
+ ret
+ .size _start, .-_start
diff --git a/bolt/test/RISCV/reloc-call.s b/bolt/test/RISCV/reloc-call.s
new file mode 100644
index 0000000..17b952b
--- /dev/null
+++ b/bolt/test/RISCV/reloc-call.s
@@ -0,0 +1,21 @@
+// RUN: %clang %cflags -o %t %s
+// RUN: llvm-bolt --print-fix-riscv-calls --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .text
+
+ .global f
+ .p2align 1
+f:
+ ret
+ .size f, .-f
+
+// CHECK: Binary Function "_start" after fix-riscv-calls {
+ .globl _start
+ .p2align 1
+_start:
+// CHECK: auipc ra, f
+// CHECK-NEXT: jalr ra
+ call f
+ ret
+ .size _start, .-_start
diff --git a/bolt/test/RISCV/reloc-got.s b/bolt/test/RISCV/reloc-got.s
new file mode 100644
index 0000000..b6cd61b
--- /dev/null
+++ b/bolt/test/RISCV/reloc-got.s
@@ -0,0 +1,24 @@
+// RUN: %clang %cflags -o %t %s
+// RUN: llvm-bolt --print-cfg --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .data
+ .globl d
+ .p2align 3
+d:
+ .dword 0
+
+ .text
+ .globl _start
+ .p2align 1
+// CHECK: Binary Function "_start" after building cfg {
+_start:
+ nop // Here to not make the _start and .Ltmp0 symbols coincide
+// CHECK: .Ltmp0
+// CHECK: auipc t0, %pcrel_hi(__BOLT_got_zero+{{[0-9]+}})
+// CHECK-NEXT: ld t0, %pcrel_lo(.Ltmp0)(t0)
+1:
+ auipc t0, %got_pcrel_hi(d)
+ ld t0, %pcrel_lo(1b)(t0)
+ ret
+ .size _start, .-_start
diff --git a/bolt/test/RISCV/reloc-jal.s b/bolt/test/RISCV/reloc-jal.s
new file mode 100644
index 0000000..427e8f2
--- /dev/null
+++ b/bolt/test/RISCV/reloc-jal.s
@@ -0,0 +1,20 @@
+// RUN: %clang %cflags -o %t %s
+// RUN: llvm-bolt --print-cfg --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .text
+
+ .global f
+ .p2align 1
+f:
+ ret
+ .size f, .-f
+
+// CHECK: Binary Function "_start" after building cfg {
+ .globl _start
+ .p2align 1
+_start:
+// CHECK: jal ra, f
+ jal ra, f
+ ret
+ .size _start, .-_start
diff --git a/bolt/test/RISCV/reloc-pcrel.s b/bolt/test/RISCV/reloc-pcrel.s
new file mode 100644
index 0000000..2d5a349
--- /dev/null
+++ b/bolt/test/RISCV/reloc-pcrel.s
@@ -0,0 +1,22 @@
+// RUN: %clang %cflags -o %t %s
+// RUN: llvm-bolt --print-cfg --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .data
+ .globl d
+ .p2align 3
+d:
+ .dword 0
+
+ .text
+ .globl _start
+ .p2align 1
+// CHECK: Binary Function "_start" after building cfg {
+_start:
+ nop // Here to not make the _start and .Ltmp0 symbols coincide
+// CHECK: .Ltmp0
+// CHECK: auipc t0, %pcrel_hi(d)
+// CHECK-NEXT: ld t0, %pcrel_lo(.Ltmp0)(t0)
+ ld t0, d
+ ret
+ .size _start, .-_start
diff --git a/bolt/test/RISCV/reloc-rvc-branch.s b/bolt/test/RISCV/reloc-rvc-branch.s
new file mode 100644
index 0000000..34221c1
--- /dev/null
+++ b/bolt/test/RISCV/reloc-rvc-branch.s
@@ -0,0 +1,16 @@
+// RUN: %clang %cflags -o %t %s
+// RUN: llvm-bolt --print-cfg --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .text
+ .globl _start
+ .p2align 1
+// CHECK: Binary Function "_start" after building cfg {
+_start:
+// CHECK: beqz a0, .Ltmp0
+ c.beqz a0, 1f
+ nop
+// CHECK: .Ltmp0
+1:
+ ret
+ .size _start, .-_start
diff --git a/bolt/test/RISCV/reloc-rvc-jump.s b/bolt/test/RISCV/reloc-rvc-jump.s
new file mode 100644
index 0000000..21b10ba
--- /dev/null
+++ b/bolt/test/RISCV/reloc-rvc-jump.s
@@ -0,0 +1,16 @@
+// RUN: %clang %cflags -o %t %s
+// RUN: llvm-bolt --print-cfg --print-only=_start -o /dev/null %t \
+// RUN: | FileCheck %s
+
+ .text
+ .globl _start
+ .p2align 1
+// CHECK: Binary Function "_start" after building cfg {
+_start:
+// CHECK: j .Ltmp0
+ c.j 1f
+ nop
+// CHECK: .Ltmp0
+1:
+ ret
+ .size _start, .-_start
