Skip to content

Commit 2ec0883

Browse files
committed
Revert "[MIPS] Add FeatureMSA to i6400 and i6500 cores (#134985)"
This reverts commit 55a88cd. Breaks Sanitizer bot: https://lab.llvm.org/buildbot/#/builders/94/builds/6923
1 parent 9c4c242 commit 2ec0883

File tree

4 files changed

+2
-19
lines changed

4 files changed

+2
-19
lines changed

clang/lib/Driver/ToolChains/Arch/Mips.cpp

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -255,12 +255,6 @@ void mips::getMIPSTargetFeatures(const Driver &D, const llvm::Triple &Triple,
255255
D.Diag(diag::err_drv_unsupported_noabicalls_pic);
256256
}
257257

258-
if (CPUName == "i6500" || CPUName == "i6400") {
259-
// MIPS cpu i6400 and i6500 support MSA (Mips SIMD Architecture)
260-
// by default.
261-
Features.push_back("+msa");
262-
}
263-
264258
if (!UseAbiCalls)
265259
Features.push_back("+noabicalls");
266260
else

clang/test/Driver/mips-cpus.c

Lines changed: 0 additions & 9 deletions
This file was deleted.

llvm/lib/Target/Mips/Mips.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -243,11 +243,11 @@ def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl",
243243
// same CPU architecture.
244244
def ImplI6400
245245
: SubtargetFeature<"i6400", "ProcImpl", "MipsSubtarget::CPU::I6400",
246-
"MIPS I6400 Processor", [FeatureMips64r6, FeatureMSA]>;
246+
"MIPS I6400 Processor", [FeatureMips64r6]>;
247247

248248
def ImplI6500
249249
: SubtargetFeature<"i6500", "ProcImpl", "MipsSubtarget::CPU::I6500",
250-
"MIPS I6500 Processor", [FeatureMips64r6, FeatureMSA]>;
250+
"MIPS I6500 Processor", [FeatureMips64r6]>;
251251

252252
class Proc<string Name, list<SubtargetFeature> Features>
253253
: ProcessorModel<Name, MipsGenericModel, Features>;

llvm/test/CodeGen/Mips/msa/arithmetic.ll

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc -mtriple=mips -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s --check-prefixes=ALL,MIPS
33
; RUN: llc -mtriple=mipsel -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s --check-prefixes=ALL,MIPSEL
4-
; RUN: llc -mtriple=mips64 -mcpu=i6500 < %s | FileCheck %s --check-prefixes=ALL
5-
; RUN: llc -mtriple=mips64 -mcpu=i6400 < %s | FileCheck %s --check-prefixes=ALL
64

75
define void @add_v16i8(ptr %c, ptr %a, ptr %b) nounwind {
86
; ALL-LABEL: add_v16i8:

0 commit comments

Comments
 (0)