[AArch64][SVE] can fold constant operands for svlsl

[k-arrows]

Test case:
https://godbolt.org/z/Pz68oo9P4

#include "arm_sve.h"

svint64_t s64_x (svbool_t pg) {
    return svlsl_n_s64_x (pg, svdup_s64 (5), 2);
}

Reference:
https://gcc.gnu.org/pipermail/gcc-patches/2024-October/666313.html

[llvmbot]

@llvm/issue-subscribers-backend-aarch64

Author: None (k-arrows)

Test case: https://godbolt.org/z/Pz68oo9P4 ```cpp #include "arm_sve.h"

svint64_t s64_x (svbool_t pg) {
return svlsl_n_s64_x (pg, svdup_s64 (5), 2);
}

Reference:
https://gcc.gnu.org/pipermail/gcc-patches/2024-October/666313.html

</details>

[paulwalker-arm]

#134116 introduced general simplification support for SVE intrinsics that have an IR instruction equivalent. The PR only covered mul but has since been extended to cover the majority of binops.