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[AMDGPU] More accurate handling of alignment around buffer fat pointers #138975

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krzysz00 opened this issue May 7, 2025 · 3 comments
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@krzysz00
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krzysz00 commented May 7, 2025

For some transformations - such as promotion of uniform (and pointsToConstantMemory() / !invariant.load) buffer_load to s_buffer_load, each component of the buffer operation - that is, both the address in the base of the buffer and the offset have to be aligned appropriately.

Fundamentally, the proposed change is to alter the semantics of align on the pointer arguments of raw.ptr.buffer.* to indicate the intersection/minimum of the alignments on the resource base and offset. (Currently, ptr addrspace(7) lowering uses the alignment of the offset part for this).

Then, lowering in the backend can safely look at the MachineMemOperand's align field to determine which transformations are legal.

To accomplish this in the ptr addrspace(7) lowering, it will be altered to

  1. Walk the fat-pointer using function, recording the known alignments of the potential resource bases (ex. by looking at the input/output alignments on a make.buffer.rsrc, argument annotations on ptr addrspace(8) inputs, etc.
  2. Compute the minimum of these as the "known base alignment" (defaulting to 1 if it can't be known")
  3. When encountering an alignment-bearing operation (load, store, etc.), the alignment will be set to the minimum of the specified alignment and either the known base alignment or the alignment of the resource itself (if known)
@llvmbot
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llvmbot commented May 7, 2025

@llvm/issue-subscribers-backend-amdgpu

Author: Krzysztof Drewniak (krzysz00)

For some transformations - such as promotion of uniform (and `pointsToConstantMemory()` / `!invariant.load`) `buffer_load` to `s_buffer_load`, each component of the buffer operation - that is, both the address in the base of the buffer *and* the offset have to be aligned appropriately.

Fundamentally, the proposed change is to alter the semantics of align on the pointer arguments of raw.ptr.buffer.* to indicate the intersection/minimum of the alignments on the resource base and offset. (Currently, ptr addrspace(7) lowering uses the alignment of the offset part for this).

Then, lowering in the backend can safely look at the MachineMemOperand's align field to determine which transformations are legal.

To accomplish this in the ptr addrspace(7) lowering, it will be altered to

  1. Walk the fat-pointer using function, recording the known alignments of the potential resource bases (ex. by looking at the input/output alignments on a make.buffer.rsrc, argument annotations on ptr addrspace(8) inputs, etc.
  2. Compute the minimum of these as the "known base alignment" (defaulting to 1 if it can't be known")
  3. When encountering an alignment-bearing operation (load, store, etc.), the alignment will be set to the minimum of the specified alignment and either the known base alignment or the alignment of the resource itself (if known)

@arsenm arsenm changed the title [AMDGPU] More accurate handling of alignment aronud buffer fat pointers [AMDGPU] More accurate handling of alignment around buffer fat pointers May 8, 2025
@arsenm
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arsenm commented May 8, 2025

Unfortunately it probably means we need an annotation to assert a known alignment of the resource base register

@krzysz00
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krzysz00 commented May 8, 2025

make.buffer.rsrc takes (and returns) pointer arguments and so can carry align attributes. And where buffer resources aren't constricted, they'll probably be global or function arguments and those can have aligns on them

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