-
Notifications
You must be signed in to change notification settings - Fork 13.5k
[KeyInstr][JumpThreading] Remap atoms after threading #133487
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Conversation
@llvm/pr-subscribers-llvm-transforms @llvm/pr-subscribers-debuginfo Author: Orlando Cazalet-Hyams (OCHyams) ChangesFull diff: https://github.com/llvm/llvm-project/pull/133487.diff 3 Files Affected:
diff --git a/llvm/lib/Transforms/Scalar/JumpThreading.cpp b/llvm/lib/Transforms/Scalar/JumpThreading.cpp
index 18dda2f3ad82e..d320f7dce11db 100644
--- a/llvm/lib/Transforms/Scalar/JumpThreading.cpp
+++ b/llvm/lib/Transforms/Scalar/JumpThreading.cpp
@@ -2451,6 +2451,7 @@ void JumpThreadingPass::threadEdge(BasicBlock *BB,
{DominatorTree::Insert, PredBB, NewBB},
{DominatorTree::Delete, PredBB, BB}});
+ remapSourceAtoms(ValueMapping, NewBB->begin(), NewBB->end());
updateSSA(BB, NewBB, ValueMapping);
// At this point, the IR is fully up to date and consistent. Do a quick scan
diff --git a/llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-2-bbs.ll b/llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-2-bbs.ll
index 3ca81f554034f..612e74792fac2 100644
--- a/llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-2-bbs.ll
+++ b/llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-2-bbs.ll
@@ -2,27 +2,41 @@
;; Modified from llvm/test/Transforms/JumpThreading/thread-two-bbs.ll
;;
-;; JumpThreading duplicates bb.cond2 to thread through bb.file to bb.f2 or exit.
+;; JumpThreading duplicates bb.cond2 to thread through bb.file to bb.file,
+;; bb.f2 or exit.
;;
;; Check the duplicated instructions get remapped atom groups.
; CHECK: bb.cond2:
; CHECK-NEXT: call void @f1()
; CHECK-NEXT: %tobool1 = icmp eq i32 %cond2, 0, !dbg [[G1R2:!.*]]
-; CHECK-NEXT: br i1 %tobool1, label %exit, label %exit, !dbg [[G1R1:!.*]]
+; CHECK-NEXT: br i1 %tobool1, label %bb.file, label %exit, !dbg [[G1R1:!.*]]
; CHECK: bb.cond2.thread:
-; CHECK-NEXT: %tobool12 = icmp eq i32 %cond2, 0, !dbg [[G2R2:!.*]]
-; CHECK-NEXT: br i1 %tobool12, label %bb.f2, label %exit, !dbg [[G2R1:!.*]]
+; CHECK-NEXT: %tobool12 = icmp eq i32 %cond2, 0, !dbg [[G3R2:!.*]]
+; CHECK-NEXT: br i1 %tobool12, label %bb.f2, label %exit, !dbg [[G3R1:!.*]]
+
+;; After the transform %ptr is null through bb.cond2 and @a through
+;; bb.cond2.thread. Thread bb.cond2.thread->bb.f2 through bb.file.
+;; Check the duplicated store gets a remapped atom group too.
+
+; CHECK: bb.file:
+; CHECK-NEXT: %ptr3 = phi ptr [ null, %bb.cond2 ]
+; CHECK-NEXT: store ptr %ptr3, ptr %p, align 4, !dbg [[G2R1:!.*]]
+
+; CHECK: bb.f2:
+; CHECK-NEXT: store ptr @a, ptr %p, align 4, !dbg [[G4R1:!.*]]
; CHECK: [[G1R2]] = !DILocation(line: 1, column: 1, scope: ![[#]], atomGroup: 1, atomRank: 2)
; CHECK: [[G1R1]] = !DILocation(line: 1, column: 1, scope: ![[#]], atomGroup: 1, atomRank: 1)
-; CHECK: [[G2R2]] = !DILocation(line: 1, column: 1, scope: ![[#]], atomGroup: 2, atomRank: 2)
-; CHECK: [[G2R1]] = !DILocation(line: 1, column: 1, scope: ![[#]], atomGroup: 2, atomRank: 1)
+; CHECK: [[G3R2]] = !DILocation(line: 1, column: 1, scope: ![[#]], atomGroup: 3, atomRank: 2)
+; CHECK: [[G3R1]] = !DILocation(line: 1, column: 1, scope: ![[#]], atomGroup: 3, atomRank: 1)
+; CHECK: [[G2R1]] = !DILocation(line: 2, column: 1, scope: ![[#]], atomGroup: 2, atomRank: 1)
+; CHECK: [[G4R1]] = !DILocation(line: 2, column: 1, scope: ![[#]], atomGroup: 4, atomRank: 1)
@a = global i32 0, align 4
-define void @foo(i32 %cond1, i32 %cond2) !dbg !5 {
+define void @foo(i32 %cond1, i32 %cond2, ptr %p) !dbg !5 {
entry:
%tobool = icmp eq i32 %cond1, 0
br i1 %tobool, label %bb.cond2, label %bb.f1
@@ -37,6 +51,7 @@ bb.cond2: ; preds = %bb.f1, %entry
br i1 %tobool1, label %bb.file, label %exit, !dbg !10
bb.file: ; preds = %bb.cond2
+ store ptr %ptr, ptr %p, align 4, !dbg !11
%cmp = icmp eq ptr %ptr, null
br i1 %cmp, label %exit, label %bb.f2
@@ -66,3 +81,4 @@ declare void @f2()
!7 = !{}
!9 = !DILocation(line: 1, column: 1, scope: !5, atomGroup: 1, atomRank: 2)
!10 = !DILocation(line: 1, column: 1, scope: !5, atomGroup: 1, atomRank: 1)
+!11 = !DILocation(line: 2, column: 1, scope: !5, atomGroup: 2, atomRank: 1)
diff --git a/llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-basic.ll b/llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-basic.ll
new file mode 100644
index 0000000000000..d653a8d525b79
--- /dev/null
+++ b/llvm/test/DebugInfo/KeyInstructions/Generic/jump-threading-basic.ll
@@ -0,0 +1,78 @@
+; RUN: opt %s --passes=jump-threading -S -o - -S | FileCheck %s
+
+;; +-> T1 -+
+;; | v +-> T2
+;; Entry -+ Merge -+
+;; | ^ +-> F2
+;; +-> F1 -+
+;;
+;; Thread T1 -> T2 and F1 -> F2 through Merge.
+;;
+;; +-> T1
+;; |
+;; Entry -+
+;; |
+;; +-> F1
+;;
+;; Check the duplicated instructions atoms are remapped.
+
+; CHECK: T2:
+; CHECK-NEXT: %v1 = call i32 @f1()
+; CHECK-NEXT: %C3 = add i32 %v1, 1, !dbg [[G2R2:!.*]]
+; CHECK-NEXT: store i32 %C3, ptr %p, align 4, !dbg [[G2R1:!.*]]
+
+; CHECK: F2:
+; CHECK-NEXT: %v2 = call i32 @f2()
+; CHECK-NEXT: %C = add i32 %v2, 1, !dbg [[G1R2:!.*]]
+; CHECK-NEXT: store i32 %C, ptr %p, align 4, !dbg [[G1R1:!.*]]
+
+; CHECK: [[G2R2]] = !DILocation(line: 8, column: 1, scope: ![[#]], atomGroup: 2, atomRank: 2)
+; CHECK: [[G2R1]] = !DILocation(line: 8, column: 1, scope: ![[#]], atomGroup: 2, atomRank: 1)
+; CHECK: [[G1R2]] = !DILocation(line: 8, column: 1, scope: ![[#]], atomGroup: 1, atomRank: 2)
+; CHECK: [[G1R1]] = !DILocation(line: 8, column: 1, scope: ![[#]], atomGroup: 1, atomRank: 1)
+
+define i32 @test1(i1 %cond, ptr %p) !dbg !5 {
+ br i1 %cond, label %T1, label %F1
+
+T1: ; preds = %0
+ %v1 = call i32 @f1()
+ br label %Merge
+
+F1: ; preds = %0
+ %v2 = call i32 @f2()
+ br label %Merge
+
+Merge: ; preds = %F1, %T1
+ %A = phi i1 [ true, %T1 ], [ false, %F1 ]
+ %B = phi i32 [ %v1, %T1 ], [ %v2, %F1 ]
+ %C = add i32 %B, 1, !dbg !8
+ store i32 %C, ptr %p, align 4, !dbg !9
+ br i1 %A, label %T2, label %F2
+
+T2: ; preds = %Merge
+ call void @f3()
+ ret i32 %B
+
+F2: ; preds = %Merge
+ ret i32 %B
+}
+
+declare i32 @f1()
+declare i32 @f2()
+declare void @f3()
+
+!llvm.dbg.cu = !{!0}
+!llvm.debugify = !{!2, !3}
+!llvm.module.flags = !{!4}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug)
+!1 = !DIFile(filename: "test.ll", directory: "/")
+!2 = !{i32 12}
+!3 = !{i32 0}
+!4 = !{i32 2, !"Debug Info Version", i32 3}
+!5 = distinct !DISubprogram(name: "test1", linkageName: "test1", scope: null, file: !1, line: 1, type: !6, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !0)
+!6 = !DISubroutineType(types: !7)
+!7 = !{}
+!8 = !DILocation(line: 8, column: 1, scope: !5, atomGroup: 1, atomRank: 2)
+!9 = !DILocation(line: 8, column: 1, scope: !5, atomGroup: 1, atomRank: 1)
+
|
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The previous patch in this stack #133486 calls remapSourceAtoms before calling calling threadEdge; and this patch adds a call to remapSourceAtoms into threadEdge, so it'll be called twice. Is this just inconsequential or deliberate, or meaningless?
;; +-> T1 | ||
;; | | ||
;; Entry -+ | ||
;; | | ||
;; +-> F1 |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Diagram should include T2 / F2, or is that deliberate?
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
It's deliberate. I've tried to make it clearer, is this better?
3cc84e5
to
f222378
Compare
272f806
to
fb161a8
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
The previous patch in this stack #133486 calls remapSourceAtoms before calling calling threadEdge; and this patch adds a call to remapSourceAtoms into threadEdge, so it'll be called twice. Is this just inconsequential or deliberate, or meaningless?
Ah, that's deliberate, the sites are working on different BBs.
;; +-> T1 | ||
;; | | ||
;; Entry -+ | ||
;; | | ||
;; +-> F1 |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
It's deliberate. I've tried to make it clearer, is this better?
35da29f
to
6b480a2
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
LGTM
No description provided.