
R
Spartan-3
MicroBlaze
Sample Project

Spartan-3 MicroBlaze Sample Project www.xilinx.com
1-800-255-7778
© 2006 Xilinx, Inc. All Rights Reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc.
All other trademarks are the property of their respective owners.
NOTICE OF DISCLAIMER: Xilinx is providing this design, code, or information "as is." By providing the design, code, or information as one
possible implementation of this feature, application, or standard, Xilinx makes no representation that this implementation is free from any
claims of infringement. You are responsible for obtaining any rights you may require for your implementation. Xilinx expressly disclaims any
warranty whatsoever with respect to the adequacy of the implementation, including but not limited to any warranties or representations that
this implementation is free from claims of infringement and any implied warranties of merchantability or fitness for a particular purpose.
R

Spartan-3 MicroBlaze Sample Project www.xilinx.com 3
June, 2006 1-800-255-7778
R
Spartan-3™ MicroBlaze™ Sample
Project
Overview
Target board: Xilinx
®
Spartan-3™ Starter Board
Development system: Embedded Development Kit (EDK)
This sample project is provided with the EDK development system. The project is
completely implemented and ready to download and run on a Spartan-3 Starter Board.
Hardware Requirements:
Xilinx Spartan-3 Starter Board, Revision E (or later)
Serial cable (9-pin male to 9-pin female)
Xilinx Parallel Cable 4 (with flat ribbon cable)
Software Requirements:
Xilinx Embedded Development Kit (EDK). This project should be run on the same version
of EDK in which it was installed, or later.
Xilinx ISE™ (refer to Getting Started With EDK for the required version of ISE).
Hyperterminal (or similar) for host communication with the embedded system
Design Description
This sample project is originally created using the Base System Builder (BSB) in the EDK
development system. BSB generates the customizedembedded system hardware platform
based on user selections from features available on the target board (Spartan-3 Starter
Board). BSB also generates a sample application program (TestApp_Memory.c) which
exercises some of the selected hardware features. This example design contains an
application program (TestInterrupt.c) which is based on TestApp_Memory.c, and to which

4 www.xilinx.com Spartan-3 MicroBlaze Sample Project
1-800-255-7778 June, 2006
R
an interrupt test routine and two interrupt service routines have been added. This design
technique is typical of the way a development board, such as the Spartan-3 Starter Board,
can be used to quickly begin prototyping an embedded processor application.
The TestInterrupt.c application program begins by running the automatically generated
memory tests from TestApp_Memory.c. It then calls the InterruptTest routine which has
been added. InterruptTest() initializes the interrupt system and the timer peripheral, then
enters a loop waiting for interrupts from either the timer or the UART. When a timer
interrupt occurs, the timer’s interrupt service routine advances a pattern on the LEDs.
When a character is received on the RS232 channel, the UART’s ISR increases or decreases
the timeout interval of the timer, causing the LED pattern to advance faster (“f”) or slower
(“s”). Receiving an “x” disables the interrupts and exits the program.
Design Contents
The embedded processor system contained in this sample project consists of the following:
• MicroBlaze 32-bit soft processor core running on a 50 MHz system clock
• 8 KB of on-chip block RAM connected to the processor Local Memory Bus (LMB),
used for all instruction and data storage
• 256K x 32 SRAM on the Spartan-3 Starter Board, connected to an External Memory
Controller (OPB_EMC) on the processor OPB bus (used only for test)
• RS232 serial channel on the Spartan-3 Starter Board, connected to a UART peripheral
(OPB_UARTlite) on the processor OPB bus, used for stdin (interrupt-driven) and
stdout
• Eight LEDs on the Spartan-3 Starter Board, connected to a General Purpose I/O
peripheral (OPB_GPIO) on the processor OPB bus
• Timer/counter peripheral (OPB_Timer) on the processor OPB bus, used to generate
interrupts at varying intervals
• Interrupt controller (OPB_Intc) on the processor OPB bus, used to manage multiple
interrupts
The embedded processor system is implemented in a XC3S200-FT256-4 Spartan-3 FPGA
device on the Spartan-3 Starter Board.
Project File Description
system.xmp: XPS project file (target device, project options, source file pointers)
system.mhs: Microprocessor Hardware Specification (processor, busses, peripherals,
ports, peripheral configuration parameters)
system.mss: Microprocessor Software Specification (libraries, drivers, system software
options)
data/system.ucf: Implementation constraint file (pinouts and clock frequency)
TestInterrupt/src/TestInterrupt.c: Application program