
PICMG
®
EXP.0 CompactPCI Express Specification R2.0, March 22, 2013 5
3.1.1.6.1 Table of Touchstone Files Used for
Testing ......................................................... 76
3.1.1.6.2 Type 2 Peripheral Transmitter Eye ..............77
3.1.1.6.3 Controller Transmitter Eye ...........................80
3.1.1.6.4 Backplane Type 2 Peripheral Slot
Transmitter Eye............................................82
3.1.1.6.5 Controller Slot Transmitter Eye....................84
3.1.1.6.6 Backplane Compliance Testing ...................86
3.1.1.6.7 Backplane Loss Approximation....................88
3.1.1.6.8 Alternative Controller TX Measurement....... 89
3.1.1.7 Receiver Tolerance Testing............................................ 90
3.1.1.7.1 Peripheral Board Minimum Receiver Path
Sensitivity.....................................................90
3.1.1.7.2 System Controller Board Minimum
Receiver Path Sensitivity ............................. 93
3.1.1.7.3 Backplane System Slot Minimum
Receiver Path Sensitivity ............................. 94
3.1.1.7.4 Backplane Peripheral Slot Minimum
Receiver Path Sensitivity ............................. 96
3.1.1.8 Reference Clock ............................................................. 98
3.1.1.8.1 Hot-Plug .......................................................98
3.1.1.8.2 Clock Fan-Out..............................................99
3.1.1.8.3 Clocking Dependencies ...............................99
3.1.1.8.4 AC-Coupling and Biasing.............................99
3.1.1.8.5 Routing Length...........................................100
3.1.1.8.6 Reference Clock Specification ...................101
3.1.1.8.7 REFCLK Phase Jitter Specification ...........104
3.1.2 ESD ..............................................................................................108
3.1.3 5 Vaux ..........................................................................................109
3.1.4 SMBus..........................................................................................109
3.1.4.1 SMBus “Back Powering” Considerations...................... 111
3.1.4.2 Backplane Identification and Capability Using
SMBus ..........................................................................111
3.1.5 PWRBTN# Signal .........................................................................120
3.1.6 PS_ON# Signal ............................................................................120
3.1.7 PWR_OK Signal ...........................................................................121
3.1.8 WAKE# Signal ..............................................................................122
3.1.8.1 Implementation Note .................................................... 124
3.1.9 PERST# Signal ............................................................................125
3.1.9.1 Initial Power-Up (G3 to L0) ...........................................126
3.1.9.2 Power Management States (S0 to S3/S4 to S0) ..........127
3.1.9.3 Power Down .................................................................128
3.1.10 SYSEN# Signal ............................................................................ 129
3.1.11 Geographical Addressing .............................................................129
3.1.12 LINKCAP Signal ...........................................................................130
3.1.13 I/O Pins.........................................................................................130
3.1.14 Reserved Pins ..............................................................................130
3.2 Hot-Plug Support.......................................................................................130
3.2.1 Hot-Plug Sub-System Architecture...............................................130
3.2.2 Power Enable ...............................................................................133
3.2.3 Wake# ..........................................................................................134
3.2.4 Module Power Good.....................................................................134
3.2.5 Present Detection .........................................................................134