95abapplied Elecronics
95abapplied Elecronics
REGULATIONS 2007
M.E APPLIED ELECTRONICS SEMESTER I Course Code Theory 071030009 071290029 071280022 071290032 Course Title Applied Mathematics Advanced Microprocessors Advanced Digital System Design Electronics Design Lab I L T P C 4 3 3 2 12
3 1 0 3 0 0 3 0 0 0 0 3 Total Credits
SEMESTER II Course Code Theory 071290035 071280041 071280043 071280042 Course Title Analysis and Design of Analog Integrated Circuits Digital Control Engineering Embedded Systems Electronics Design Lab II L T P C 4 3 3 2 12
3 1 0 3 0 0 3 0 0 0 0 3 Total Credits
SEMESTER III Course Code 071290074 071290076 Course Title Advanced Digital Signal Processing VLSI Design Techniques Elective I L T P C 4 3 3 10
3 1 0 3 0 0 3 0 0 Total Credits
SEMESTER IV Course Code 071280040 Course Title CAD of VLSI circuits Elective II Elective III L T P C 4 3 3 10
3 1 0 3 0 0 3 0 0 Total Credits
SEMESTER V Course Code Theory Elective IV Elective V Elective VI Practical 071280002 Project Work Phase I* Course Title L 3 3 3 T 0 0 0 P 0 0 0 C 3 3 3 6 15
0 0 12 Total Credits
SEMESTER VI Course Code Practical 071290096 Course Title Project Work Phase II L T P C 12 12
0 0 24 Total Credits
LIST OF ELECTIVES SEMESTER III Course Code Theory 071290110 071290111 071290031 Course Title Internet Technologies and applications Wavelet Transforms and applications High Performance Communication Networks SEMESTER IV Course Code Theory 071280039 071280047 071280013 071290019 071630003 071530006 Course Title Computational Intelligent Techniques Power Quality Engineering ASIC Design DSP Integrated Circuits Digital Image Processing Project Management SEMESTER V Course Code Theory 071280017 071290061 071120084 071230017 071280018 071290052 071280074 071790005 071280015 Course Title Industrial Robotics VLSI Signal Processing Wireless Embedded Systems Computer Architecture and Parallel Processing Industrial Electronics Low Power VLSI Design RF System Design Design and Analysis of Algorithms Electromagnetic Interference and Compatibility in System Design L 3 3 3 3 3 3 3 3 3 T 0 1 0 0 0 0 1 1 1 P 0 0 0 0 0 0 0 0 0 C 3 4 3 3 3 3 4 4 4 L 3 3 3 3 3 3 T 1 1 0 0 0 0 P 0 0 0 0 0 0 C 4 4 3 3 3 3 L 3 3 3 T 1 1 0 P 0 0 0 C 4 4 3