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Microprocessor

The document discusses the Intel 80386 microprocessor and its variants. It introduces the 80386 as Intel's 32-bit processor, highlighting its multi-tasking, memory management, and virtual memory capabilities. It then describes the 80386DX, 80386SX, and 80386EX variants, noting differences in packaging, memory addressing, and bus specifications. The document also provides details on the 80386's memory system, describing buffered and cached memory architectures used to improve performance.

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Celestine Reena J
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© Attribution Non-Commercial (BY-NC)
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Download as PPTX, PDF, TXT or read online on Scribd
164 views

Microprocessor

The document discusses the Intel 80386 microprocessor and its variants. It introduces the 80386 as Intel's 32-bit processor, highlighting its multi-tasking, memory management, and virtual memory capabilities. It then describes the 80386DX, 80386SX, and 80386EX variants, noting differences in packaging, memory addressing, and bus specifications. The document also provides details on the 80386's memory system, describing buffered and cached memory architectures used to improve performance.

Uploaded by

Celestine Reena J
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
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Introduction 80386 80386DX 80386SX 80386EX Pin Outs The Memory System

INTRODUCTION 32 bit version Features: Multi tasking Memory management Virtual memory Software protection Large memory system (4 GB)

What is 80386????????

80386 is, Very popular in embedded applications Output current available is 8 mA Power supply current required is 320 mA when operated in 33 MHz

Single +5 V power supply


Current 550mA Frequency 25 MHz

80386

500 mA
450 mA 600 mA

20 MHz
16 MHz 33 MHz

80386DX Packaged in a 132-pin grid array Addresses 4 GB of memory 32 bit data bus 32 bit address bus Output pin current 4 mA Input pin current +10 or -10 micro Ampere

80386sx Reduced bus version of 80386 where 32 bit is not needed Used in personal computers Popular and less costly version Used in Windows 3.11 Available with power supply +3.3 V

80386 EX o AT bus system, odynamic RAM controller, oProgrammable chip selection logic, o26 address pins o16 data pins o24 I/O Pins

BANK ENABLE (BE0-BE3): To select the access of a byte, word, or double word of data. ADDRESS DATA STROBE (ADS): Active when 80386 has got a valid memory address. CLOCK TIMES 2 (CLK2): Driven by a clock signal that is twice the operating frequency

LOCK: Used when DMA access is used. D/C: Logic 1: data bus contains data Logic 0: executes interrupt acknowledge BS16: Chooses the bus size

NA: Outputs the address of the next address BUSY: Used by the WAIT instruction. ERROR: Error is detected by the co-processor. NMI: Non Maskable Interrupt.

MEMORY SYSTEM

BUFFERED SYSTEM: Connected to buffers To increase fan-out from its address, data, control connections. 25 MHz using 50 MHz clock signal (Oscillator modules) HLDA-enable the buffered system

CACHE High speed memory system Improves overall performance of the memory systems Access times<<10 ns Size of the cache memory depends on the application of the processor

If a program is LARGE, Largest cache size is recommended If small, small size is enough CACHE

LEVEL 1 Internal cache

LEVEL 2 size:32k- 1M byte

INTERLEAVED MEMORY SYSTEMS

High cost Memory access time can be lengthened without the need for wait states Employs 2 complete buses called 2 way interleave 4 complete buses- 4 way interleave

THANK YOU.

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