8251A USART - Programmable Communication Interface
8251A USART - Programmable Communication Interface
# Introduction
8251A is a USART (Universal Synchronous Asynchronous Receiver Transmitter) for serial
data communication.
Receives parallel data from the CPU & transmits serial data after conversion.
Also receives serial data from the outside & transmits parallel data to the CPU after conversion.
# Pin diagram
# Sections of 8251A
Data Bus buffer
Receiver
determines the functions of the chip according to the control word in the control register & monitors the data flow.
Input signals
CS Chip Select : When signal goes low, the 8251A is selected by
register is addressed; when it is low, data buffer is addressed. (Control register & status register are differentiated by WR and RD signals) register or sends output to the data buffer.
WR : When signal is low, the MPU either writes in the control RD : When signal goes low, the MPU either reads a status from
RESET : A high on this signal reset 8252A & forces it into the idle CLK : Clock input, usually connected to the system clock for
Control Register
16-bit register for a control word consist of two independent bytes namely mode word & command word. Mode word : Specifies the general characteristics of operation such as baud, parity, number of bits etc. Command word : Enables the data transmission and reception. Register can be accessed as an output port when the Control/Data pin is high.
Status register
Checks the ready status of the peripheral. Status word in the status register provides the
Data register
Used as an input and output port when the C/D is low
CS
0 0 0 0 1
C/D
0 0 1 1
WR
1 0 0 1
RD
0 1 1 0
Operation
MPU reads data from data buffer MPU writes data from data buffer MPU writes a word to control register MPU reads a word from status register Chip is not selected for any operation
3. Modem Control
DSR - Data Set Ready : Checks if the Data Set is
device is ready to accept data when the 8251 is communicating with a modem. to transmit the serial data provided the enable bit in the command byte is set to 1. the modem that the receiver is ready to receive a data byte from the modem.
4. Transmitter section
Accepts parallel data from MPU & converts them
bits.
Output Register
Transmitter Buffer
Transmit control
the data to peripherals TxC - Transmitter Clock Input : Input signal, controls the rate of transmission. TxRDY - Transmitter Ready : Output signal, indicates the buffer register is empty and the USART is ready to accept the next data byte. TxE - Transmitter Empty : Output signal to indicate the output register is empty and the USART is ready to accept the next data byte.
5. Receiver Section
Accepts serial data on the RxD pin and converts
Input Register
RxD
Receive Buffer
RxRDY
Receive control RxC
start bit, waits for half bit time, and samples the line again. If the line is still low, the input register accepts the following data, and loads it into buffer register at the rate determined by the receiver clock.
RxRDY - Receiver Ready Output: Output signal, goes
high when the USART has a character in the buffer register & is ready to transfer it to the MPU.
RxD - Receive Data Input : Bits are received serially
on this line & converted into a parallel byte in the receiver input register.
RxC - Receiver Clock Input : Clock signal that controls
Thank You