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DC To DC Convertor

This document describes a push-pull DC-to-DC converter circuit that uses a 555 timer and 4013 flip-flop to generate a 50% duty cycle clock signal. This clock signal drives N-channel FETs in a push-pull configuration to power a transformer. The output of the transformer is then rectified and filtered to provide both positive and negative voltages of 25 volts at 30 watts of power. FETs are used instead of bipolar transistors to minimize crossconduction from storage time. The supply efficiency can be improved with a high quality transformer core, and LC filtering helps quiet the output without needing regulators.

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Osama Tahir
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© Attribution Non-Commercial (BY-NC)
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Download as PDF, TXT or read online on Scribd
148 views

DC To DC Convertor

This document describes a push-pull DC-to-DC converter circuit that uses a 555 timer and 4013 flip-flop to generate a 50% duty cycle clock signal. This clock signal drives N-channel FETs in a push-pull configuration to power a transformer. The output of the transformer is then rectified and filtered to provide both positive and negative voltages of 25 volts at 30 watts of power. FETs are used instead of bipolar transistors to minimize crossconduction from storage time. The supply efficiency can be improved with a high quality transformer core, and LC filtering helps quiet the output without needing regulators.

Uploaded by

Osama Tahir
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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01uf C2 1000pf Q2 6 MR822 33uH 6 1 10 D1 9 + MR822 D4 C7 4700uf R5 2K + L1 -25V C3 4.7uf Q1 1 Q 7 5 D2 MR822 + C6 4700uf R6 2K L2 + C4 4.7uf 33uH +25V

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Push-Pull DC to DC Converter

When designing amplifier circuits that are battery powered, the need arises for generating plus and minus voltages. These voltages are usually larger than the supply voltage and must be able to provide a fair amount of power, as well as be simple and inexpensive. The circuit above uses a CMOS 555 timer to generate a clock (approx. 50KHz). The 555 drives a CMOS flip-flop which gives a 50% duty cycle clock. The Q and Q not outputs of the flip-flop are used to drive N channel FETs, which form a push pull driver to the transformer. The output of the transformer is then rectified and filtered to provide plus and minus voltage. This configuration was set up to deliver plus and minus 25 volts at 30 watts. FETs were used in this design (as opposed to bipolar transistors) to minimize the problem of crossconduction due to storage time of the drive devices. The efficiency of the supply can be improved by using a high quality transformer core. The LC filtering on the output helps quiet the output without having to use regulators.

BRANNON ELECTRONICS, INC.

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