Cell Phone Based Voting Machine
Cell Phone Based Voting Machine
MAJOR PROJECT
ON
BACHELOR OF TECHNOLOGY
IN
KURUKSHETRA UNIVERSITY,KURUKSHETRA
Many lives & destinies are destroyed due to the lack of proper guidance, directions &
opportunities. It is in this respect I feel that I am in much better condition today due to
continuous process of motivation & focus provided by my parents & teachers in general. The
process of completion of this project was a tedious job & requires care & support at all stages. I
would like to highlight the role played by individuals towards this.
I am eternally grateful to honorable principal Dr. D.P. Gupta for providing us the opportunity &
infrastructure to complete the project as a partial fulfillment of B.Tech degree.
I am very thankful to Asst. Prof. Rajiv Chechi, Head of Department, for his kind support &
faith in us.
I would like to express my sincere thanks, with deep sense of gratitude to my project guide
Prof. G.C Lall for their keen interests my project.
I also thank Mr. Varun Sharma for his valuable help in our project.
I am also thankful to all visible & invisible hands which helped us to complete this project with a
feeling of success.
Nikhil (1705429)
(i)
CERTIFICATE
We hereby certify the work which is being presented in the project entitled
“CELL PHONE BASED VOTING MACHINE” by “NIKHIL SHARMA, HEMANT
KUMAR, PRIYANSHU CAUHAN” in partial fulfillment of requirements for the award of
degree B.Tech (Electronics & Communication Engg.) submitted in the Department of
Electronics & Communication Engg. at Haryana College Of Technology & Management,
Kaithal under Kurukshetra University, Kurukshetra is carried out during a period from
August2008 to December2008 under the supervision of “Prof. G.C. Lall” Department of
Electronics & Communication Engineering, HCTM Kaithal. The matter presented in this project
has not been submitted by me in any other University/ Institue for the award of B.Tech. Degree.
This is to certify that the above statement made by the candidate is correct to the best of my/our
knowledge.
The B.Tech Viva Voce Examination of “Nikhil Sharma, Hemant Kumar, Priyanshu Chauhan”
has been held on _____________ and accepted.
H.O.D
(ii)
ABSTRACT
India is world’s largest democracy. Fundamental right to vote or simply voting in elections
forms the basis of Indian democracy.
In India all earlier elections a voter used to cast his vote by using ballot paper. This is a long,
time-consuming process and very much prone to errors.
This situation continued till election scene was completely changed by electronic voting
machine. No more ballot paper, ballot boxes, stamping, etc. all this condensed into a simple
box called ballot unit of the electronic voting machine.
Cell phone based voting machine is capable of saving considerable printing stationery and
transport of large volumes of electoral material. It is easy to transport, store, and maintain. It
completely rules out the chance of invalid votes. Its use results in reduction of polling time,
resulting in fewer problems in electoral preparations, law and order, candidates' expenditure,
etc. and easy and accurate counting without any mischief at the counting centre.
Our cell phone based voting machine consists of microcontroller ATMEL AT89S51, a
DTMF decoder CM8870C, a memory storage device EEPROM. DTMF is sent to the
microcontroller which is decoded by CM8870C and the password is fed with the candidate
number. The EEPROM is used to store the memory in case of power failure.
This project is based on assembly language programming. The software platform used in this
project are Keil uVision3 and SPIPGM37.
LIST OF TABLES
(iv)
LIST OF FIGURES
(v)
CONTENTS
Chapter 1
Introduction 1-23
Chapter 2
Literature Review 24-29
Chapter 3
PCB Designing 30-31
Working 32
Block Diagram 33
Circuit Diagram 34
Chapter 4
Cost Analysis 35
Problem Faced & Troubleshooting 36
Chapter 5
Conclusion 37
Future Scope 37
REFERENCES 38
APPENDIX
Program Coding 39-49
Datasheets 50-56
MAJOR PROJECT REPORT: CELL PHONE BASED VOTING MACHINE
1
CHAPTER 1
INTRODUCTION & COMPONENTS
INTRODUCTION
The aim of our project is to design & develop a mobile based voting machine. In this project
user can dial the specific number from any land line or mobile phone to cast his vote. Once
the user is connected to the voting machine he can enter his password & choice of vote. If he
has entered a valid choice & password his vote will be caste with two short duration beeps.
For invalid password/choice long beep will be generated. User is allotted 15 seconds to enter
his password & choice. A reset button is provided for resetting the system. A total key is
provided to display the result.
We have also used non-volatile memory for storing all data. EEPROM will preserve all
information in case of power failure.
In this project all information is transmitted through DTMF tones. The major block & their
functions are described in details below.
DTMF DECODER
In DTMF decoder circuit we use IC 8870. IC 8870 converts the dual tones to corresponding
binary outputs.
DTMF SIGNALLING
AC register signaling is used in DTMF telephones, here tones rather than make/break pulse
are used for dialing, each dialed digit is uniquely represented by a pair of sine waves tones.
These tones (one from low group for row and another from high group for column) are sent to
the exchange when a digit is dialed by pushing the key, these tone lies within the speech band
of 300 to 3400 HZ, and are chosen so as to minimize the possibility of any valid frequency
pair existing in normal speech simultaneously. Actually, this minimisator is made possible by
forming pairs with one tone from the higher group and the other from the lower of
frequencies. A valid DTMF signal is the sum of two tones, one from a lower group ( 697-940
Hz) and the other from a higher group ( 1209-1663 Hz). Each group contains four individual
tones. This scheme allows 10 unique combinations. Ten of these code represent digits 1
through 9 and 0. . tones in DTMF dialing are so chose that none of the tones is harmonic of
are other tone. Therefore is no change of distortion caused by harmonics. Each tone is sent as
along as the key remains pressed. The DTMF signal contains only one component from each
of the high and low group. This significantly simplifies decoding because the composite
DTMF signal may be separated with band pass filters into single frequency components, each
of which may be handled individually.
COMPONENTS
2 IC MT8870DE 1
3 IC ATMEL AT24C16 1
6 Transformer 1
7 Crystal Oscillator 2
8 Switch 2
9 LED 2
10 Resistors(1KΩ,10KΩ,47kΩ,100KΩ,330kΩ,) 10
11 Capacitors(22pf,.1µf,10µf,470µf,1000µf) 17
12 Diodes 5
COMPONENT DESCRIPTION
1) MICRO-CONTROLLER AT89S51
FEATURES
Compatible with MCS-51® Products
4K Bytes of In-System Programmable (ISP) Flash Memory– Endurance: 1000
Write/Erase Cycles
4.0V to 5.5V Operating Range
Fully Static Operation: 0 Hz to 33 MHz
Three-level Program Memory Lock
128 x 8-bit Internal RAM
32 Programmable I/O Lines
Two 16-bit Timer/Counters
Six Interrupt Sources
Full Duplex UART Serial Channel
Low-power Idle and Power-down Modes
Interrupt Recovery from Power-down Mode
Watchdog Timer
Dual Data Pointer
Power-off Flag
Fast Programming Time
Flexible ISP Programming (Byte and Page Mode)
DESCRIPTION
The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes
of in-system programmable Flash memory. The device is manufactured using Atmel‟s high-
density non-volatile memory technology and is compatible with the industry- standard 80C51
instruction set and pin out. The on-chip Flash allows the program memory to be
reprogrammed in-system or by a conventional non-volatile memory programmer. By
combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip,
the Atmel AT89S51 is a powerful microcontroller which provides a highly-flexible and cost-
effective solution to many embedded control applications.
The AT89S51 provides the following standard features: 4K bytes of Flash, 128 bytes of
RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five
vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock
circuitry. In addition, the AT89S51 is designed with static logic for operation down to zero
frequency and supports two software selectable power saving modes. The Idle Mode stops the
CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue
functioning. The Power-down mode saves the RAM contents but freezes the oscillator,
disabling all other chip functions until the next external interrupt or hardware reset.
PIN DIAGRAM
PROCESSOR
A processor is an electronic device capable of manipulating data in a way specified by a
sequence of instructions.
INSTRUCTIONS
Instructions in a computer are binary numbers just like data. Different numbers, when read
and executed by a processor, cause different things to happen. The instructions are also called
opcodes or machine codes. Different bit patterns activate or deactivate different parts of the
processing core. Every processor has its own instruction set varying in number, bit pattern
and functionality.
PROGRAM
The sequence of instructions is what constitutes a program. The sequence of instructions may
be altered to suit the application.
ASSEMBLY LANGUAGE
Writing and understanding such programs in binary or hexadecimal form is very difficult ,so
each instructions is given a symbolic notation in English language called as mnemonics. A
program written in mnemonics Form is called an assembly language program. But it must be
converted into machine language for execution by processor.
ASSEMBLER
An assembly language program should be converted to machine language for execution by
processor. Special software called ASSEMBLER converts a program written in mnemonics
to its equivalent machine opcodes.
PIN DESCRIPTION
GND: Ground.
Port 0: Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can
sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-
impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data
bus during accesses to external program and data memory. In this mode, P0 has internal pull-
ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes
during program verification. External pull-ups are required during program verification.
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output
buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled
high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are
externally being pulled low will source current (IIL) because of the internal pull-ups.
Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output
buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled
high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are
externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2
emits the high-order address byte during fetches from external program memory and during
accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this
application, Port 2 uses strong internal pull-ups when emitting 1s.
Port 3
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can
sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the
internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control
signals for Flash programming and verification. Port 3 also serves the functions of various
special features of the AT89S51, as shown in the following table:
ALE/PROG
Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during
accesses to external memory. This pin is also the program pulse input (PROG) during Flash
programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator
frequency and may be used for external timing or clocking purposes. Note, however, that one
ALE pulse is skipped during each access to external data memory. If desired, ALE operation
can be disabled by setting bit 0 of SFR location 8EH.
PSEN
Program Store Enable (PSEN) is the read strobe to external program memory. When the
AT89S51 is executing code from external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to external
data memory.
EA/VPP
External Access Enable. EA must be strapped to GND in order to enable the device to fetch
code from external program memory locations starting at 0000H up to FFFFH. Note,
however, that if lock bit 1 is programmed, EA will be internally latched on reset. This pin
also receives the 12-volt programming enable voltage (VPP) during Flash programming.
XTAL1
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier
PROCESSOR ARCHITECTURE
ALU
The Arithmetic Logic Unit (ALU) performs the internal arithmetic manipulation of data line
processor. The instructions read and executed by the processor decide the operations
performed by the ALU and also control the flow of data between registers and ALU.
Operations performed by the ALU are Addition , Subtraction , Not , AND , NAND , OR ,
NOR , XOR , Shift Left/Right , Rotate Left/right , Compare etc. Some ALU supports
Multiplication and Division. Operands are generally transferred from two registers or from
one register and memory location to ALU data inputs. The result of the operation is the
placed back into a given destination register or memory location from ALU output.
REGISTERS
Registers are the internal storage for the processor. The number of registers varies
significantly between processor architectures.
WORKING REGISTERS
Temporary storage during ALU Operations and data transfers.
INDEX REGISTERS
Points to memory addresses.
STATUS REGISTERS
Stores the current status of various flags denoting conditions resulting from various
operations.
CONTROL REGISTERS
Contains configuration bits that affect processor operation and the operating modes of
various internal subsystems.
MEMORY
Memory is used to hold data and program for the processor.
SRAM
Volatile, fast, low capacity, expensive, requires lesser external support circuitry.
DRAM
Volatile, relatively slow, highest capacity needs continuous refreshing. Hence require
external circuitry.
OTP ROM
One time programmable, used for shipping in final products.
EPROM
Erasable programmable, UV Erasing, Used for system development and debugging.
EEPROM
Electrically erasable and programmable, can be erased programmed in- circuit, Used
for storing system parameters.
FLASH
Electrically programmable & erasable, large capacity, organized as sectors.
BUSES
A bus is a physical group of signal lines that have a related function. Buses allow for the
transfer of electrical signals between different parts of the processor.
Processor buses are of three types:
Data bus
Address bus
Control bus
CONTROLLER LOGIC
Processor brain decodes instructions and generate control signal for various sub units. It has
full control over the clock distribution unit of processor.
I/O Peripherals
The I/O devices are used by the processor to communicate with the external world
Parallel Ports.
Serial Ports.
ADC/DAC.
2) IC CM8870
FEATURES
Full DTMF receiver
Less than 35mW power consumption
Industrial temperature range
Uses quartz crystal or ceramic resonators
Adjustable acquisition and release times
18-pin DIP, 18-pin DIP EIAJ, 18-pin SOIC, 20-pin PLCC
DESCRIPTION
The CAMD CM8870/70C provides full DTMF receiver capability by integrating both the
band-split filter and digital decoder functions into a single 18-pin DIP, SOIC, or 20-pin PLCC
package. The CM8870/70C is manufactured using state-of-the-art CMOS process technology
for low power consumption (35mW, MAX) and precise data handling. The filter section uses
a switched capacitor technique for both high and low group filters and dial tone rejection. The
CM8870/70C decoder uses digital counting techniques for the detection and decoding of all
16 DTMF tone pairs into a 4-bit code. This device contains input protection against damage
due to high static voltages or electric fields; however, precautions should be taken to avoid
application of voltages higher than the maximum rating.
PIN DIAGRAM
PIN CONFIGURATION
IN+: Non-inverting
IN–: Inverting
GS: Gain select
VREF: Reference Output Voltage (nominally VDD/2)
INH: Inhibits
OSC3: Digital buffered oscillator output
PD: Power down
OSC1: Clock input
OSC2: Clock output
VSS: Negative power supply
TOE: Three-state output enable (Input)
Q1: Three-state outputs
Q2, Q3, Q4: Tone pair received
StD: Delayed Steering output
ESt: Early steering output
St/Gt: Steering input/guard
VDD: Positive power supply
IC: Internal connection
3) ATMEL 24C16
FEATURES
Low-voltage and Standard-voltage Operation
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048
x 8 (16K)
2-wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
8-byte Page (1K, 2K), 16-byte Page (4K, 8K, 16K) Write Modes
Partial Page Writes are Allowed
Self-timed Write Cycle (10 ms max)
High-reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
Automotive Grade and Extended Temperature Devices Available
8-lead PDIP, 8-lead JEDEC SOIC, 8-lead MAP and 8-lead TSSOP Packages
DESCRIPTION
The AT24C01A/02/04/08/16 provides 1024/2048/4096/8192/16384 bits of serial electrically
erasable and programmable read-only memory (EEPROM) organized as
128/256/512/1024/2048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage operation are
essential. The AT24C01A/02/04/08/16 is available in space-saving 8-pin PDIP, 8-lead
JEDEC SOIC, 8-lead MAP and 8-lead TSSOP packages and is accessed via a 2-wire serial
interface.
PIN DIAGRAM
PIN CONFIGURATION
A0 - A2 : Address Inputs
SDA : Serial Data
SCL : Serial Clock Input
WP : Write Protect
NC : No Connect
GND : Ground
4) VOLTAGE REGULATOR
FEATURES
Output current in Excess of 1.0 A
No external component required
Internal thermal overload protection
Internal short circuit current limiting
Output transistor safe-area compensation
Output voltage offered in 2% and 4% tolerance
Available I n surface mount D2PAK and standard 3-lead transistor packages
Previous commercial temperature range has been extended to a junction temperature
range of -40 degree C to +125 degree C.
DESCRIPTION
Voltage regulator ICs are available with fixed (typically 5, 12 and 15V) or variable output
voltages. The maximum current they can pass also rates them. Negative voltage regulators are
available, mainly for use in dual supplies. Most regulators include some automatic protection
from excessive current and overheating (thermal protection). Many of fixed voltage regulator
ICs has 3 leads. They include a hole for attaching a heat sink if necessary.
5) LCD DISPLAY
This is the first interfacing example for the Parallel Port. We will start with something simple.
This example doesn't use the Bi-directional feature found on newer ports, thus it should work
with most, if not all Parallel Ports. These LCD Modules are very common these days, and are
quite simple to work with, as all the logic required to run them is on board.
CIRCUIT DESCRIPTION
The LCD panel's Enable and Register Select is connected to the Control Port. The Control
Port is an open collector / open drain output. While most Parallel Ports have internal pull-up
resistors, there is a few which don't. Therefore by incorporating the two 10K external pull up
resistors, the circuit is more portable for a wider range of computers, some of which may have
no internal pull up resistors.
We make no effort to place the Data bus into reverse direction. Therefore we hard wire the
R/W line of the LCD panel, into write mode. This will cause no bus conflicts on the data
lines. As a result we cannot read back the LCD's internal Busy Flag which tells us if the LCD
has accepted and finished processing the last instruction. This problem is overcome by
inserting known delays into our program.
The 10k Potentiometer controls the contrast of the LCD panel. Nothing fancy here. As with
all the examples, I've left the power supply out. You can use a bench power supply set to 5v
or use an onboard +5 regulator. Remember a few de-coupling capacitors, especially if you
have trouble with the circuit working properly.
6) POWER SUPPLY
A 1 7805
D1 D3
1000 F + +
AC
Suppl 3 4 - -
y
D4 D2
B 2
BRIDGE RECTIFIER
Bridge rectifier circuit consists of four diodes arranged in the form of a bridge as shown in
figure.
A 1
D1 D3
AC Supply
3 Load 4
+ -
D4 D2
B 2
Figure No. 1.11: Bridge Rectifier
OPERATION
During the positive half cycle of the input supply, the upper end A of the transformer
secondary becomes positive with respect to its lower point B. This makes Point1 of bridge
positive with respect to point 2. The diode D1 & D2 become forward biased & D3 & D4
become reverse biased. As a result a current starts flowing from point1, through D1 the load
& D2 to the negative end .During negative half cycle, the point2 becomes positive with
respect to point1. Diodes D1 & D2 now become reverse biased .Thus a current flow from
point 2 to point1.
7) TRANSFORMER
PRINCIPLE OF THE TRANSFORMER
Two coils are wound over a Core such that they are magnetically coupled. The two coils are
known as the primary and secondary windings.
In a Transformer, an iron core is used. The coupling between the coils is source of making a
path for the magnetic flux to link both the coils. A core as in fig.2 is used and the coils are
wound on the limbs of the core. Because of high permeability of iron, the flux path for the
flux is only in the iron and hence the flux links both windings. Hence there is very little
„leakage flux‟. This term leakage flux denotes the part of the flux, which does not link both
the coils, i.e., when coupling is not perfect. In the high frequency transformers, ferrite core is
used. The transformers may be step-up, step-down, frequency matching, sound output,
amplifier driver etc. The basic principles of all the transformers are same.
8) DIODE
The diode is a p-n junction device. Diode is the component used to control the flow of the
current in any one direction. The diode widely works in forward bias.
When the current flows from the P to N direction. Then it is in forward bias. The Zener diode
is used in reverse bias function i.e. N to P direction. Visually the identification of the diode`s
terminal can be done by identifying he silver/black line. The silver/black line is the negative
terminal (cathode) and the other terminal is the positive terminal (cathode).
APPLICATION
9) RESISTORS
The flow of charge through any material encounters an opposing force similar in many
respects to mechanical friction .this opposing force is called resistance of the material .in
some electric circuit resistance is deliberately introduced in form of resistor. Resistor used fall
in three categories , only two of which are color coded which are metal film and carbon film
resistor .the third category is the wire wound type ,where value are generally printed on the
vitreous paint finish of the component. Resistors are in ohms and are represented in Greek
letter omega, looks as an upturned horseshoe. Most electronic circuit require resistors to make
them work properly and it is obliviously important to find out something about the different
types of resistors available. Resistance is measured in ohms, the symbol for ohm is an omega
ohm. 1 ohm is quite small for electronics so resistances are often given in kohm and Mohm.
Resistors used in electronics can have resistances as low as 0.1 ohm or as high as 10 Mohm.
TESTING
Resistors are checked with an ohm meter/millimeter. For a defective resistor the ohm-meter shows
infinite high reading.
10) CAPACITORS
In a way, a capacitor is a little like a battery. Although they work in completely different
ways, capacitors and batteries both store electrical energy. If you have read How Batteries
Work, then you know that a battery has two terminals. Inside the battery, chemical reactions
produce electrons on one terminal and absorb electrons at the other terminal.
BASIC
Like a battery, a capacitor has two terminals. Inside the capacitor, the terminals connect to
two metal plates separated by a dielectric. The dielectric can be air, paper, plastic or anything
else that does not conduct electricity and keeps the plates from touching each other. You can
easily make a capacitor from two pieces of aluminum foil and a piece of paper. It won't be a
particularly good capacitor in terms of its storage capacity, but it will work.
In an electronic circuit, a capacitor is shown like this:
The plate on the capacitor that attaches to the negative terminal of the battery accepts
electrons that the battery is producing.
The plate on the capacitor that attaches to the positive terminal of the battery loses
TESTING
To test the capacitors, either analog meters or special digital meters with the specified
function are used. The non-electrolyte capacitor can be tested by using the digital meter.
11) LED
LED falls within the family of P-N junction devices. The light emitting diode (LED) is a
diode that will give off visible light when it is energized. In any forward biased P-N junction
there is, with in the structure and primarily close to the junction, a recombination of hole and
electrons. This recombination requires that the energy possessed by the unbound free electron
be transferred to another state. The process of giving off light by applying an electrical source
is called electroluminescence.
LED is a component used for indication. All the functions being carried out are displayed by
led .The LED is diode which glows when the current is being flown through it in forward bias
condition. The LEDs are available in the round shell and also in the flat shells. The positive
leg is longer than negative leg.
CHAPTER 2
LITERATURE REVIEW
PREHISTORY: 8048
In fact, it should have started with chapter -2, the invention of microprocessor. Intel
introduced a single-chip processor, the 4004, in 1971. It was a 4-bit microprocessor, with
whopping processing speed of 100 thousand operations per second, and was meant for an
electronic calculator. There is a lot of 4-bit processing in calculators, especially if the
software is based on BCD arithmetics. Later Intel introduced the 8-bitter 8008 and it's grown-
up brother - the famous 8080 (which then was perfected by an ex-Intel employee as Zilog
Z80, one of the best 8-bit microprocessors of all times).
In 1976, Intel introduced its first microcontroller, 8048. It integrated the processing core with
code and data memory and certain peripherals. The code memory was a 1kB mask ROM
(defined by the last metallisation mask during the chip processing) or EPROM (after all, Intel
invented EPROM), the data memory was 64 bytes of RAM (including the 8-level stack and
two pages of eight general purpose registers). Besides general-purpose I/O (see below),
peripherals included a timer and an external interrupt (plus the necessary interrupt system).
Although the 8048 is clearly an 8-bit architecture, it is said to be an ancestor of the 4-bit 4004
rather than the 8080. Also it is said to bear remarkable similarities to Fairchild F8
microprocessor. Today, it is hard to say whether something of this is true, but one thing is
sure, the 8048 has a couple of strange features. Using four of its general purpose input/output
ports, and adding one or more 8243-type chip - and the I/O expand into another four 4-bit
ports. This expansion has not only support in the hardware - dedicated pins on 8048 - but also
in the instruction set, having dedicated instructions for I/O operations (including AND and
OR(!)) via the expander.
The 8048 already had a lot of useful features known well to 8051-users: external code
memory support; external data memory support (inherently only 256 bytes addressed
indirectly by R0 and R1 as there is no 16 bit pointer register such as the DPTR in 8051 - the
8051 inherited this 8-bit external data access); quasibidirectional I/O ports. Maximum clock is
11MHz, but an instruction cycle takes 15 oscillator clocks. The "A" version (advanced)
introduced powerdown mode
There were multiple variations of the 8048 around, mostly with different numbering, but
generally denoted as the MCS-48 family. 8048 itself denoted a mask-ROM part, 8748 an
EPROM part - windowed (CERDIP - erasable) for development, and unwindowed (PDIP)
OTP. The romless part was a bit surprisingly marked 8035 (probably most of the parts sold as
romless were parts with unusable ROM, due to error in the "programmed" firmware). There
was a low-cost version with reduced pin count and omitted some of the features as 8021, and
versions with more ROM and RAM as 8049 (2kB ROM/128B RAM) and 8050 (4kB
ROM/256B RAM); with ROMless versions as 8039 and 8040; and 8049 had also an EPROM
version 8749 (the funny thing is, that 8749 came in 1981, one year after 8051/8751). 8048's
were second sourced by a number of manufacturers, including NEC, Toshiba, and were
cloned also behind the then iron curtain in Czechoslovakia (Tesla MHB8048/8035) and
USSR. Application specific versions of 8048 were also built quite early, with adding of
various peripherals, such as 8-bit ADC in 8022 and a parallel-bus slave interface in
8041/8042.
The MCS-48 family was used in a quite wide range of applications. One of the first
applications of 8048 was in a gaming console (Magnavox Odyssey2), but there were also
more "serious" applications, for example in one of the first car engine "computerized" control
units. But the biggest hit came when IBM decided to use 8048 in its original PC keyboard.
Although in the AT keyboard IBM used the (presumably cheaper) 6805, it used 8042 as a co-
processor on the mainboard, communicating with the keyboard. The 8042 is still present in
almost each and every PC even today, but don't search for a chip with "8042" on it - it is
integrated in the chipset. It may come as a surprise to somebody, but thanks to this fact the
8048 with its derivatives is most probably the most widespread microcontroller at all.
As in the 70s there were no pdf-s and no world-wide web, datasheets and other
documentation is hardly available over the internet. I believe Intel will give out a copy if one
really wants it (there is a "literature request" form at their "museum" pages). However, there
The extensions included code and data memory extended to 64kB with appropriate support in
instruction set and registers (DPTR), relative conditional and unconditional jumps
(conditionals and DJNZ were constrained within a 256-byte page in 8048), four register banks
instead of two, "unlimited" stack (8048 had stack limited to 16 bytes), multiple and divide
instructions. As for peripherals, second timer was added and both were extended to 16 bits
with multiple modes (including 8-bit autoreload mode), and an UART (which was a luxury
that many lower-end
microcontrollers didn't have even a couple of years ago). The raw clock frequency did not
increase considerably, being 12MHz, but an instruction cycle is 12 clocks now.
Similarly to 8048, also the 8051 had variants, but there was no cut-down "low-cost" version
(presumably because of the cost of ROM/RAM and the DIP40 package went low enough).
The romless version was 8031 and the EPROM version was 8751. The "extended" version -
8052 (with 8032 and 8752) came 3 years later and featured besides 8kB ROM and 256B
RAM also an extra 16-bit timer. An unusual chip was the 8052AH-BASIC, which according
to Intel was "software-onsilicon version of the 8052 microcontroller with a BASIC interpreter
on-chip in 8K ROM". The
whole family was eventually called MCS-51 and was manufactured in NMOS, since 1986 in
CMOS.
Intel provided all the needed initial tools and support with the 8051 - assembler, application
notes, example software, in-circuit emulator. Some of the appnotes and software still can be
found on Intel's webpages and are of excellent quality. The basic datasheet set - dubbed in the
community as "the bible" - is still THE reference source of information on 8051 and its
derivatives, even today.
So, Intel did its job, providing everything needed to make 8051 successful, and the rest is
history.
The licensees started to make fully compatible models. Naturally, they took over also the
datasheets, for example the "bible" is better used in the Philips version, which is a verbatim
copy of the Intel version, except that it is a true searchable pdf, while the Intel is a scanned
copy of paper document, unsearchable. More than that, the manufacturers took over the
annoying practice of Intel to include in datasheets only the specific differences to the "bible",
very confusing for the newbies (but there are opinions on this, some of the users consider this
arrangement
better than having huge datasheets containing all the “common” details). The manufacturers
published their own appnotes, which all together form a huge knowledge base and code
library, but... due to competition it is scattered across the manufacturers' sites, an another
confusing fact for the newbies.
Later, the manufacturers rolled out their own derivatives and variants with varying marking -
there is no real standard in it (although there are some idiosyncrasies present in the marking
of most manufacturers). All types of modifications described in the following chapters were
applied; but the compatibility to the original 8051 was usually maintained. This, together with
EMBEDDED IN EMBEDDED
Intel and the licensees soon realized that 8051 is a nice core that can be embedded in various
ASIC chips to perform setup and control tasks. Typically, the resources of the ASIC are
mapped as external data memory, as if the ASIC would be connected to a conventional 8051
chip. This approach allows to use an unmodified core, which speeds up the chip development
and decreases the chance for error; also the ASIC could be breadboard-prototyped in this
form easily.
As an example, Intel produced 80C51SL, a descendant of 8042. Philips has a line of 8051-
based teletext controllers. In a particular USB webcamera, the chip interfacing the CCD and
USB was controlled by an embedded 8051. There are probably much more examples around,
but most of them never get public. In spite of this, the 8051 in this form is produced probably
in much higher volumes than as general-purpose microcontrollers.
EXTRAS
Besides application-specific, also general purpose derivatives have been introduced by Intel
and the licensees, with enhanced features and increased code and data memories. In contrast
with the ASICs mentioned above, these chips tend to implement the extra features in the core
itself, accessed usually via extra SFRs. This allows faster code as SFRs are accessed by all the
instructions using direct addressing (mov, logic), and some of them by the bit-manipulation
instructions, too.
One of the first such derivative by Intel was the 80C51FA, which introduced the
programmable counter array (PCA) (and was a 8052 otherwise). It was intended for
automotive applications (brake control). Soon, FB and FC continued, with more and more
code memory. 80C51RA/RB/RC followed, with added "internal external" data memory.
These were the basis for the today's 89C51RD2 "sub-family", produced by Philips, Atmel (as
ex-Temic), SST and Winbond.
Intel addressed the problem by introducing 80C251. It went all the way to achieve
compatibility - it was able to run 8051 binary code (being able to switch to native 16-bit 251-
mode) and had a package pin-compatible with 8051. It was not a big success, most probably
for bad market timing (although it is second sourced by Temic/Atmel).
Philips on the other hand employed source-compatibility for its XA family, which seems to
be adequate for most of the applications, where legacy code has to be maintained or parallel
development with 8051 is needed; and poses little constraint on the chip design itself.
All in all, the 16-bit versions of 8051 gained far less popularity than the 8051 and are less
widespread.
Today, virtually all manufacturers produce 8051 derivatives with Flash, most of them able to
be programmed via some few-pin serial interface (called in-situ programming (ISP), SPI-style
or UART-style) and the higher-end versions also able to reprogram themselves (in-
application programming, IAP). MaskROM and EPROM - windowed or OTP - seems to
become extinct, at least in the mainstream applications.
CHAPTER 3
P.C.B. DESIGNING & WORKING
1) P.C.B. DESIGNING
P.C.B. LAYOUT
The entire circuit can be easily assembled on a general purpose P.C.B. board respectively.
Layout of desired diagram and preparation is first and most important operation in any printed
circuit board manufacturing process. First of all layout of component side is to be made in
accordance with available components dimensions.
The following points are to be observed while forming the layout of P.C.B.
3. The most important points are that the components layout is making proper
compromise with copper side circuit layout.
Printed circuit board (P.C.B.s) is used to avoid most of all the disadvantages of conventional
breadboard. These also avoid the use of thin wires for connecting the components; they are
small in size and efficient in performance.
DRILLING
After completion of painting work, holes 1/23inch(1mm) diameter are drilled at desired
points where we have to fix the components.
ETCHING
The removal of excess of copper on the plate apart from the printed circuit is known as
etching. From this process the copper clad board wit printed circuit is placed in the solution of
FeCl with 3-4 drops of HCL in it and is kept so for about 10 to 15 minutes and is taken out
when all the excess copper is removed from the P.C.B.
After etching, the P.C.B. is kept in clean water for about half an hour in order to get P.C.B.
away from acidic, field, which may cause poor performance of the circuit. After the P.C.B.
has been thoroughly washed, paint is removed by soft piece of cloth dipped I thinner or
turbine. Then P.C.B. is checked as per the layout, now the P.C.B. is ready for use.
SOLDERING
Soldering is the process of joining two metallic conductor the joint where two metal
conductors are to be join or fused is heated with a device called soldering iron and then as
allow of tin and lead called solder is applied which melts and converse the joint. The solder
cools and solidifies quickly to ensure is good and durable connection between the jointed
metal converting the joint solder also present oxidation.
Mass soldering.
2) WORKING OF PROJECT
3) BLOCK DIAGRAM
LCD
DTMF Decoder Microcontroller Display
(MM8870) AT89C2051
EEPROM
MOBILE PHONE (24C16)
4) CIRCUIT DIAGRAM
CHAPTER 4
COST ANALYSIS & TROUBLESHOOTING
2 IC MT8870DE 1 80
3 IC ATMEL AT24C16 1 85
6 Transformer 1 60
7 Crystal Oscillator 2 10
8 Switch 2 8
9 LED 2 6
10 Resistors(1KΩ,10KΩ,47kΩ,100KΩ,330kΩ,) 10 15
11 Capacitors(22pf,.1µf,10µf,470µf,1000µf) 17 25
12 Diodes 5 10
TOTAL 629
PROBLEM FACED
First problem that was in making the circuit of METRO TRAIN PROTOTYPE that, it is
difficult to match time with rotation of stepper motor & LCD.
Second problem is faced due to redundancy in handling the rotation of STEPPER MOTOR
We have to take extra care while soldering 2 line LCD
During soldering, many of the connection become short cktd. So we desolder the
connection and did soldering again.
A leg of the crystal oscillator was broken during mounting. So it has to be replaced.
LED`s get damaged when we switched ON the supply so we replace it by the new
one.
TROUBLESHOOT
CHAPTER 5
CONCULSION
FUTURE SCOPE
AREA OF APPLICATIONS
Fast track voting which could be used in small scale elections, like resident welfare
association, “panchayat” level election and other society level elections.
It could also be used to conduct opinion polls during annual share holders meeting.
It could also be used to conduct general assembly elections where number of
candidates are less than or equal to eight in the current situation.
It is used in various TV serials as for public opinion.
REFRENCES
Tutorial on microcontroller:
www.8051projects.net/microcontroller_tutorials/
Tutorial on LCD:
www.8051projects.net/lcd-interfacing/
WEBSITES
www.atmel.com
www.seimens.com
www.howstuffworks.com
www.alldatasheets.com
www.efyprojects.com
www.google.com
www.eci.gov.in/Audio_VideoClips/presentation/EVM.ppt
www.rajasthan.net/election/guide/evm.htm
www.indian-elections.com/electoralsystem/electricvotingmachine.html
APPENDIX
CODING
SOFTWARE:-
#include<8051.h>
#include<intrpt.h>
#include<conio.h>
#include<stdio.h>
#include<delay.h>
#include<e2prom16.h>
#include<lcd4bit.h>
#define DTMF_PORT P1
#define DTMF_READY P3_BITS.B2
#define TIMER0_INT ET0
#define DELAY1 (65536 - 50000)
#define RESET_KEY P2_BITS.B7
void interrupt dtmf_isr(void);
void interrupt timer0_isr(void);
void on_ack(void);
void off_ack(void);
const char msg_1[] = {"***WELCOME TO***"};
const char msg_2[] = {" MOBILE VOTING. "};
const char msg_3[] = {" TOTAL VOTE "};
const char msg_4[] = {"CANDIDATE-1 VOTE"};
const char msg_5[] = {"CANDIDATE-2 VOTE"};
const char msg_6[] = {"CANDIDATE-3 VOTE"};
const char msg_7[] = {"CANDIDATE-4 VOTE"};
void main()
{
P0 = 0xff;
P1 = 0xff;
P2 = 0xff;
P3 = 0xff;
VoteTotal = 0;
VoteC1 = 0;
VoteC2 = 0;
VoteC3 = 0;
VoteC4 = 0;
ACK_SIGNAL = OFF;
DTMF_READY = ON;
DTMF_PORT = 0xff;
DTMF_INT = 0;
ET0 = 0;
ET1 = 0;
TR0 = 0;
do
{
if(!RESET_KEY)
{
Timer = 50;
while((Timer > 0) && (!RESET_KEY));
if(Timer == 0)
{
wr_lcd_cmd(LINE1);
wr_lcd_data(msg_14[]);
wr_lcd_cmd(LINE2);
wr_lcd_data(msg_15[]);
for(data_add = 0;data_add < 255;data_add++)
{
write_eprom(0x00,data_add,0x00);
}
}
}
if(!TOTAL_KEY)
{
VoteC1 = 0;
VoteC2 = 0;
VoteC3 = 0;
VoteC4 = 0;
VoteTotal = 0;
for(data_add = 0;data_add < 100;data_add++)
{
data_status = read_eprom(0x00,data_add);
if(data_status == 1)
{
VoteC1++;
VoteTotal++;
}
else
if(data_status == 2)
{
VoteC2++;
VoteTotal++;
}
else
if(data_status == 3)
{
VoteC3++;
VoteTotal++;
}
else
if(data_status == 4)
{
VoteC4++;
VoteTotal++;
}
}
wr_lcd_cmd(LINE1);
wr_lcd_data("C1 = ");
wr_lcd_data(VoteC1);
wr_lcd_data(", C2 = ");
wr_lcd_data(VoteC2);
wr_lcd_cmd(LINE2);
wr_lcd_data("C3 = ");
wr_lcd_data(VoteC3);
wr_lcd_data(", C4 = ");
wr_lcd_data(VoteC4);
Timer = 100;
while(Timer);
wr_lcd_cmd(LINE1);
wr_lcd_data(msg_3[mi]);
wr_lcd_cmd(LINE2);
wr_lcd_data(VoteTotal);
Timer = 50;
while(Timer);
}
if(dtmf_sts == 1)
{
dtmf_sts = 0;
}
}
while((Timer > 0) && (dtmf_sts == 0));
if(Timer > 0)
{
if(dtmf_sts == 1)
{
dtmf_sts = 0;
Data4 = dtmf_data;
DataCounter++;
}
}
while((Timer > 0) && (dtmf_sts == 0));
if(Timer > 0)
{
if(dtmf_sts == 1)
{
dtmf_sts = 0;
Data5 = dtmf_data;
DataCounter++;
}
}
if(DataCounter == 5)
{
if((Data1 == 12) && (Data5 == 12))
{
if((Data4 > 0) && (Data4 < 5))
{
if(Data2 == 10)
{
Data2 - = 10;
}
data_add = Data2 * 10;
data_add += Data3;
if((data_add > 0) && (data_add < 100))
{
data_status =
read_eprom(0x00,data_add);
if(data_status == 0)
{
write_eprom(0x00,data_add,Data4);
DataCounter = 0;
}
}
}
}
}
wr_lcd_data(msg_11[]);
DataCounter = 0;
BUZZER = BUZZER_ON;
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
off_ack();
BUZZER = BUZZER_OFF;
}
else
{
wr_lcd_cmd(LINE1);
wr_lcd_data(msg_12[]);
wr_lcd_cmd(LINE2);
wr_lcd_data(msg_13[]);
off_ack();
Timer = 50;
while(Timer);
}
}
wr_lcd_cmd(LINE1);
wr_lcd_data(msg_1[]);
wr_lcd_cmd(LINE2);
wr_lcd_data(msg_2[]);
}while(1);
}
}
TL0 = DELAY1 & 0x0f;
TH0 = DELAY1/256;
}
void on_ack(void)
{
unsigned char i,j;
for(i=0;i<255;i++)
for(j=0;j<50;j++);
for(i=0;i<255;i++)
{
for(j=0;j<70;j++);
ACK_SIGNAL = ~ACK_SIGNAL;
}
ACK_SIGNAL = OFF;
}
void off_ack(void)
{
unsigned char i,j;
for(i=0;i<255;i++)
for(j=0;j<50;j++);
for(i=0;i<255;i++)
{
for(j=0;j<70;j++);
ACK_SIGNAL = ~ACK_SIGNAL;
}
ACK_SIGNAL = OFF;
for(i=0;i<255;i++)
for(j=0;j<50;j++);
for(i=0;i<255;i++)
{
for(j=0;j<70;j++);
ACK_SIGNAL = ~ACK_SIGNAL;
}
ACK_SIGNAL = OFF;
}