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Structured Digital Design Syllabus Jntuk 4-2 Ece

This document outlines the course structure and content for a Structured Digital Design course using VHDL and Verilog. The course is divided into 8 units that cover digital design concepts, VHDL, combinational and sequential logic design using VHDL, Verilog, and digital logic circuit examples and testing using CAD tools. Topics include digital design methodology, VHDL architecture and data types, combinational circuits like multiplexers and arithmetic circuits, sequential circuits like flip-flops and counters, behavioral and dataflow modeling in Verilog, and logic synthesis and testing.

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2K views3 pages

Structured Digital Design Syllabus Jntuk 4-2 Ece

This document outlines the course structure and content for a Structured Digital Design course using VHDL and Verilog. The course is divided into 8 units that cover digital design concepts, VHDL, combinational and sequential logic design using VHDL, Verilog, and digital logic circuit examples and testing using CAD tools. Topics include digital design methodology, VHDL architecture and data types, combinational circuits like multiplexers and arithmetic circuits, sequential circuits like flip-flops and counters, behavioral and dataflow modeling in Verilog, and logic synthesis and testing.

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vasantha_btech
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© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY KAKINADA IV Year B. Tech. Electron c! an" Co##$n cat on En% neer n% & II Se#.

STRUCTURED DIGITAL DEIGN 'Elect (e)III* UNIT)I+ INTRODUCTION TO HDL De! %n Conce,t!+ The Design process, Design o Digital hardware, Introduction to Logic Circuits, Introduction to CAD Tools, Introduction to VHDL, Introduction to Digital Design methodology, Design Methodology, Introduction to Verilog. UNIT)II+ DIGITAL LOGIC DESIGN USING VHDL Introduction, designing with VHDL, design entry methods, logic synthesis, entities, architecture, packages and con igurations, types o models! data low, "eha#ioral, structural, signals #s. #aria"les, generics, data types, concurrent #s. se$uential statements, loops and program controls. UNIT)III +CO-BINATIONAL LOGIC CIRCUIT DESIGN USING VHDL Com"inational circuits "uilding "locks Multiple%ers, Decoders, &ncoders, code con#erters, Arithmetic comparison circuits, VDHL or com"inati'onal circuits, Address ( Hal Adder, )ull Adder, *ipple+ Carry Adder, Carry Look ( Ahead Adder, ,u"traction, multiplication . UNIT)IV + SE.UENTIALLOGIC CIRCUIT DESIGN USING VHDL )lip+ lops, registers - counters, synchronous se$uential circuits. /asic design steps, mealy ,tate model, Design o ),M using CAD tools, ,erial Adder &%ample, ,tate Minimi0ation, Design o counter using se$uential Circuit approach UNIT)V+ DIGITAL LOGIC CIRCUIT DESIGN USING VERILOG Verilog Data types and 1perations, /inary data manipulation, Com"inational and ,e$uential logic design, ,tructural Models o Com"inational Logic, Logic simulation, Design Veri ication and Test methodology, propagation Delay, Truth Ta"le models o com"inational and se$uential logic using Verilog, Verilog or com"inational circuits. UNIT)VI + DIGITAL LOGIC CIRCUIT DESIGN E/A-0LES USING VERILOG /eha#ioral modeling, Data types, /oolean+ &$uation+ "ased "eha#ioral models o com"inational logics, 2ropagation delay and continuous assignments, latches and le#el+ sensiti#e circuits in Verilog , Cyclic "eha#ioral models o lip+ lops and latches and &dge detection, comparison o styles or "eha#ioral model! "eha#ioral model, Multiple%ers, &ncoders and Decoders, Counters ,hi t register, register iles, Data low models o a linear eed"ack ,hi t register, Machines with multi cycle operations, A,M and A,MD charts or "eha#ioral modeling, Design e%amples, 3eypad scanner ad encoder. UNIT)VII+ SYNTHESIS O1 DIGITAL LOGI CIRCUIT DESIGN

Introduction to ,ynthesis, ,ynthesis o com"inational logic, ,ynthesis o se$uential logic with latches and lip+ lops, ,ynthesis o &%plicit and implicit ,tate Machines *egisters and counters. UNIT)VIII+ TESTING DIGITAL LOGIC CIRCUITS AND CAD TOOLS Testing o logic circuits, ault model, comple%ity o a test set path sensiti0ation, circuits with tree structure, random tests, testing o se$uential circuits, "uilt in sel test, printed circuit "oards, computer aided design tools, synthesis, physical design. TEST BOOKS+ 4. ,tephen /rown - 5#onko Vranesic, 6)undamentals o Digital logic deign with VDHL7, Tata Mc8raw Hill, 9nd &dition. 9. Michael D. Ciletti, 6Ad#anced digital design with Verilog HDL7, &astern economy edition, 2HI

RE1ERENCES+ 4. Ian 8rout, 6Digital systems design with )28As and C2LDs7 &lse#ier 2u"lications. 9. ,tephen /rown - 5#onko Vranesic, 6)undamentals o Digital logic with Verilog design7, Tata Mc8raw Hill, 9nd &dition :. /haskar, 6VHDL 2rimer7, :rd &dition, 2HI 2u"lications.

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