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Ps 2 Keyboard Controller

The document discusses VHDL code for a PS/2 keyboard controller. The code follows a state machine format and closely matches a state diagram. It reads in 8 data bits from the keyboard and packages them as a byte for output.

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Sohei La
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305 views

Ps 2 Keyboard Controller

The document discusses VHDL code for a PS/2 keyboard controller. The code follows a state machine format and closely matches a state diagram. It reads in 8 data bits from the keyboard and packages them as a byte for output.

Uploaded by

Sohei La
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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10.

1 VHDL for Control Units


The following shows the behavioral VHDL code for the PS/2 keyboard controller. The format follows exactly the VHDL code for Moore FSMs discussed in Section 7.6. Notice how closely the code for the FSM process follows the state diagram. Because of its simplicity, control units usually are synthesized this way rather than constructed manually. For this example, the output process does not generate output signals to control the keyboard; rather, it reads in data signals from the keyboard and packages the eight data bits as a byte for output. LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY KeyboardCtrl IS PORT ( Reset: IN STD_LOGIC; KeyboardClock: IN STD_LOGIC; KeyboardData: IN STD_LOGIC; keycode: OUT STD_LOGIC_VECTOR(7 DOWNTO 0)); END KeyboardCtrl ; ARCHITECTURE Behavioral OF KeyboardCtrl IS TYPE state_type IS ( s_start,s_d0,s_d1,s_d2,s_d3,s_d4,s_d5,s_d6,s_d7,s_parity,s_stop); SIGNAL state: state_type; BEGIN FSM: PROCESS(KeyboardClock, Reset) BEGIN IF (Reset = '1') THEN state <= s_start; -- this FSM is driven by the keyboard clock signal ELSIF (KeyboardClock'EVENT AND KeyboardClock = '1') THEN CASE state is WHEN s_start => state <= s_d0; WHEN s_d0 => state <= s_d1; WHEN s_d1 => state <= s_d2; WHEN s_d2 => state <= s_d3; WHEN s_d3 => state <= s_d4; WHEN s_d4 => state <= s_d5; WHEN s_d5 => state <= s_d6; WHEN s_d6 => state <= s_d7; WHEN s_d7 => state <= s_parity; WHEN s_parity => state <= s_stop; WHEN s_stop => state <= s_start;

WHEN OTHERS => END CASE; END IF; END PROCESS; output_logic: PROCESS (state) BEGIN CASE state IS WHEN s_d0 => keycode(0) <= KeyboardData; WHEN s_d1 => keycode(1) <= KeyboardData; WHEN s_d2 => keycode(2) <= KeyboardData; WHEN s_d3 => keycode(3) <= KeyboardData; WHEN s_d4 => keycode(4) <= KeyboardData; WHEN s_d5 => keycode(5) <= KeyboardData; WHEN s_d6 => keycode(6) <= KeyboardData; WHEN s_d7 => keycode(7) <= KeyboardData; WHEN OTHERS => END CASE; END PROCESS; END Behavioral; VHDL code for the PS/2 keyboard controller.

-- read in data bit 0 from the keyboard -- read in data bit 1 from the keyboard -- read in data bit 2 from the keyboard -- read in data bit 3 from the keyboard -- read in data bit 4 from the keyboard -- read in data bit 5 from the keyboard -- read in data bit 6 from the keyboard -- read in data bit 7 from the keyboard

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