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Main Code For Lab 6 442

This code initializes 3 EPWM modules to generate PWM signals on different GPIO pins in order to control the color and brightness of an RGB LED. It defines the PWM period and initial duty cycles. In a loop, it updates the duty cycles over time to change the color, and updates the EPWM registers to change the PWM outputs.

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William Huang
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0% found this document useful (0 votes)
245 views

Main Code For Lab 6 442

This code initializes 3 EPWM modules to generate PWM signals on different GPIO pins in order to control the color and brightness of an RGB LED. It defines the PWM period and initial duty cycles. In a loop, it updates the duty cycles over time to change the color, and updates the EPWM registers to change the PWM outputs.

Uploaded by

William Huang
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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#include "DSP28x_Project.

h" // Device Headerfile and Examples Include File //Timer Period for 20kHz #define EPWM_TIMER_TBPRD 2999; void InitEPwm1Example(void); void InitEPwm2Example(void); void InitEPwm7Example(void); //Initial Duty Cycle int16 duty_cycle1 = 250; int16 duty_cycle2 = 500; int16 duty_cycle3 = 750; //Duty Cycles and Sector int16 duty_red = 100; int16 duty_green = 0; int16 duty_blue = 0; int16 sector = 0; void main() { InitSysCtrl(); DINT; InitPieCtrl(); IER = 0x0000; IFR = 0x0000; InitPieVectTable(); //########################################################################### // User specific code: //########################################################################### EALLOW; //Set GPIO0,GPIO2,GPIO41 as an output, Mux to PWM pins GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; GpioCtrlRegs.GPADIR.bit.GPIO0 = 1; GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; GpioCtrlRegs.GPADIR.bit.GPIO2 = 1; GpioCtrlRegs.GPBMUX1.bit.GPIO41 = 1; GpioCtrlRegs.GPBDIR.bit.GPIO41 = 1; //Disable EPWM CLK to syncronize clks SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0; EDIS; //Initialize EPWM modules InitEPwm1Example(); InitEPwm2Example(); InitEPwm7Example(); //Enable EPWM clk EALLOW; SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; EDIS; EINT; for(;;){ //Delay .2 s DELAY_US(200000);

//Sector duty cycle math if(sector == 0) { duty_red -= 10; duty_green += 10; } if(sector == 1) { duty_blue += 10; duty_green -= 10; } if(sector == 2) { duty_blue -= 10; duty_red += 10; } //Change Operation Sectors when the end coniditons are met if(duty_red == 0 && duty_green == 100) sector = 1; if(duty_green == 0 && duty_blue == 100) sector = 2; if(duty_blue == 0 && duty_red == 100) sector = 0; //Update EPWM Duty Cycle EPwm1Regs.CMPA.half.CMPA = duty_green * 30; EPwm2Regs.CMPA.half.CMPA = duty_blue * 30; EPwm7Regs.CMPB = duty_red * 30; }

} //###################### End of main code ####################### void InitEPwm1Example() { // Setup TBCLK EPwm1Regs.TBCTL.bit.CTRMODE = 0; // Count up EPwm1Regs.TBPRD = EPWM_TIMER_TBPRD; // Set timer period EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT EPwm1Regs.TBCTL.bit.CLKDIV = 0; // Setup shadow register load on EPwm1Regs.CMPCTL.bit.SHDWAMODE = EPwm1Regs.CMPCTL.bit.SHDWBMODE = EPwm1Regs.CMPCTL.bit.LOADAMODE = EPwm1Regs.CMPCTL.bit.LOADBMODE = // Set Compare values EPwm1Regs.CMPA.half.CMPA = //Compare B is not used ZERO CC_SHADOW; CC_SHADOW; CC_CTR_ZERO; CC_CTR_ZERO;

duty_cycle1;

// Set compare A value

// Set actions EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET; EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR; } void InitEPwm2Example() { // Setup TBCLK EPwm2Regs.TBCTL.bit.CTRMODE = 0;

// Set PWM1A pin on Zero // Clear PWM1A pin on event A, up count

// Count up

EPwm2Regs.TBPRD = EPWM_TIMER_TBPRD; // Set timer period EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT EPwm2Regs.TBCTL.bit.CLKDIV = 0; // Setup shadow register load on EPwm2Regs.CMPCTL.bit.SHDWAMODE = EPwm2Regs.CMPCTL.bit.SHDWBMODE = EPwm2Regs.CMPCTL.bit.LOADAMODE = EPwm2Regs.CMPCTL.bit.LOADBMODE = // Set Compare values EPwm2Regs.CMPA.half.CMPA = //Compare B is not used ZERO CC_SHADOW; CC_SHADOW; CC_CTR_ZERO; CC_CTR_ZERO;

duty_cycle2;

// Set compare A value

// Set actions EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET; EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR; }

// Set PWM1A pin on Zero // Clear PWM1A pin on event A, up count

void InitEPwm7Example() { // Setup TBCLK EPwm7Regs.TBCTL.bit.CTRMODE = 0; // Count up EPwm7Regs.TBPRD = EPWM_TIMER_TBPRD; // Set timer period EPwm7Regs.TBCTL.bit.HSPCLKDIV = 0; // Clock ratio to SYSCLKOUT EPwm7Regs.TBCTL.bit.CLKDIV = 0; // Setup shadow register load on EPwm7Regs.CMPCTL.bit.SHDWAMODE = EPwm7Regs.CMPCTL.bit.SHDWBMODE = EPwm7Regs.CMPCTL.bit.LOADAMODE = EPwm7Regs.CMPCTL.bit.LOADBMODE = // Set Compare values EPwm7Regs.CMPB = duty_cycle3; //Compare A is not used // Set actions EPwm7Regs.AQCTLB.bit.ZRO = AQ_SET; EPwm7Regs.AQCTLB.bit.CBU = AQ_CLEAR; } ZERO CC_SHADOW; CC_SHADOW; CC_CTR_ZERO; CC_CTR_ZERO;

// Set compare B value

// Set PWM7B pin on Zero // Clear PWM1A pin on event B, up count

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