Scribd
Upload
77 views

Figures TX Mri

This document discusses the design and simulation results of a direct digital synthesis (DDS) system. It presents the design of single and multi-core DDS modules, including a 2GHz phase accumulator, sine lookup table, and DAC. Simulation waveforms are shown for a 15MHz single-core DDS, 15MHz output from an 8-core DDS, and the phase of a 64MHz signal from the multi-core DDS system.

Uploaded by

Uday Kumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
77 views

Figures TX Mri

This document discusses the design and simulation results of a direct digital synthesis (DDS) system. It presents the design of single and multi-core DDS modules, including a 2GHz phase accumulator, sine lookup table, and DAC. Simulation waveforms are shown for a 15MHz single-core DDS, 15MHz output from an 8-core DDS, and the phase of a 64MHz signal from the multi-core DDS system.

Uploaded by

Uday Kumar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 6

FIGURES & RESULTS:

PHASE OFFSETS


2GHZ PHASE ACCUMULATOR

SINE LUT MODULE

2GHZ DAC MODULE(MOCK)

RESULTS:


Simulation of 15 MHz single Core DDS


Phase of 15 MHz single Core DDS

RTL Schematic of DDS Single Core


Simulation Results of Single DDS Core using Xilinx ISE


15MHZ Sinusoidal output from DAC(Multi DDS)

15MHZ Output Phase of Sinusoidal Signal(Multi DDS)


RTL Schematic of 8 core DDS System

Simulation Results of 8 Core DDS System using Xilinx ISE


Simulation of 64 MHz signal

Phase of 64 MHz signal

You might also like