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CH16 Sequential Circuit Design

The document discusses the design of sequential circuits. It covers the design process for a code converter circuit including state table reduction and implementation. It also discusses designing iterative circuits like a comparator and implementing sequential circuits using ROMs and PLAs.

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dasari_reddy
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144 views

CH16 Sequential Circuit Design

The document discusses the design of sequential circuits. It covers the design process for a code converter circuit including state table reduction and implementation. It also discusses designing iterative circuits like a comparator and implementing sequential circuits using ROMs and PLAs.

Uploaded by

dasari_reddy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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ACCESS IC LAB

Graduate Institute of Electronics Engineering, NTU


CH16 Sequential Circuit Design
CH16 Sequential Circuit Design
Lecturer!"#
Date2005/12/30
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Outline
Outline
v 16.1 Summary of Design Procedure for
Sequential Circuits
v 16.2 Design Example-Code Converter
v 16.3 Design of Iterative Circuits
Design of a Comparator
v 16.4 Design of Sequential Circuits Using
ROMs and PLAs
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design Example
Design Example
-
-
Code Converter
Code Converter
v Adds 3 to BCD code (0~9)
v Serial I/O with the LSB first
v x
0
x
1
x
2
x
3
v z
0
z
1
z
2
z
3
v Reset to initial state after
receiving four inputs
Code
Converter
x
3
x
2
x
1
x
0
z
3
z
2
z
1
z
0
t
3
t
2
t
1
t
0
t
3
t
2
t
1
t
0
X = (x
3
x
2
x
1
x
0
), Z = (z
3
z
2
z
1
z
0
)
BCD code Excess-3 code
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design Example
Design Example
-
-
Code Converter
Code Converter
v State Table for Code
Converter
v State Graph for Code
Converter
step1
Step2:
Reduce the table using row matching
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Serial Code Converter
Serial Code Converter
v Reduced State Table for Code Converter
G F
G F E
L K J I
L K J I H
P N
P N M
, eliminate
, , , eliminate
, eliminate


step2
After elimination, the state table reduces to 7 rows.
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Serial Code Converter
Serial Code Converter
v ImplementationAssignment Map and Transition Table for Flip-Flops
v 7 states 3 flip-flops are required
step3~4
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design Example
Design Example
-
-
Code Converter
Code Converter
v ImplementationK-Maps for Code Converter Design
step5
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design Example
Design Example
-
-
Code Converter
Code Converter
v ImplementationCode Converter Circuit
step6
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Outline
Outline
v 16.1 Summary of Design Procedure for
Sequential Circuits
v 16.2 Design Example-Code Converter
v 16.3 Design of Iterative Circuits
Design of a Comparator
v 16.4 Design of Sequential Circuits Using
ROMs and PLAs
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Iterative Circuits
Design of Iterative Circuits
v Unilateral Iterative Circuit
Regular structure
Parallel-input, parallel-output
Xiinput , Zioutput
a
i+1
a
i
(state)
Unilateral Iterative Circuit is very similar to the design of a sequential circuit
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of a comparator
Design of a comparator
v Form of Iterative Circuit for Comparing Binary Numbers
X = { x
1
x
2
.....x
n
}
Y = { y
1
y
2
.....y
n
} x
1
,y
1
MSB (most significant bit)
time t
1
t
2
t
n
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of a comparator
Design of a comparator
v State Table for comparator
v Transition Table for Comparator
step1
Z1X<Y
Z2X=Y
Z3X>Y
3 states, assign:
S0 = 00
S1 = 01
S2 = 10
step3 step4
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of a comparator
Design of a comparator
v Typical cell for Comparator
v Output Circuit for Comparator
Step5~6
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of a comparator
Design of a comparator
v Complete Iterative Comparator Circuit Design
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Outline
Outline
v 16.1 Summary of Design Procedure for
Sequential Circuits
v 16.2 Design Example-Code Converter
v 16.3 Design of Iterative Circuits
Design of a Comparator
v 16.4 Design of Sequential Circuits Using
ROMs and PLAs
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Sequential Circuits Using Design of Sequential Circuits Using
ROMs and ROMs and PLAs PLAs
v Realize Converter using a ROM and D filp-flops
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Sequential Circuits Using Design of Sequential Circuits Using
ROMs and ROMs and PLAs PLAs
v ROM contents
Input
Address
ROM
a
3
a
2
a
1
a
0
Z D
1
D
2
D
3
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Sequential Circuits Using Design of Sequential Circuits Using
ROMs and ROMs and PLAs PLAs
v Implementation (using D flip-flops)
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Sequential Circuits Using Design of Sequential Circuits Using
ROMs and ROMs and PLAs PLAs
v Design Using PLAs (Code Converter)
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Sequential Circuits Using Design of Sequential Circuits Using
ROMs and ROMs and PLAs PLAs
v Design Using PLAs (Code Converter)
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Sequential Circuits Using Design of Sequential Circuits Using
ROMs and ROMs and PLAs PLAs
v PLA contents
Q
2

Q
1
Q
2
Q
3
XQ
3

XQ
3
AND plane OR plane
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Design of Sequential Circuits Using Design of Sequential Circuits Using
ROMs and ROMs and PLAs PLAs
v PLA Implementation Example
Graduate Institute of Electronics Engineering, NTU
!"# $%& '(
Summary of Design Procedure for Summary of Design Procedure for
Sequential Circuits Sequential Circuits
1. Given the problem statement, determine the relationship
between input and output. Derive a state table (graph).
2. Reduce the table to a minimum number of states.
3. Assign a unique combination of flip-flop states to correspond to
each state in the reduced table.
4. Form the transition table.
5. Plot next-state maps and input maps for each flip-flop. Derive
the flip-flop input equations. Derive the output equations.
6. Realize the flip-flop input equations and the output equations.
7. Check your design by signal tracing, computer simulation,
or laboratory testing.

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