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Misrimal Navajee Munoth Jain Engineering College: Thoraipakkam, Chennai-600 097

This document is a laboratory record from Misrimal Navajee Munoth Jain Engineering College in Chennai, India. It contains information about a student including their name, class, and registration number. It is certified by the faculty in charge and head of the department. The record documents 14 experiments the student completed, including studying Xilinx ISE 9.1i, FPGA design flow, schematic entry, simulation and implementation of combinational and sequential circuits, SPICE simulation of CMOS inverter and differential amplifier, layout of a CMOS inverter, and design/simulation of a 10-bit number controlled oscillator.

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Venugopal Ponnuraj
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30 views

Misrimal Navajee Munoth Jain Engineering College: Thoraipakkam, Chennai-600 097

This document is a laboratory record from Misrimal Navajee Munoth Jain Engineering College in Chennai, India. It contains information about a student including their name, class, and registration number. It is certified by the faculty in charge and head of the department. The record documents 14 experiments the student completed, including studying Xilinx ISE 9.1i, FPGA design flow, schematic entry, simulation and implementation of combinational and sequential circuits, SPICE simulation of CMOS inverter and differential amplifier, layout of a CMOS inverter, and design/simulation of a 10-bit number controlled oscillator.

Uploaded by

Venugopal Ponnuraj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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MISRIMAL NAVAJEE MUNOTH JAIN

ENGINEERING COLLEGE
(Managed by Tamilnadu, Educational and Medical Trust)
Thoraipakkam, Chennai- 600 097.






LABORATORY RECORD


SUBJECT :
NAME : ...
CLASS :
ROLL No. :
MISRIMAL NAVAJEE MUNOTH JAIN
ENGINEERING COLLEGE
(Managed by Tamil Nadu, Educational and Medical Trust)
Thoraipakkam, Chennai 600 097


Name Class...
Register No. ... Branch ..



Certified that this a bonafide record of the work done by the above student in
the .. Laboratory during the year 2010-2011.




Signature of Faculty-in-Charge. Signature of Head of Dept.



Submitted for the Practical Examination held on ..

External Examiner Internal Examiner

Date :
INDEX

S.No.
Name of the Experiment

Date Page
Signature of
the faculty
1 Study of Xilinx ISE 9.1i
2 Study of XC3S400- Xilinx SPARTAN 3 FPGA
3 FPGA Design flow
4 Study of Simulation using XILINX ISE 9.1i
5 Study of Schematic entry using XILINX ISE 9.1i
6
Simulation and Implementation of Combinational
Circuits I

7
Simulation and Implementation of Combinational
Circuits II

8
Simulation and Implementation of Sequential
Circuits I

9
Simulation and Implementation of Sequential
Circuits II



10 Spice Simulation of CMOS Inverter
11
Spice Simulation of CMOS Differential
Amplifier

12 Layout of a CMOS Inverter
13
Design and Simulation of 10 Bit Number
Controlled Oscillator

14
Automatic Layout Generation of a 10 Bit
Number Controlled Oscillator

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