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Logic Design (Continued) : XOR Revisited

The document discusses logic gates and components including XOR, half adders, full adders, decoders, encoders, multiplexors, and demultiplexors. It provides truth tables and circuit diagrams for each component. It also provides examples of how to design more complex components using simpler ones, such as designing a full adder using two half adders or a 3-to-8 decoder using 1-2 decoders. Key applications mentioned include using decoders to select specific outputs and using multiplexors and demultiplexors for many-to-one and one-to-many switching.

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0% found this document useful (0 votes)
12 views

Logic Design (Continued) : XOR Revisited

The document discusses logic gates and components including XOR, half adders, full adders, decoders, encoders, multiplexors, and demultiplexors. It provides truth tables and circuit diagrams for each component. It also provides examples of how to design more complex components using simpler ones, such as designing a full adder using two half adders or a 3-to-8 decoder using 1-2 decoders. Key applications mentioned include using decoders to select specific outputs and using multiplexors and demultiplexors for many-to-one and one-to-many switching.

Uploaded by

doomachaley
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 7

Logic Design (continued)

XOR Revisited
XOR is also called modulo-2 addition.

A
0
0
0
0
1
1
1
1

B
0
0
1
1
0
0
1
1

C
0
1
0
1
0
1
0
1

F
0
1
1
0
1
0
0
1

1 A=A
0A=A

A B = 1 only when there are an


odd number of 1s in (A,B). The
same is true for A B C also.

Why?

Logic Design Examples

Half Adder

Half
Adder

S=A

Sum (S)

Carry (C)

C = A.B

A
Carry
B
Sum

Full Adder

Sum (S)
A
B

Full
Adder

Cin

S=A

Carry (Cout)

Cin

Cout

Cin

Cout = A.B + B.Cin + A.Cin

Design a full adder using two half-adders (and a


few gates if necessary)
Can you design a 1-bit subtractor?

Decoders
n

A typical decoder has n inputs and 2 outputs.


Enable

D3 D2 D1

D0

D0

D1

D2

D3

A 2-to-4 decoder and its truth table

D3 = A.B

Draw the circuit of this decoder.

D2 = A.B
D1 = A.B

The decoder works per specs

D0 = A.B

when (Enable = 1). When Enable = 0,


all the outputs are 0.

Exercise.

Design a 3-to-8 decoder.

Question. Where are decoders used?


Can you design a 2-4 decoder using 1-2 decoders?

Encoders
n

A typical encoder has 2 inputs and n outputs.

D0

D0 D1

D2 D3 A

D1

D2

D3

A 4-to-2 encoder and its truth table

A = D1 + D3
B = D2 + D3

Multiplexor

It is a many-to-one switch, also called a selector.

S = 0, F = A

S = 1, F = B

Specifications of the mux

Control S

A 2-to-1 mux

F = S. A + S. B

Exercise.

Design a 4-to-1 multiplexor using two 2-to-

1 multiplexors.

Demultiplexors

A demux is a one-to-many switch.

S = 0, X = A

S = 1, Y = A

A 1-to-2 demux, and its specification.

So, X = S. A, and Y = S. A

Exercise.

Design a 1-4 demux using 1-2 demux.

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