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Computer Architecture Experiment Lab 1: Warmup: Xiaohong Jiang

This document provides instructions for a computer architecture experiment involving a multicycle CPU. The experiment has two main tasks: 1) update Verilog code from a computer organization course to implement and test 9 MIPS instructions on a Spartan-3E board, and 2) implement a new MIPS branch instruction and test its correctness. It describes the purpose as a warmup exercise using skills from computer organization and the Spartan-3E board. It also lists the 9 MIPS instructions to implement and provides details on branch instructions and their formats.

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doomachaley
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Download as PDF, TXT or read online on Scribd
56 views

Computer Architecture Experiment Lab 1: Warmup: Xiaohong Jiang

This document provides instructions for a computer architecture experiment involving a multicycle CPU. The experiment has two main tasks: 1) update Verilog code from a computer organization course to implement and test 9 MIPS instructions on a Spartan-3E board, and 2) implement a new MIPS branch instruction and test its correctness. It describes the purpose as a warmup exercise using skills from computer organization and the Spartan-3E board. It also lists the 9 MIPS instructions to implement and provides details on branch instructions and their formats.

Uploaded by

doomachaley
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 8

Computer Architecture Experiment

Lab 1: Warmup

Xiaohong Jiang

Outline
Experiment

Purpose
Experiment Task
Basic Principle
Operating Procedures
Precaution

SF

CA_2013Spring_Lab

1.2

Experiment Purpose

SF

Warmup with what you have learned in the


course of Computer Organization
Try to use the ISE environment skillfully
Read the user guide of Sparten-3E board,
especially the part of LED displayer.

CA_2013Spring_Lab

1.3

Experiment Task

SF

Update your Verilog code in Computer


Organization to implement and test the
multicycle CPU with 9 instructions on Sparten3E.

Implement a new MIPS branch instruction and


test its correctness.

CA_2013Spring_Lab

1.4

The 9 MIPS instructions

SF

CA_2013Spring_Lab

1.5

Branch instructions
Example
instruction

Instruction
name

Meaning

Jump

PCname;
((PC+4)-225) name < ((PC+4)+225)

JAL name

Jump and link

Regs[31]PC+4; PCname;
((PC+4)-225) name < ((PC+4)+225)

JALR R2

Jump and link


register

Regs[31]PC+4; PCRegs[R2]

name

PC Regs[R3]

JR R3
BEQ R4, R5, name

Branch equal

If (Regs[R4]==Regs[R5]) PCname;
((PC+4)-225) name < ((PC+4)+225)

BNE R4, R5, name

Branch not
equal

If (Regs[R4] Regs[R5]) PCname;


((PC+4)-225) name < ((PC+4)+225)

SF

CA_2013Spring_Lab

1.6

Instruction format

SF

CA_2013Spring_Lab

1.7

Thanks!

SF

CA_2013Spring_Lab

1.8

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