02-AWC-SHILPI BANERJEE

AUTOMATIC PASSWORD BASED DOOR LOCK SYSTEM

Shilpi Banerjee, B-Tech, 4th year student, Guru Nanak Institute of Technology, Sodepur, Kolkata-700114
Saborni Das, B-Tech, 4th year student, Guru Nanak Institute of Technology
Sayani Sengupta, B-Tech, 4th year student, Guru Nanak Institute of Technology
Sarmistha Roy, B-Tech, 4th year student, Guru Nanak Institute of Technology
Soumika Ghosh, B-Tech, 4th year student, Guru Nanak Institute of Technology
Sucheta Routh, B-Tech, 4th year student, Guru Nanak Institute of Technology
Dibyendu Sur, Life Member FOSET, Member IEEE, Assistant Professor, Guru Nanak Institute of
Technology

Abstract

The necessity of a low cost electronic home security system designed in co-ordination with other
security measures is always there in our society to reduce the risk of home intrusion. Keeping
this problem in mind, we are working on a project on automatic password based door lock
system. We want to utilize the electronic technology to build an integrated and fully customized
home security system at a reasonable cost. We hope this project will be useful in keeping thieves,
dacoits and other sort of dangers at bay.
By using this system we can unlock the door by using pre-decided password, increase the
security level to prevent an unauthorized unlocking. In case the user forgets the combination of
password this system give the flexibility to the user to change or reset the password. This
automatic password based lock system will give user more secure yet cost-efficient way of
locking-unlocking system.
Firstly the user combination will be compared with prerecorded password stored in the system
memory. Our system will allow the user to go for certain number of wrong combinations before
the system will be temporarily disabled. But if user combination matches with the password, the
door will be unlocked. The same password can be used to lock the door. This system will give
the user an option to reset his own password if he wants.
Reasons For Choosing The Project

We want to make our final year project on something that will be useful in real life.
We all are aware of the fact that there has been a sharp increase in criminal offences like theft,
robberies, assaults, murders etc in the recent past that is affecting our society on a large scale. So
the requirement for a well equipped home security system is definitely on the rise.
We want to utilize the electronic technology to build an integrated and fully customized home
security system at a reasonable cost. We hope this project will be useful in keeping thieves,
dacoits and other sort of dangers at bay.

02-AWC-SHILPI BANERJEE

Objective

Unlock the door by using pre-decided password.

Increase the security level to prevent an unauthorized unlocking of the door.
Give the flexibility to the user to change or reset the password in case the user forgets that
combination.
Lock the door by using password( preferable the same password used for unlocking)
To give user more secure yet cost-efficient way of door locking-unlocking system.

Goal Of This Project

Our main object is to utilize the different electronic parts available in the market and
build an integrated home security system based on ICs, microcontroller and wireless technology
to give service at low cost compared to the cost of the conventional security system. We want to
make a system that will give 247 service by providing alert if there is a problem in the house.
Flow Chart Of Operation

02-AWC-SHILPI BANERJEE

Fig. 1. Flowchart of the proposed project

In this figure the first block is the AND gate where we gives two inputs 1) input combination
given the user 2) narrow width pulse. Mainly the input combination decides that the password
(which is stored in a 8-bit shift register) is either matched or not. We should allow the input
combination for a brief instant of time. So that the same input will be unable to trigger the
counter circuit more than once thus preventing our circuit getting disable by one erroneous
combination. So that we have to use narrow width pulses ANDed with input combination.
8 Bit Shift Register (74164)

Fig. 2. 8 Bit Shift Register (74164)

Digital Bitwise Magnitude Comparator Circuit

Comparison of two bit patterns (A7A6A5A4A3A2A1A0, B7B6B5B4B3B2B1B0) is obtained by using

XNOR gates. Because when a two input XNOR gate receive two inputs both are equal, it
produces 1 in its output, and 0 when two bits are unequal.
X Y = XY + XY

02-AWC-SHILPI BANERJEE

Fig 3. Digital Comparator Circuit

Digital Synchronous Up Counter

In synchronous up counter, the term Q1, Q2,.. called carry i.e. it is brought forward to each stage.
Carry must ripple through the successive and gates. It means that output of right most and gate
will not valid until the output of all preceding and gate will not valid. The propagation delays of
all and gates accumulated and this cumulative delay puts a limit on the counting speed of the
synchronous up counter. Last flip flop will be changed for every clock pulse may be it is positive
or negative edge according to what we are using. So, the last flip-flop j-k is permanently made 11. For the other flip flops are made conditionally made1-1. The condition of getting 1-1 is all its
right hand side flip-flop is 1-1. When the output of the last flip- flop is 1, it is applied to the
next flip flop. Again depending on the clock pulse the output of the flip flop changes. The output
of this flip flop and the previous flip flop is applied to the next. Only if the outputs are 1 of the
last two flip flops the output of the flip flop which is at the right side of the last two flip flops are
changed and this process is continuous for all the respective flip flops.

Fig. 4. synchronous up counter

J-K Flip-Flop

We use JK flip-flop to design a counter which is a refinement of the RS flip-flop in that the
indeterminate state of the RS type is defined in the JK type. Inputs J and K behave like inputs S
and R to set and clear the flip-flop. When inputs are applied to both J and K simultaneously, the
flip-flop switches to its complement state, that is, if Q=1, it switches Q=0, and vice versa.

02-AWC-SHILPI BANERJEE

A clocked JK flip-flop is shown the above Fig 5(a). Output Q is ANDed with K and CP inputs
so that the flip-flop is cleared during a clock pulse only if Q was previously 1. Similarly, output
Q is ANDed with J and CP inputs so that the flip-flop is set with a clock pulse only if Q was
previously 1.
As shown in the characteristic table in Fig 5(c), the flip-flop behaves like an RS flip-flop,
except when both J and K are equal to 1. When both J and K are 1, the clock pulse is transmitted
through one AND gate only the one whose input is connected to the flip-flop output which is
presently equal to 1. Thus, if q=1, the output of the upper AND gate becomes 1 upon application
of a clock pulse, and the flip-flop is cleared. If Q=1, the output of the lower AND gate becomes a
1 and the flip-flop is set. In either case, the output state of the flip-flop is complemented.
The inputs in the graphical symbol for the JK flip-flop must be marked with a J (under Q)
and K (under Q).

Fig. 5. J-K flip-flop

Edge Triggering In Flip-Flops

02-AWC-SHILPI BANERJEE

We use edge triggering for the each flip-flops in the digital counter so that the counter will only
be incremented in a short duration of time to avoid a single wrong combination to increase the
count value more than once. A clock pulse goes through two signal transitions from 0 to 1 and
returns from 1 to 0. As shown in Fig 6, a positive transition is defined as the positive edge and a
negative transition as the negative edge. This definition applies also to the negative pulses. The
term edge-triggered means that the flip-flop changes its state either at the positive edge (rising or
leading edge) or at the negative edge (falling or trailing edge) of the clock pulse and are sensitive
to its inputs only at this transition of the clock.

Fig 6. Definition of clock pulse transition

One way to make the flip-flop respond only to a pulse transition is to use capacitive coupling.
An R-C (resistor- capacitor) circuit must be inserted in the clock input of the flip-flop. By
deliberate design, the RC tine constant is much smaller than the clocks pulse width. Because of
this, the capacitor can charge fully when the clock goes high; this exponential charging produces
a narrow positive voltage spike across the resistor.
Monostable Multivibrator

We use monostable multivibrator to generate a short width of pulse that will allow the user
combination to be compared to the password. A monostable multivibrator (MMV) often called a
one-shot multivibrator, is a pulse generator circuit in which the duration of the pulse is
determined by the R-C network, connected externally to the 555 timer. In such a vibrator, one
state of output is stable while the other is quasi-stable (unstable). For auto-triggering of output
from quasi-stable state to stable state energy is stored by an externally connected capacitor C to a
reference level. The time taken in storage determines the pulse width. The transition of output
from stable state to quasi-stable state is accomplished by external triggering.
A 555 timer connected for monostable operation. In the standby state, flip-flop (FF) holds
transistor Q1 on , thus clamping the external timing capacitor to ground. The output remains at
ground potential LOW.As the trigger passes through Vcc/3, the FF is set, Q=0. This makes
transistor Q1 off and the short circuit across the timing capacitor(C) is released. As Q is LOW,
output goes HIGH. The timing cycle now begins. Since C is unclamped, voltage across it rises
exponentially through R towards Vcc with a time constant RC. After a time period, the capacitor
voltage is just greater than (2/3)Vcc and the upper comparator resets the FF, that is R=1,S=0.
This makes Q(BER)=0,transistor Q1 goes on ,thereby discharging the capacitor rapidly to ground

02-AWC-SHILPI BANERJEE
potential. The output returns to the standby state or ground potential. The voltage across the
capacitor is
Vc = Vcc(1-e-t/RC)
At t=T,
Vc = (2/3)Vcc
Therefore,
2/3Vcc = Vcc(1-e-T/RC)
or, T = RC ln(1/3)
or, T = 1.1 RC
We use 555 timer IC to generate the monostable multivibrator circuit.

Fig. 7. Circuit diagram of Monostable multivibrator using 555 timer

02-AWC-SHILPI BANERJEE
The timing interval is independent of the supply voltage. It may also be noted that once
triggered, the output remains in the HIGH state until time elapses, which depends only upon R
and C. Any additional trigger pulse coming during this time will not change the output state.
However, if a negative going reset pulse is applied to the reset terminal during the timing cycle,
transistor Q2 goes off,Q1 becomes on and the external timing capacitor C is immediately
discharged. It may be seen that the output of Q2 is connected directly to the input of Q1 so as to
turn on Q1 immediately and thereby avoid the propagation delay through the FF. Now, even if
the reset is released ,the output will still remain LOW until a negative going trigger pulse is again
applied at the terminal. Sometimes the monostable circuit mistriggers on positive pulse ,even
with the control pin by pass capacitor.
This is all about the monostable multivibrator using 555 timer.
Advantage of Our System

No keys to be lost, stolen or occupied.

Can be locked using keypad.
Automatic door opening /closing.
Gives an indication for unauthorized entry. Totally cost efficient.
Disadvantage of Our System

Currently if the personal identification number is somehow forgotten the system could
not be accessed.
Currently pin code (binary password) can be changed only by the system designer.
Conclusion And Future Scopes

Motor specification is to be determined.

Choice of flip-flop still has a scope of verification.
Microcontroller can be implemented for acquiring more intelligence in our system
16 bit register can be used for more protection.
We can also lock our system by using the same password.
References

Linear Integrated Circuits by D. Roy Choudhary & S. B. Jain

Digital Logic Design by Morris Mano

http://www.alldatasheet.com/datasheetpdf/pdf/23048/STMICROELECTRONICS/74164.html