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P2 Time Table May 2015

This document contains timetables for various labs including Analog Electronics Lab, Basic Electronics Lab, CL5-Telecommunication Lab, COMM2 Lab, Analog Communication Lab, Digital Electronics Lab, Digital Signal Processing Lab, Power Electronics Lab, Signals and Systems Lab, and VLSI Lab. Each timetable shows the schedule of lab sessions across time periods on different days of the week along with the assigned lab groups. The timetables are labeled with the corresponding lab, lab in-charge and relevant course code details.

Uploaded by

Aashish Pal
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
29 views

P2 Time Table May 2015

This document contains timetables for various labs including Analog Electronics Lab, Basic Electronics Lab, CL5-Telecommunication Lab, COMM2 Lab, Analog Communication Lab, Digital Electronics Lab, Digital Signal Processing Lab, Power Electronics Lab, Signals and Systems Lab, and VLSI Lab. Each timetable shows the schedule of lab sessions across time periods on different days of the week along with the assigned lab groups. The timetables are labeled with the corresponding lab, lab in-charge and relevant course code details.

Uploaded by

Aashish Pal
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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I

II

09.00 09.55 10.00 10.55

III
11.00 11.55

IV

VI

12.00 12.55 01.00 1.55 02.00 02.55

03.00-05.55
DIP 471-(A2) Mech

MON

TUE

WED

DIP 471-Civil

THU

FRI

SAT

DIP 471-(A1) Mech

Time Table: Analog Electronics Lab


(Lab Incharge: Mr. Sheshmani Tripathi)

II

09.00 09.55 10.00 10.55

III
11.00 11.55

IV

VI

12.00 12.55 01.00 1.55 02.00 02.55

MON

TUE

WED

THU

FRI

SAT

Time Table: Basic Electronics Lab


(Lab Incharge: Mr. Hansmukh Kumhar)

VII

VIII

03.00-03.55

04.00-04.55

II

09.00 09.55 10.00 10.55

III
11.00 11.55

IV

VI

12.00 12.55 01.00 1.55 02.00 02.55

VII

VIII

03.00-03.55

04.00-04.55

MON

A6 PEC 671CL5

TUE

A3 PEC 671CL5

WED

A1 PEC 671CL5

THU

A4 PEC 671CL5

FRI

A2 PEC 671CL5

SAT

A5 PEC 671CL5

Time Table: CL5-Telecommunication Lab


(Lab Incharge:Javed)

II

09.00 09.55 10.00 10.55

III

IV

11.00 11.55

12.00 12.55 01.00 1.55 02.00 02.55

MON

TUE

WED

THU

FRI

SAT

VI

A4 PEC673

Time Table: COMM2 Lab (Lab Incharge: Mr. Ashwini Saini)

VII

VIII

03.00-03.55

04.00-04.55

A2 PEC673

A1 PEC673

A5 PEC673

A3 PEC673

A6 PEC673

II

09.00 09.55 10.00 10.55

III
11.00 11.55

IV

VI

12.00 12.55 01.00 1.55 02.00 02.55

MON

TUE

WED

THU

FRI

SAT
10B17 EC673POWER ELECTRONICS LAB

Time Table: Analog Communication Lab


(Lab Incharge: Mr. Pradeep )

VII

VIII

03.00-03.55

04.00-04.55

A1-PEC474
A2-PEC474
A3-PEC474

II

09.00 09.55 10.00 10.55


MON

TUE

WED

THU

FRI
SAT

III
11.00 11.55

IV

VI

12.00 12.55 01.00 1.55 02.00 02.55

B3-PCI475-MICROPROC LAB

B1-PCI475-MICROPROC LAB

B2-PCI475-MICROPROC LAB

B5-PCI475-MICROPROC LAB

B6-PCI475-MICROPROC LAB

VII

VIII

03.00-03.55

04.00-04.55

A2 PEC473

B4-PCI475-MICROPROC LAB

14B17EC474Analog Communication Lab

Time Table: Digital Electronics Lab (Lab Incharge: Mr. Ajit Parida)

A3 PEC473

A1 PEC473

II

09.00 09.55 10.00 10.55

MON
TUE

III

IV

11.00 11.55

VI

12.00 12.55 01.00 1.55 02.00 02.55

B1PEC371

B2PEC371

B3PEC371

WED

B4PEC371

THU

B5PEC371

FRI
SAT

B6 PEC371

PCI475-MICROPROC LAB

14B17EC473Digital Electronics lab

Time Table: Digital Signal Processing (Lab Incharge: Mr. Sandeep Singh)

VII

VIII

03.00-03.55

04.00-04.55

II

09.00 09.55 10.00 10.55

III
11.00 11.55

IV

12.00 12.55 01.00 1.55 02.00 02.55

MON

TUE

WED

A3 PEC 472 WS lab

THU
FRI

VII

VIII

03.00-03.55

04.00-04.55

A3 PEC 472 WS lab

A2 PEC 472 WS lab

A1 PEC 472 WS lab

A1 PEC 472 WS lab

SAT
14B17EC371

VI

Signals and Systems Lab

Time Table: Power Electronics Lab


(Lab Incharge: Mr. Santosh Khernar)

A2 PEC 472 WS lab

II

III

IV

09.00 09.55 10.00 10.55 11.00 11.55 12.00 12.55 01.00 1.55

MON
TUE

A3 PEC672 VLSI lab

ECE Design and Simulation Lab II

WED
THU

FRI
SAT

A1 PEC471 VLSI lab

A5 PEC672 VLSI lab

VI

VII

VIII

02.00
02.55

03.00-03.55

04.00-04.55

A1PEC672 VLSI lab

A2PEC672 VLSI lab

A4PEC672 VLSI lab

A2 PEC471 VLSI lab

A3 PEC471 VLSI lab

A6 PEC672 VLSI lab

Time Table: VLSI Lab(Lab Incharge: Mr. Ajay Ranjan)

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