Arbind Singhi

+91-9015766764
[email protected]

OBJECTIVE
Highly motivated to work in a reputed VLSI company (anywhere within or outside India) that provides
learning, early responsibility and a productive work culture along with effectively contributing towards
the goals of the organization.

QUALIFICATION
Degree & College/University %Marks

B.E. (Electronics & Communication) from ITM, Gurgaon (MDU, Rohtak) in June,2010 68.1%

XII (C.B.S.E.) from Maharaja Agarsain Public School, Ashok Vihar, N. Delhi 77.6%

X (S.E.B.A.) from Nichols High School, Guwahati (Assam) 78.3%

PROJECTS & TRAINING

 Design and Analysis of a High-Speed, Low-Power SRAM Cell using H-Spice / T-Spice (Team=2)
As BE project, working on design, simulation, synthesis and verification of a 1-bit SRAM cell in
180nm CMOS Technology, using Tanner EDA Tools, to optimize speed and power consumption.
 Designed a Synchronous and an Asynchronous FIFO using Verilog. (Individual)
FIFO is a memory register. Synchronous FIFO was designed with the same clock domain for both
read and write. Asynchronous, however, utilized two clock domains, one for read and another for
write. For efficient Clock Domain Crossing, read and write pointers needed to be synchronized.
 Designed and Synthesized a pipelined digital multiplier circuit using Verilog. (Individual)
XilinxISE Project Navigator 8.1i tool was used to simulate, synthesize and test it.
 6 weeks training at Appin Knowledge Solutions, Pitampura, N. Delhi on Embedded Robotics.
Built a project on Mobile Operated Robotic Car using DTMF technology.
 6 weeks training at RITES Ltd., Gurgaon on the fundamentals of Fiber Optics technology.

SKILL-SET
Languages: C, C++, Java, P ython
Hardware Languages: SystemVerilog, Verilog, VHDL, SPICE
Good Knowledge of: Timing Issues in Digital Circuits, Clock Domain Crossing, Pipelining
Architecture, Design Synthesis, CMOS Logic Design
Basic Knowledge of: RTL to GDSII Flow, Testbench Development, SoC, Shell Scripting
EDA Tools: Cadence Virtuoso, Incisive, NC-Sim, Assura, Xilinx ISE Project Navigator 8.1i
Simulation Tools: P-Spice, H-Spice, Tanner (Sedit, Ledit, LVS), Leonardo Spectrum, Kiel µvision,
ModelSim 5.4
Assembly Languages: Intel 8051, 8085, 8086, P IC Microcontrollers
Protocols: Ethernet, USB, SATA
OS: Red Hat Linux Enterprise, Solaris, MS -Windows 95/98/2000/XP/Vista/7
AREAS OF INTEREST
Digital Electronics VLS I
Programming Languages Microprocessors & Microcontrollers

PERSONAL SKILLS
Strong Analytical Problem Solving Skills, Willingness to learn, Good team player, Self-motivated,
Smart Worker.

EXTRACURRICULAR ACTIVITIES
 Presently undergoing an intensive training on EDA Tools covering the entire ASIC Design Flow.
 Presented a paper on SRAM in National Seminar on Nanotechnology.
 Efficiently coordinated Technical Event like “All Terrain Vehicle (ATV)”.
 Won 2nd prize in Odyssey (Online Treasure Hunt).
 Have successfully cleared BEC Vantage program.
 Participated in voluntary Blood Donation Camp by Rotary Club.

PERSONAL DETAILS

NAME: ARBIND SINGHI

I hereby solemnly declare that all the above facts are correct to the best of my Knowledge and belief.

Date: March 28, 2010 Arbind Singhi