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8085 qb2

mcq

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Raghu Ram
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103 views

8085 qb2

mcq

Uploaded by

Raghu Ram
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as RTF, PDF, TXT or read online on Scribd
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The contents of accumulator after operation may be

A) 75 (B) 6C C) DB (D) B6
8. In an 8085 microprocessor, the instruction CMP Bhas been executed while
the contents of
accumulator is less than that of register B. As a result carry flag
andzero flag will be
respectively
(A) set, reset (B) reset, set C) reset, reset (D) set, set
9. Consider the following 8085 instruction
MVI A, A9H
MVI B, 57H
ADD B
ORA A
The flag status (S, Z, CY) after the instruction
ORA A is executed, is
(A) (0, 1, 1) (B) (0, 1, 0) (C) (1, 0, 0) (D) (1, 0, 1)
10. Consider the following set of 8085 instructions
MVI A, 8EH
ADI 73H
JC DSPLY
OUT PORT1
HLT
DSPLY : XRA A
OUT PORT1
HLT
The output at PORT1 is
(A) 00 (B) FEH C) 01H (D) 11H

11. Consider the following 8085 assembly program


MVI A, DATA1
MOV B, A
SUI 51H
JC DLT
MOV A, B
SUI 82H
JC DSPLY
DLT : XRA A
OUT PORT1
HLT
DSPLY : MOV A, B
OUT PORT2
HLT
MPMC
3
This program will display
(A) the bytes from 51H to 82H at PORT2
(B) 00H AT PORT1
(C) all byte at PORT1
(D) the bytes from 52H to 81H at PORT 2
12. It is desired to mask is the high order bits(D D) 7 4 _ of
the data bytes in register C. Consider the following set
of instruction
(a) MOV A, C
ANI F0H

MOV C, A
HLT
(b) MOV A, C
MVI B, F0H
ANA B
MOV C, A
HLT
(c) MOV A, C
MVI B, 0FH
ANA B
MOV C, A
HLT
(d) MOV A, C
ANI 0FH
MOV C, A
HLT
The instruction set, which execute the desired
operation are
(A) a and b (B) c and d
(C) only a (D) only d
13. Consider the following 8085 assembly program :
MVI B, 89H
MOV A, B
MOV C, A
MVI D, 37H
OUT PORT1

HLT
The output at PORT1 is
(A) 89 (B) 37
(C) 00 (D) None of the above

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