‫‪١‬‬ ‫‪‐ CPLD & FPGA‬‬

‫" ﺑﺴﻤﻪ ﺗﻌﺎﻟﻲ"‬

‫)‪FPGA (Field Programmable Gate Arrays‬‬

‫ﻣﻘﺪﻣﻪ‪:‬‬

‫‪ FPGA‬ﺭﻭﺵ ﻧﻮﻳﻨﻲ ﺩﺭ ﻃﺮﺍﺣﻲ ﻭ ﺗﻮﻟﻴﺪ ﺳﺮﻳﻊ ﻣﺪﺍﺭﻫﺎﻱ ﻣﺠﺘﻤﻊ ﺍﻟﻜﺘﺮﻭﻧﻴﻜﻲ ﻣﻲ ﺑﺎﺷﺪ ﻛﻪ ﻫﻢ ﺍﻛﻨﻮﻥ‬
‫ﺩﺭ ﺍﻛﺜﺮ ﻣﺮﺍﻛﺰ ﺗﺤﻘﻴﻖ‪ ،‬ﺗﻮﺳﻌﻪ ﻭ ﺗﻮﻟﻴﺪﻱ ﺑﻪ ﺻﻮﺭﺕ ﮔﺴﺘﺮﺩﻩ ﺍﺳﺘﻔﺎﺩﻩ ﻣﻲﺷﻮﺩ‪ .‬ﺍﻳﻦ ﺳﻴﺴﺘﻢ ﻗﺎﺑﻠﻴﺖ ﻃﺮﺍﺣﻲ‪،‬‬
‫ﻣﺸﺎﺑﻪﺳﺎﺯﻱ ﻭ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ﺭﺍ ﺩﺭ ﭼﺎﺭﭼﻮﺏ ﻳﻚ ﺳﻴﺴﺘﻢ ﻛﺎﻣﭙﻴﻮﺗﺮﻱ ﺑﻪ ﻃﺮﺍﺡ ﻣﻲﺩﻫﺪ‪.‬‬
‫ﺳﻴﺴﺘﻢ ﻃﺮﺍﺣﻲ ‪ FPGA‬ﺷﺎﻣﻞ ﻃﺮﺍﺣﻲ ﺷﻤﺎﺗﻴﻜﻲ‪ ،‬ﻣﺸﺎﺑﻪﺳﺎﺯﻱ‪ ،‬ﻃﺮﺍﺣﻲ ﺑﺎ ‪ Verilog ،VHDL‬ﻭ‬
‫‪ ABEL‬ﻃﺮﺍﺣﻲ ﺑﻮﺳﻴﻠﻪ ﺩﻳﺎﮔﺮﺍﻡ ﺣﺎﻟﺖ‪ ،‬ﺳﺎﺧﺖ ﺍﺗﻮﻣﺎﺗﻴﻚ ﻗﻄﻌﺎﺕ ﺑﺮﺍﻱ ‪ ، LIBRARY‬ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ‪ IC‬ﻭ‬
‫ﺗﺴﺖ ﺧﻄﺎﻳﺎﺑﻲ ﻣﻲﺑﺎﺷﺪ‪.‬‬
‫ﮔﻨﺠﺎﻳﺶ ‪ IC‬ﻫﺎﻱ ﻗﺎﺑﻞ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ‪ FPGA‬ﺑﻪ ﻃﻮﺭ ﻣﻌﻤﻮﻝ ﺍﺯ ‪ ٥٠٠٠‬ﺗﺎ ‪ ٣٢٠٠٠٠٠‬ﮔﻴﺖ ﺑﻮﺩﻩ ﻭ‬
‫ﻛﻮﭼﻜﺘﺮﻳﻦ ﺁﻧﻬﺎ ﺣﺪﺍﻗﻞ ﻣﻌﺎﺩﻝ ‪ ٣٠‬ﺁﻱ ﺳﻲ ‪ ٢٠ PAL‬ﭘﺎﻳﻪ ﮔﻨﺠﺎﻳﺶ ﺩﺍﺭﺩ‪ .‬ﻓﺮﻛﺎﻧﺲ ﻛﺎﺭﻱ ﺍﻳﻦ ‪ IC‬ﻫﺎ‬
‫ﺣﺪﺍﻗﻞ ‪ ١٢٠ MHZ‬ﻭ ﺣﺪﺍﻛﺜﺮ ‪ ٨٠٠ MHZ‬ﻣﻲﺑﺎﺷﺪ‪ .‬ﺁﻱ ﺳﻲﻫﺎﻱ ﻗﺎﺑﻞ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ‪ CPLD‬ﻧﻴﺰ ﺍﺯ ‪ ٨٠٠‬ﺗﺎ‬
‫‪ ١٠٦٠٠‬ﮔﻴﺖ ﻇﺮﻓﻴﺖ ﺩﺍﺭﻧﺪ ﻭ ﻛﻮﭼﻜﺘﺮﻳﻦ ﺁﻧﻬﺎ ﺣﺪﺍﻗﻞ ﻣﻌﺎﺩﻝ ‪ ٤‬ﺁﻱ ﺳﻲ ‪ ٢٠ PAL‬ﭘﺎﻳﻪ ﮔﻨﺠﺎﻳﺶ ﺩﺍﺭﺩ‪.‬‬
‫ﺑﻨﺎﺑﺮﺍﻳﻦ ﺍﺯ ﺳﺎﺩﻩﺗﺮﻳﻦ ﺗﺎ ﭘﻴﭽﻴﺪﻩﺗﺮﻳﻦ ﻣﺪﺍﺭﻫﺎﻱ ﻣﻨﻄﻘﻲ ﺭﺍ ﻣﻲﺗﻮﺍﻥ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺍﻳﻦ ‪ IC‬ﻫﺎ‪ ،‬ﻃﺮﺍﺣﻲ ﻭ‬
‫ﺗﻮﻟﻴﺪ ﻛﺮﺩ‪.‬‬
‫ﺭﺍﻧﺪﻣﺎﻥ ﻃﺮﺍﺣﻲ ﺑﺎ ﺍﻳﻦ ﺳﻴﺴﺘﻢ ﺩﺭ ﻣﻘﺎﻳﺴﻪ ﺑﺎ ﺭﻭﺵ ﻣﺘﺪﺍﻭﻝ ﻃﺮﺍﺣﻲ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﻗﻄﻌﺎﺕ ﮔﺴﺴﺘﻪ‬
‫ﺑﺴﻴﺎﺭ ﺑﺎﻻ ﻣﻲﺑﺎﺷﺪ‪ .‬ﺑﻪ ﻃﻮﺭﻱ ﻛﻪ ﺯﻣﺎﻥ ﻃﺮﺍﺣﻲ ﺩﺭ ﺑﻌﻀﻲ ﻣﻮﺍﺭﺩ ﺗﺎ ﺣﺪﻭﺩ ‪ %٩٠‬ﻛﺎﻫﺶ ﻣﻲﻳﺎﺑﺪ‪ .‬ﺍﺯ ﻟﺤﺎﻅ‬
‫ﻛﺎﻫﺶ ﻫﺰﻳﻨﻪ ﺗﻮﻟﻴﺪ ﻧﻴﺰ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺁﻱ ﺳﻲ ﻫﺎﻱ ‪ FPGA‬ﻣﻲﺗﻮﺍﻧﺪ ﺑﺴﻴﺎﺭ ﻣﻔﻴﺪ ﻭﺍﻗﻊ ﺷﻮﺩ ﻭ ﻫﺰﻳﻨﻪ ﺗﻮﻟﻴﺪ‬
‫ﻳﻚ ﻛﺎﺭﺕ ﺍﻟﻜﺘﺮﻭﻧﻴﻜﻲ ﺑﺎ ﺗﻌﺪﺍﺩ ﺯﻳﺎﺩﻱ ‪ IC‬ﮔﺴﺴﺘﻪ ﺑﻪ ﻣﺮﺍﺗﺐ ﺑﺎﻻﺗﺮ ﺍﺯ ﻫﺰﻳﻨﻪ ﺗﻮﻟﻴﺪ ﻳﻚ ﻛﺎﺭﺕ ﺍﻟﻜﺘﺮﻭﻧﻴﻜﻲ‬
‫ﺑﺎ ﻳﻚ ﺁﻱ ﺳﻲ ‪ FPGA‬ﺍﺳﺖ‪.‬‬
‫‪٢‬‬ ‫‪‐ CPLD & FPGA‬‬

‫ﻣﺰﻳﺖ ﺍﺻﻠﻲ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ‪ FPGA‬ﻭ ‪ CPLD‬ﻗﺎﺑﻞ ﺗﻐﻴﻴﺮ ﺑﻮﺩﻥ ﺑﺮﻧﺎﻣﻪ ﺁﻧﻬﺎ ﺍﺳﺖ‪ .‬ﺩﺭ ﻭﺍﻗﻊ ﺍﺯ ﺁﻧﺠﺎ ﻛﻪ ﺍﻳﻦ‬
‫ﺁﻱ ﺳﻲ ﻗﺎﺑﻞ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ﺩﺭ ﻣﺪﺍﺭ ‪ (In System Programming) ISP‬ﻫﺴﺘﻨﺪ‪ ،‬ﭘﺲ ﺍﺯ ﻟﺤﻴﻢﻛﺎﺭﻱ ﻧﻴﺰ‬
‫ﻣﻲﺗﻮﺍﻧﻨﺪ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ﻣﺠﺪﺩ ﺷﻮﻧﺪ‪.‬‬
‫ﻫﻤﺎﻧﮕﻮﻧﻪ ﻛﻪ ﺍﺷﺎﺭﻩ ﺷﺪ‪FPGA ،‬ﻫﺎ ﻭ‪ CPLD‬ﻫﺎﺣﺠﻢ ﺑﺎﻻﻳﯽ ﺍﺯ ﮔﻴﺖ ﻫﺎﻱ ﻣﻨﻄﻘﻲ ﺩﺭﻭﻥ ﺧﻮﺩﺷﺎﻥ‬
‫ﺩﺍﺭﻧﺪ‪ .‬ﺗﻔﺎﻭﺕ ﺍﻳﻦ ﺩﻭ ﻋﻠﻮﻩ ﺑﺮ ﺣﺠﻢ ﺗﻌﺪﺍﺩ ﮔﻴﺖ ﻫﺎﻱ ﺩﺍﺧﻠﻲ ﺩﺭ ﻣﺪﺍﺭﯼ ﺍﺳﺖ ﮐﻪ ﺩﺍﺧﻠﺸﺎﻥ ﻗﺮﺍﺭ ﻣﯽ ﮔﻴﺮﺩ‪.‬‬
‫ﺩﺭ ‪ FPGA‬ﻭﻗﺘﯽ ﻣﯽﺧﻮﺍﻫﻴﻢ ﺑﺮﻧﺎﻣﻪﺍﻱ ﺭﺍ ﭘﻴﺎﺩﻩﺳﺎﺯﯼ ﮐﻨﻴﻢ‪ ،‬ﺍﻳﻦ ﺑﺮﻧﺎﻣﻪ ﺩﺭ ‪ EPROM‬ﺍﯼ ﮐﻪ ﺩﺭﻭﻥ ﺁﻥ‬
‫ﻗﺮﺍﺭ ﺩﺍﺭﺩ‪ ،‬ﺟﺎﻱ ﻣﻲﮔﻴﺮﺩ‪FPGA .‬ﻫﺎ ﻣﻌﻤﻮ ﹰﻻ ‪ SRAM Based‬ﺍﻧﺪ‪ ،‬ﺩﺭ ﻧﺘﻴﺠﻪ ﺑﺎ ﻗﻄﻊ ﺗﻐﺬﻳﻪ ﺍﻃﻼﻋﺎﺗﺸﺎﻥ ﭘﺎﮎ‬
‫ﻣﯽﺷﻮﺩ‪ .‬ﺑﺮﺍﯼ ﺑﺮﻃﺮﻑ ﮐﺮﺩﻥ ﺍﻳﻦ ﻣﺸﮑﻞ ﺍﺯ ‪ OTP‬ﺍﺳﺘﻔﺎﺩﻩ ﻣﯽﺷﻮﺩ‪ OTP ،‬ﻫﺎ ﺩﺭ ﻭﺍﻗﻊ ‪ IC‬ﻫﺎﯼ ‪ ROM‬ﺍﻧﺪ‬
‫ﮐﻪ ﺩﺭ ﻛﻨﺎﺭ ‪ FPGA‬ﻗﺮﺍﺭ ﺩﺍﺩﻩ ﻣﻲ ﺷﻮﻧﺪ ﺗﺎ ﻫﺮﮔﺎﻩ ﺗﻐﺬﻳﻪ ‪ FPGA‬ﻗﻄﻊ ﺷﺪ‪ ،‬ﺑﻪ ﺣﺎﻟﺖ ‪ reset‬ﺭﻓﺘﻪ ﻭ ﺑﺮﻧﺎﻣﺔ‬
‫ﺧﻮﺩﺵ ﺭﺍ ﺍﺯ ﺩﺍﺧﻞ ﺍﻳﻦ ‪ ROM‬ﺑﺨﻮﺍﻧﺪ ﻭ ﺭﻭﯼ ‪ SRAM‬ﺩﺍﺧﻠﯽ ﺍﺵ ﺑﺮﻳﺰﺩ ‪ .‬ﭘﺲ ‪FPGA‬ﻫﺎ ‪OTP ROM‬‬
‫ﺩﺍﺭﻧﺪ‪ OTP .‬ﻓﻘﻂ ﻳﮏ ﺑﺎﺭ ‪ program‬ﻣﯽ ﺷﻮﺩ‪ .‬ﺍﮔﺮ ﻧﺨﻮﺍﻫﻴﻢ ﺍﺯ ‪ OTP‬ﺍﺳﺘﻔﺎﺩﻩ ﮐﻨﻴﻢ ﺑﺎﻳﺴﺘﻲ ﺩﻭ ﺳﺮ ﺗﻐﺬﻳﺔ‬
‫‪ FPGA‬ﺍﺯ ﺑﺎﻃﺮﯼ ‪ Backup‬ﺍﺳﺘﻔﺎﺩﻩ ﻛﻨﻴﻢ‪..‬‬
‫ﺩﺭ ﺍﻳﻨﺠﺎ ﺑﺮﺍﯼ ﮐﺎﺭﻫﺎﯼ ﺁﺯﻣﺎﻳﺸﮕﺎﻫﯽ ﭘﻴﺎﺩﻩ ﺳﺎﺯﻱ ﻣﺪﺍﺭﺍﺕ ﻣﻨﻄﻘﻲ ﺍﻧﺘﺨﺎﺏ ‪ CPLD‬ﻣﻨﺎﺳﺐﺗﺮ ﺍﺳﺖ‪.‬‬
‫‪ CPLD‬ﻫﺎ ‪ E٢PROM Based‬ﺍﻧﺪ‪ ،‬ﺩﺭ ﻧﺘﻴﺠﻪ ﺑﺎ ﻗﻄﻊ ﺗﻐﺬﻳﻪ ﻣﺪﺍﺭ‪ ،‬ﺑﺮﻧﺎﻣﻪ ﺁﻥ ﭘﺎﻙ ﻧﺸﺪﻩ ﻭ ﺍﻟﻴﺘﻪ ﺍﻳﻦ ﻧﻮﻉ‬
‫ﺁﻱ ﺳﻲ ﻧﺴﺒﺖ ﺑﻪ ‪ FPGA‬ﺗﻌﺪﺍﺩ ﮔﻴﺖ ﮐﻤﺘﺮﯼ ﺩﺍﺭﺩ‪.‬‬
‫ﺁﻱ ﺳﻲ ﻣﻮﺭﺩ ﺍﺳﺘﻔﺎﺩﻩ ﺩﺭ ﺁﺯﻣﺎﻳﺸﮕﺎﻩ ﺍﺯ ﻧﻮﻉ ‪ CPLD‬ﻭ ﻣﺤﺼﻮﻝ ﺷﺮﻛﺖ ‪ Xilinx‬ﺍﺳﺖ‪.‬‬

‫ﺑﺮﺍﯼ ‪ program‬ﮐﺮﺩﻥ ‪ FPGA‬ﻭ ‪ CPLD‬ﺍﺯ ﻧﺮﻡ ﺍﻓﺰﺍﺭ ‪ Xilinx ISE ٦,٢,٠٣i‬ﺍﺳﺘﻔﺎﺩﻩ ﻣﯽ ﮐﻨﻴﻢ‪ .‬ﺍﻟﺒﺘﻪ‬
‫ﻣﻲﺗﻮﺍﻥ ﺍﺯ ﻧﺮﻡ ﺍﻓﺰﺍﺭ ‪ Foundation‬ﻧﻴﺰ ﺍﺳﺘﻔﺎﺩﻩ ﻧﻤﻮﺩ‪ .‬ﭘﺲ ﺍﺯ ﻧﻮﺷﺘﻦ ﺑﺮﻧﺎﻣﻪ ﺩﺭ ﻣﺤﻴﻂ ‪ ،ISE‬ﺑﺮﻧﺎﻣﻪ ﺍﺯ ﻃﺮﻳﻖ‬
‫ﮐﺎﺑﻠﯽ ﮐﻪ ﺑﻪ ﭘﻮﺭﺕ ﻣﻮﺍﺯﻱ ﮐﺎﻣﭙﻴﻮﺗﺮ ﻭﺻﻞ ﻣﯽ ﺷﻮﺩ ﺑﺮ ﺭﻭﻱ ﺁﻱ ﺳﻲ ﺭﻳﺨﺘﻪ ﺷﺪﻩ ﻭ ﭘﻴﺎﺩﻩ ﺳﺎﺯﯼ ﻣﯽ ﺷﻮﺩ‪.‬‬
‫‪٣‬‬ ‫‪‐ CPLD & FPGA‬‬

‫ﻣﺰﺍﻳﺎﻱ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ‪ FPGA‬ﻭ ‪CPLD‬‬

‫ﺑﺮﺧﻲ ﺍﺯ ﻣﺸﺨﺼﺎﺕ ﻣﺪﺍﺭﺍﺕ ﺳﺎﺧﺘﻪ ﺷﺪﻩ ﺑﻮﺳﻴﻠﻪ ‪ FPGA‬ﻭ ‪ CPLD‬ﻭ ﻣﺰﺍﻳﺎﻱ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺁﻥ ﺑﻪ ﺻﻮﺭﺕ‬
‫ﺯﻳﺮ ﺍﺳﺖ‪:‬‬
‫ﺗﺤﻘﻖ ﻫﺮﮔﻮﻧﻪ ﺍﻟﮕﻮﺭﻳﺘﻢ ﭘﻴﭽﻴﺪﻩ ﻣﻨﻄﻘﻲ ﺑﺎ ﺑﻬﺘﺮﻳﻦ ﺣﺎﻟﺖ‬ ‫‐‬
‫ﻛﺎﺭ ﺑﺎ ﻓﺮﻛﺎﻧﺲ ﺑﺎﻻ ﻭ ﺩﺍﺷﺘﻦ ﻛﻤﺘﺮﻳﻦ ﺗﺄﺧﻴﺮ ﺯﻣﺎﻧﻲ ﺩﺭ ﺩﺍﺧﻞ ﻣﺪﺍﺭ‬ ‫‐‬
‫ﺍﻧﻌﻄﺎﻑﭘﺬﻳﺮﻱ ﺩﺭ ﺗﻐﻴﻴﺮ ﺍﻟﮕﻮﺭﻳﺘﻢ ﻣﺪﺍﺭ ﻭ ﺍﺻﻼﺡ ﺁﻥ ﺑﺪﻭﻥ ﻧﻴﺎﺯ ﺑﻪ ﺗﻐﻴﻴﺮ ﻣﺪﺍﺭ ﭼﺎﭘﻲ ﻳﺎ ﻛﻞ ﻣﺪﺍﺭ ﻃﺮﺍﺣﻲ‬ ‫‐‬
‫ﺷﺪﻩ‬
‫ﻛﺎﻫﺶ ﺯﻣﺎﻥ ﻃﺮﺍﺣﻲ ﺍﺯ ﭼﻨﺪ ﻣﺎﻩ ﺑﻪ ﭼﻨﺪ ﺭﻭﺯ‬ ‫‐‬
‫ﻛﺎﻫﺶ ﻫﺰﻳﻨﻪ ﻃﺮﺍﺣﻲ ﺑﻪ ﻋﻠﺖ ﺭﻫﺎﻳﻲ ﺍﺯ ﺍﻧﺘﺨﺎﺏ ﻭ ﺑﻪ ﻫﻢ ﭘﻴﻮﺳﺘﻦ ﺁﻱ ﺳﻲ ﻫﺎﻱ ﻣﺨﺘﻠﻒ ﺩﻳﺠﻴﺘﺎﻟﻲ‬ ‫‐‬
‫ﻛﺎﻫﺶ ﻫﺰﻳﻨﻪ ﻣﻮﻧﺘﺎﮊ ﺑﻪ ﻋﻠﺖ ﻛﺎﻫﺶ ﺗﻌﺪﺍﺩ ﻗﻄﻌﺎﺕ‬ ‫‐‬
‫ﻛﺎﻫﺶ ﻗﺎﺑﻞ ﻣﻼﺣﻈﻪ ﻧﻮﻳﺰ ﺑﻪ ﻋﻠﺖ ﺟﻤﻊ ﺷﺪﻥ ﻛﻠﻴﻪ ﻣﺪﺍﺭﺍﺕ ﺩﻳﺠﻴﺘﺎﻟﻲ ﺩﺭ ﻳﻚ ﺁﻱ ﺳﻲ‬ ‫‐‬
‫ﺳﺎﺩﻩ ﺷﺪﻥ ﻃﺮﺍﺣﻲ ﻓﻴﺒﺮ ﻣﺪﺍﺭ ﭼﺎﭘﻲ ﺑﺮﺍﻱ ﻣﺪﺍﺭﻫﺎﻱ ﭘﻴﭽﻴﺪﻩ )ﺑﻪ ﻋﻠﺖ ﺍﻣﻜﺎﻥ ﺗﻌﺮﻳﻒ ﺩﻟﺨﻮﺍﻩ ﭘﺎﻳﻪﻫﺎﻱ‬ ‫‐‬
‫‪.( FPGA‬‬
‫ﻧﺎﻣﺤﺪﻭﺩ ﺑﻮﺩﻥ ﺗﻌﺪﺍﺩ ﺩﻓﻌﺎﺕ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ‬ ‫‐‬
‫ﻗﺎﺑﻞ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ﺩﺭ ﻣﺪﺍﺭ )‪(ISP‬‬ ‫‐‬
‫ﺍﻣﻜﺎﻥ ﺍﺭﺗﻘﺎﺀ ﻭ ﻳﺎ ﺑﻬﺒﻮﺩ ﻛﺎﺭﻛﺮﺩ ﻣﺪﺍﺭ ﺣﺘﻲ ﭘﺲ ﺍﺯ ﺳﺎﺧﺖ ﻭ ﺗﺤﻮﻳﻞ ﺑﻪ ﻣﺼﺮﻑ ﻛﻨﻨﺪﻩ‬ ‫‐‬

‫ﭘﺮﻭﺳﻪ ﻃﺮﺍﺣﻲ ﺗﺎ ﺗﻮﻟﻴﺪ ﺩﺭ ﺧﺼﻮﺹ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ‪ FPGA‬ﻭ ‪ CPLD‬ﺑﻪ ﺷﺮﺡ ﺯﻳﺮ ﻣﻲﺑﺎﺷﺪ‪:‬‬

‫‪ (١‬ﻃﺮﺍﺣﻲ‪ :‬ﻃﺮﺍﺡ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ‪ LIBRARY‬ﻛﻪ ﺩﺭ ﺍﺧﺘﻴﺎﺭ ﺩﺍﺭﺩ ﻣﺪﺍﺭ ﻣﻮﺭﺩ ﻧﻈﺮ ﺭﺍ ﺑﺎ ﻧﺮﻡﺍﻓﺰﺍﺭ ﺷﻤﺎﺗﻴﻚ‬
‫ﻃﺮﺍﺣﻲ ﻣﻲﻛﻨﺪ‪ .‬ﺩﺭ ﺍﻳﻦ ﻧﺮﻡﺍﻓﺰﺍﺭﻫﺎ‪ ،‬ﺳﻠﻮﻟﻬﺎ )ﻛﻪ ﻫﺮ ﻛﺪﺍﻡ ﺗﻮﺳﻂ ﻳﻚ ﺳﻤﺒﻞ ﻧﻤﺎﻳﻨﺪﮔﻲ ﻣﻲﺷﻮﻧﺪ( ﺭﻭﻱ‬
‫ﺻﻔﺤﻪ ﻧﻤﺎﻳﺸﮕﺮ ﻓﺮﺍﺧﻮﺍﻧﺪﻩ ﺷﺪﻩ ﻭ ﺑﻪ ﻫﻢ ﻭﺻﻞ ﻣﻲﮔﺮﺩﻧﺪ‪ .‬ﺩﺭ ﺿﻤﻦ ﻃﺮﺍﺣﻲ ﻓﻮﻕ ﻣﻲﺗﻮﺍﻧﺪ ﺗﻮﺳﻂ ‪VHDL‬‬
‫ﻳﺎ ‪ verilog‬ﻳﺎ ‪ ABEL‬ﻧﻴﺰ ﺍﻧﺠﺎﻡ ﺷﻮﺩ‪ .‬ﻃﺮﺍﺡ ﺧﺼﻮﺻﻴﺎﺕ ﻭ ﻃﺮﺯ ﻛﺎﺭ ﻣﺪﺍﺭ ﻣﻮﺭﺩ ﻧﻈﺮ ﺭﺍ ﺑﺎ ﺍﺳﺘﻔﺎﻫﺪ ﺍﺯ ﺯﺑﺎﻥ‬
‫‪ HDL‬ﻧﮕﺎﺭﺵ ﻣﻲﻛﻨﺪ‪ .‬ﺩﺭ ﺿﻤﻦ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺑﺮﻧﺎﻣﻪﻫﺎﻱ ﻃﺮﺍﺣﻲ ﺑﻪ ﻭﺳﻴﻠﻪ ﺩﻳﺎﮔﺮﺍﻡ ﺣﺎﻟﺖ‪ ،‬ﻃﺮﺍﺣﻲ‬
‫ﺍﻟﻤﺎﻧﻬﺎﻱ ﻣﺨﺘﻠﻒ ﻣﻨﻄﻘﻲ ﻧﻈﻴﺮ ﺁﻛﻤﻮﻻﺗﻮﺭ‪ ،‬ﺿﺮﺏ ﻛﻨﻨﺪﻩ‪ ،FFT ،‬ﺍﻧﻮﺍﻉ ﻓﻴﻠﺘﺮﻫﺎﻱ ﺩﻳﺠﻴﺘﺎﻟﻲ ‪ FIR‬ﻭ …‬
‫ﻣﻲﺗﻮﺍﻥ ﺩﺭ ﺍﺳﺮﻉ ﻭﻗﺖ ﭘﻴﭽﻴﺪﻩﺗﺮﻳﻦ ﻣﺪﺍﺭﺍﺕ ﺭﺍ ﭘﻴﺎﺩﻩﺳﺎﺯﻱ ﻧﻤﻮﺩ‪.‬‬
‫‪٤‬‬ ‫‪‐ CPLD & FPGA‬‬

‫‪ (٢‬ﺷﺒﻴﻪ ﺳﺎﺯﻱ‪ :‬ﭘﺲ ﺍﺯ ﻃﺮﺍﺣﻲ‪ ،‬ﭼﮕﻮﻧﮕﻲ ﻛﺎﺭﻛﺮﺩ ﻣﺪﺍﺭ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﻧﺮﻡﺍﻓﺰﺍﺭ “ﻧﻤﺎﻳﺸﮕﺮ ﺳﻴﮕﻨﺎﻟﻬﺎ” ﻗﺎﺑﻞ‬
‫ﺭﺅﻳﺖ ﻭ ﺍﺭﺯﻳﺎﺑﻲ ﻫﺴﺘﻨﺪ‪ .‬ﺍﻳﻦ ﻧﺮﻡﺍﻓﺰﺍﺭ ﻫﻤﭽﻨﻴﻦ ﻣﻲﺗﻮﺍﻧﺪ ﺟﻬﺖ ﺑﻪ ﻭﺟﻮﺩ ﺁﻭﺭﺩﻥ ﺳﻴﮕﻨﺎﻟﻬﺎﻱ ﻭﺭﻭﺩﻱ ﻣﻮﺭﺩ‬
‫ﺍﺳﺘﻔﺎﺩﻩ ﻗﺮﺍﺭ ﮔﻴﺮﺩ‪.‬‬

‫‪ (٣‬ﭘﻴﺎﺩﻩ ﺳﺎﺯﻱ‪ :‬ﭘﺲ ﺍﺯ ﺗﺄﻳﻴﺪ ﻛﺎﺭﻛﺮﺩ ﻣﺪﺍﺭ ﺗﻮﺳﻂ ﻃﺮﺍﺡ‪ ،‬ﻧﺮﻡﺍﻓﺰﺍﺭ ‪ ،Implementation‬ﻣﺪﺍﺭ ﺭﺍ ﺍﺯ ﻟﺤﺎﻅ‬
‫ﻋﺪﻡ ﻧﻘﺾ ﻗﻮﺍﻧﻴﻦ ﻃﺮﺍﺣﻲ ﭼﻚ ﻛﺮﺩﻩ ﻭ ﺳﭙﺲ ﺁﻥ ﺭﺍ ﺩﺭ ﺩﺍﺧﻞ ﺁﻱ ﺳﻲ ﻗﺮﺍﺭ ﻣﻲﺩﻫﺪ‪.‬‬

‫‪ (٤‬ﺷﺒﻴﻪﺳﺎﺯﻱ ﺑﻌﺪ ﺍﺯ ﭘﻴﺎﺩﻩﺳﺎﺯﻱ‪ :‬ﭘﺲ ﺍﺯ ﭘﻴﺎﺩﻩﺳﺎﺯﻱ ﺭﻭﻱ ‪ ،IC‬ﺗﺄﺧﻴﺮﺍﺕ )‪ (DELAY‬ﻭﺍﻗﻌﻲ ﻛﻪ ﺑﻪ‬

‫‪ (٥‬ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ﺁﻱ ﺳﻲ‪ :‬ﺩﺭ ﺍﻳﻦ ﻣﺮﺣﻠﻪ ﺑﻮﺳﻴﻠﻪ ﻧﺮﻡﺍﻓﺰﺍﺭ “ﺑﺮﻧﺎﻣﻪﺭﻳﺰ” ﺁﻱ ﺳﻲ ‪ FPGA‬ﺍﺯ ﻃﺮﻳﻖ ﭘﻮﺭﺕ‬
‫ﻣﻮﺍﺯﻱ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ﻣﻲﺷﻮﺩ‪.‬‬

‫ﭘﺲ ﺍﺯ ﺑﺮﻧﺎﻣﻪﺭﻳﺰﻱ ‪ FPGA‬ﻳﺎ ‪ CPLD‬ﭼﻨﺎﻧﭽﻪ ﻛﺎﺭﻛﺮﺩ ﻣﺪﺍﺭ ﻣﻄﻠﻮﺏ ﻧﺒﺎﺷﺪ ﻣﻲﺗﻮﺍﻥ ﻣﺮﺍﺣﻞ ﺑﺎﻻ ﺭﺍ ﺗﺎ‬
‫ﺑﻲﻧﻬﺎﻳﺖ ﺑﺎﺭ ﺗﻜﺮﺍﺭ ﻧﻤﻮﺩ‪.‬‬

‫ﺩﺳﺘﻮﺭ ﻛﺎﺭ ﺟﻠﺴﻪ ﺍﻭﻝ‪:‬‬

‫ﺑﺎ ﻣﻄﺎﻟﻌﻪ ﺩﻓﺘﺮﭼﻪ ﺭﺍﻫﻨﻤﺎﻱ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﻛﻴﺖﻫﺎﻱ ﺁﻣﻮﺯﺷﻲ ﺑﺮﺩ ‪ CPLD‬ﺁﺯﻣﺎﻳﺸﮕﺎﻩ ﻭ ﺁﺷﻨﺎﻳﻲ ﺑﺎ ﻧﺤﻮﻩ‬
‫ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﻛﻴﺖﻫﺎﻱ ﺁﻣﻮﺯﺷﻲ ﻭ ﻫﻤﭽﻨﻴﻦ ﻣﺤﻴﻂ ﻧﺮﻡ ﺍﻓﺰﺍﺭﻱ ‪ ،ISE‬ﻳﻚ ﻣﺪﺍﺭ ﺳﺎﺩﻩ ‪ AND‬ﺳﻪ ﭘﺎﻳﻪ‬
‫ﻃﺮﺍﺣﻲ ﻛﻨﻴﺪ )ﻭﺭﻭﺩﻱ ﻫﺎ ﺑﺎ ﺍﺳﺘﻔﺎﺩﻩ ﺍﺯ ﺩﻳﭗ ﺳﻮﻳﭻ ﻭ ﺧﺮﻭﺟﻲ ﺭﺍ ﺑﺮ ﺭﻭﻱ ‪ LED‬ﻧﻤﺎﻳﺶ ﺩﻫﻴﺪ(‪.‬‬
‫ﻫﻤﭽﻨﻴﻦ ﺑﺮﮔﻪ ﺍﻃﻼﻋﺎﺕ ﻣﺮﺑﻮﻁ ﺑﻪ ﺁﻱ ﺳﻲ ﻫﺎﻱ ﻣﻮﺭﺩ ﺍﺳﺘﻔﺎﺩﻩ ﺩﺭ ﺑﺮﺩ ﺁﻣﻮﺯﺷﻲ ﺭﺍ ﺗﻬﻴﻪ ﻭ ﻧﺤﻮﻩ ﻋﻤﻠﻜﺮﺩ ﻫﺮ‬
‫ﻳﻚ ﺭﺍ ﮔﺰﺍﺭﺵ ﻧﻤﺎﻳﻴﺪ‪.‬‬
‫ﻣﻮﻓﻖ ﺑﺎﺷﻴﺪ‪.‬‬

‫ﻳﺎﺳﺮ ﺷﻜﻔﺘﻪ – ﻣﻬﺮ ‪١٣٨٦‬‬