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Recognition: Vlsi Lab Experiments

The document describes the layout and testing of various analog circuits in VLSI lab experiments, including an inverter, common source amplifier, common drain amplifier, differential amplifier, and R-2R ladder digital to analog converter. For each circuit, the layout and physical design are shown, input parameters are specified, and the results of transient, DC, and frequency analyses are presented to characterize the circuit's performance.

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Pavan Revankar
Copyright
© Attribution Non-Commercial (BY-NC)
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Download as DOC, PDF, TXT or read online on Scribd
51 views

Recognition: Vlsi Lab Experiments

The document describes the layout and testing of various analog circuits in VLSI lab experiments, including an inverter, common source amplifier, common drain amplifier, differential amplifier, and R-2R ladder digital to analog converter. For each circuit, the layout and physical design are shown, input parameters are specified, and the results of transient, DC, and frequency analyses are presented to characterize the circuit's performance.

Uploaded by

Pavan Revankar
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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VLSI LAB EXPERIMENTS

INTRODUCTION

RECOGNITION

7TH SEMESTER 59 E&C


VLSI LAB EXPERIMENTS

GENERATING MOS AND WIDTH PARAMETERS

7TH SEMESTER 60 E&C


VLSI LAB EXPERIMENTS

CONTACTS RECOGNITION AND RESISTOR SELECTION

7TH SEMESTER 61 E&C


VLSI LAB EXPERIMENTS

1. INVERTER

CIRCUIT LAYOUT

PHYSICAL LAYOUT

7TH SEMESTER 62 E&C


VLSI LAB EXPERIMENTS

VOLTAGE/TIME OR TRANSIENT ANALYSIS - POWER CONSUMPTION

INPUT VOLTAGE: VDD: 1.2 V

7TH SEMESTER 63 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – BIASING POINT

7TH SEMESTER 64 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – GAIN

7TH SEMESTER 65 E&C


VLSI LAB EXPERIMENTS

2. COMMON SOURCE AMPLIFIER

CIRCUIT LAYOUT

PHYSICAL LAYOUT

7TH SEMESTER 66 E&C


VLSI LAB EXPERIMENTS

INPUT PARAMETERS

VDD: 1.2 V

INPUT AMPLITUDE: Vin = 0.020 V


GAIN = - 1.4 V

THEORITICAL

Vout = - GAIN X Vin


= - (- 1.4 V) X 0.020 V
= 0.028 V

PRACTICAL

Vout = 0.030V

7TH SEMESTER 67 E&C


VLSI LAB EXPERIMENTS

VOLTAGE/TIME OR TRANSIENT ANALYSIS - POWER CONSUMPTION

7TH SEMESTER 68 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – BIASING POINT

7TH SEMESTER 69 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – GAIN

7TH SEMESTER 70 E&C


VLSI LAB EXPERIMENTS

3. COMMON DRAIN AMPLIFIER

CIRCUIT LAYOUT

PHYSICAL LAYOUT

7TH SEMESTER 71 E&C


VLSI LAB EXPERIMENTS

INPUT PARAMETERS

INPUT AMPLITUDE: Vin = 0.200 V


GAIN = 0.8 V

THEORITICAL

Vout = GAIN X Vin


= (0.8 V) X 0.200 V
= 0.16 V

PRACTICAL

Vout = 0.111 V

7TH SEMESTER 72 E&C


VLSI LAB EXPERIMENTS

VOLTAGE/TIME OR TRANSIENT ANALYSIS - POWER CONSUMPTION

7TH SEMESTER 73 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – BIASING POINT

7TH SEMESTER 74 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – GAIN

7TH SEMESTER 75 E&C


VLSI LAB EXPERIMENTS

4. SINGLE STAGE DIFFERENTIAL AMPLIFIER

CIRCUIT LAYOUT

7TH SEMESTER 76 E&C


VLSI LAB EXPERIMENTS

PHYSICAL LAYOUT

7TH SEMESTER 77 E&C


VLSI LAB EXPERIMENTS

INPUT PARAMETERS

7TH SEMESTER 78 E&C


VLSI LAB EXPERIMENTS

VOLTAGE/TIME OR TRANSIENT ANALYSIS

7TH SEMESTER 79 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – GAIN

7TH SEMESTER 80 E&C


VLSI LAB EXPERIMENTS

FREQUENCY/TIME OR AC CHARACTERISTICS

7TH SEMESTER 81 E&C


VLSI LAB EXPERIMENTS

5. DIFFERENTIAL AMPLIFIER

CIRCUIT LAYOUT

7TH SEMESTER 82 E&C


VLSI LAB EXPERIMENTS

PHYSICAL LAYOUT

7TH SEMESTER 83 E&C


VLSI LAB EXPERIMENTS

INPUT PARAMETERS

Vin = 0.220
GAIN = 4.2V

THEORITICAL = 0.220 X 4.2 = 0.924 V

PRACTICAL = 1.009 V

7TH SEMESTER 84 E&C


VLSI LAB EXPERIMENTS

VOLTAGE/TIME OR TRANSIENT ANALYSIS

7TH SEMESTER 85 E&C


VLSI LAB EXPERIMENTS

DC ANALYSIS OR TRANSFER CHARACTERISTICS – GAIN

7TH SEMESTER 86 E&C


VLSI LAB EXPERIMENTS

FREQUENCY/TIME OR AC CHARACTERISTICS

7TH SEMESTER 87 E&C


VLSI LAB EXPERIMENTS

6. R-2R LADDER DIGITAL TO ANALOG CONVERTER (DAC)

CIRCUIT LAYOUT

PHYSICAL LAYOUT

7TH SEMESTER 88 E&C


VLSI LAB EXPERIMENTS

INPUT PARAMETERS

VDD: 1.2V

Sl. NO B0 B1 B2 B3
WEIGHTAGE 16 8 4 2
VALUE 0 0 1 1
CALCULATION 0 0 1.2/4 1.2/2
= 0.3 V = 0.6 V

B0 x Vdac/16 + B1 x Vdac/8 + B2 x Vdac/4 + B3 x Vdac/2

VDAC – WEIGHTED VALUE

THEORITICAL = 1.2 – (0.3+0.6) = 0.3 V

PRACTICAL = 0.279 V

VOLTAGE/TIME OR TRANSIENT ANALYSIS

7TH SEMESTER 89 E&C


VLSI LAB EXPERIMENTS

7TH SEMESTER 90 E&C

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