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Counters: Miss. Shweta Karn

The document provides information about different types of counters. It discusses synchronous and asynchronous counters. Asynchronous counters have flip-flops that are not triggered simultaneously, with each flip-flop's output driving the next flip-flop's clock. Synchronous counters have all flip-flops triggered simultaneously by the same clock. Up-down, decade, and ring counters are also described. Counters are useful digital circuits that can count events and measure time/frequency.

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0% found this document useful (0 votes)
88 views16 pages

Counters: Miss. Shweta Karn

The document provides information about different types of counters. It discusses synchronous and asynchronous counters. Asynchronous counters have flip-flops that are not triggered simultaneously, with each flip-flop's output driving the next flip-flop's clock. Synchronous counters have all flip-flops triggered simultaneously by the same clock. Up-down, decade, and ring counters are also described. Counters are useful digital circuits that can count events and measure time/frequency.

Uploaded by

Kshitij Lall
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 16

COUNTERS

A SEMINAR REPORT
Submitted by
Miss. SHWETA KARN
In partial fulfillment for the award of the degree of

MASTER OF SCIENCE
IN
ELECTRONICS
at

School Of Studies in Electronics


Pt. Ravishankar Shukla University,
Raipur (C.G.)

December, 2010

i
ABSTRACT

A COUNTER IS PROBABLY ONE OF THE MOST USEFUL AND VERSATILE


SUDSYSTEM IN A DIGITAL SYSTEM. A COUNTER CAN BE DESCRIBED AS TALLYING DEVICE
THAT TALLIES OR COUNT SOME NUMBER OF EVENTS. A COUNTER IS DRIVEN BY A CLOCK
CAN BE EMPLOYED FOR COUNTING THE NUMBER OF CLOCK CYCLES. SINCE THE CLOCK
PULSE OCCUR AT FIXED AND KNOWN INTERVALS, THE COUNTER CAN BE USED AS A
DIGITAL INSTRUMENT TO MEASURE TIME AND THEREFORE PERIOD OR FREQUENCY. THEY
ARE OF TWO TYPES SYNCHRONOUS AND ASYNCHRONOUS COUNTER. IN SYNCHRONOUS
COUNTER ALL FLIP-FLOPS IS TRIGGERED SYNCHRONISM. AND IN ASYNCHRONOUS
COUNTER THE FLIP-FLOPS ARE NOT TRIGGERED INA SYNCROHNISM MANNER. THE
PREVIOUS FLIP-FLOP DRIVES THE NEXT FLIP-FLOP. THE COUNTER COUNTS IN THE UP
DIRECTION THAT IS, THE DECIMAL EQUIVALENT OF THE COUNTER OUTPUT INCREASES
WITH SUCCESSIVE CLOCK PULSES. IT IS ALSO POSSIBLE TO MAKE A COUNTER IN WHICH
THE DECIMAL EQUIVALENT OF THE COUNTER OUTPUT DECREASES WITH THE
APPLICATION OF SUCCESSIVE CLOCK PULSES THAT IS, THE COUNTING PROCEEDS IN THE
DOWN DIRECTION. THE FORMER IS REFERRED TO AS AN UP COUNTER AND LATER AS A
DOWN COUNTER. IN THIS COUNTER AS THE NAME DEPICTS, THE OUTPUT OF THE FLIP
FLOP AND THE D INPUT OF THE SUCCESSIVE FLIP FLOP ARE CONNECTED IN SUCH A WAY
THAT IT FORMS A RING. IF THE SERIAL OUTPUT Q0 OF THE SHIFT REGISTER IS CONNECTED
BACK TO THE SERIAL INPUT, THEN AN INJECTED PULSE WILL KEEP CIRCULATING. THIS IS
REFERRED AS RING COUNTER. A DECADE COUNTER NEEDS A MODE 10 COUNTER AS THE
DIGITS SPAN FROM 0 TO9. THESE NUMBER REPRESENT THE 10 STATES THROUGH WHICH
THE COUNTER MUST CYCLE. TO MAKE DECADE COUNTER OUR REQUIREMENT IS THAT BY
ADDING OF A COMBINATIONAL CIRCUIT WHICH SERVES TO RECYCLE THE COUNTER
AFTER 10 COUNTS. THIS CAN BE EASILY ACHIEVED BY MONITORING THE OUTPUT BITS OF
THE FOUR BIT COUNTER WITH A NAND GATE AND ON REACHING THE STATE 1010 BY
CONTAINING THE OUTPUT OF F/F B AND D AS THE INPUTS TO NAND GATE.
• COUNTERS AS THE NAME SUGGEST IS SPECIFICALLY USED WHERE WE NEED TO DO
CALCULATIONS E.G. IN CALCULATORS ETC

ii
ACKNOWLEDGEMENT

I AVAIL THIS OPPORTUNITY TO EXPRESS MY WHOLEHEARTED GRATITUDE TO OUR


PROFESSORS FOR GIVING ME THE OPPORTUNITY TO UNDERTAKE THE PROJECT.
I ALSO EXPRESS MY SINCERE THANKS TO THE PROFESSOR FOR RENDERING HIS
VALUABLE TIME TO MAKE ME UNDERSTAND THE VARIOUS ASPECTS OF FUNCTIONING HIS
INSPIRATION & MORAL SUPPORT.
AND ABOVE ALL I AM ALSO GRATEFUL TO OUR RESPECTABLE HEAD OF DEPARTMENT
PROF. R.C. AGRAWAL FOR ALLOWING ME TO USE THE FACILITIES AVAILABLE IN THE S.O.S.
IN ELECTRONICS DEPARTMENT WHICH HELPED ME TO PRESENT THIS PROJECT IN A NICE
FORM.

iii
TABLE OF CONTENTS
CHAPTER NO. TITLE PAGE NO.
1.  INTRODUCTION v-ix
 COUNTER
 TYPES OF COUNTER
 WHAT IS SYNCHRONOUS COUNTER
AND ITS OPERATION
 WHAT IS ASYNCHRONOUS COUNTER
AND ITS OPERATION

2.  UP-DOWN COUNTER AND ITS OPERATION x-xiii


 DECADE COUNTER AND ITS OPERATION
 RING COUNTER AND ITS OPERATION
 APPLICATIONS

iv
CHAPTER-1

INTRODUCTION
LOGIC CIRCUIT MAY BE CLASSIFIED INTO TWO CATEGORIES I.E., COMBINATIONAL
LOGIC CIRCUITS AND SEQUENTIAL LOGIC CIRCUITS. A COMBINATIONAL LOGIC
CIRCUIT CONTAINS LOGIC GATES ONLY BUT DOES NOT CONTAIN STORAGE ELEMENTS.
SEQUENTIAL LOGIC CIRCUITS CONTAINS STORAGE ELEMENTS IN ADDITION TO LOGIC
GATES. IN COMBINATIONAL CIRCUITS THE OUTPUT AT ANY INSTANT OF TIME DEPEND
UPON THE INPUTS PRESENT AT THAT INSTANT OF TIME THIS MEANS THERE IS NO
MEMORY ELEMENT IN THIS CIRCUIT. THERE IS OTHER TYPE OF CIRCUITS IN WHICH
OUTPUT AT ANY INSTANT OF TIME DEPENDS UPON THE PRESENT INPUT AS WELL AS
PAST INPUT/OUTPUT. THIS MEANS THAT THERE ARE ELEMENTS USED TO STORE AS
PAST INFORMATION. THESE ELEMENTS ARE KNOWN AS MEMORY .SUCH CIRCUITS ARE
KNOWN AS SEQUENTIAL CIRCUITS.
Counter
A COUNTER IS ONE OF THE MOST USEFUL AND VERSATILE SUB SYSTEMS IN A
DIGITAL SYSTEM. A COUNTER CAN BE DESCRIBED AS TALLYING DEVICE THAT
TALLIES OR COUNT SOME NUMBER OF EVENTS. A COUNTER IS DRIVEN BY A CLOCK
CAN BE EMPLOYED FOR COUNTING THE NUMBER OF CLOCK CYCLES. SINCE THE
CLOCK PULSE OCCUR AT FIXED AND KNOWN INTERVALS, THE COUNTER CAN BE
USED AS A DIGITAL INSTRUMENT TO MEASURE TIME AND THEREFORE PERIOD OR
FREQUENCY.

TYPES OF COUNTERS

BASICALLY THE COUNTER IS OF TWO TYPES


1. ASYNCHRONOUS COUNTER
2. SYNCHRONOUS COUNTER

ASYNCHRONOUS COUNTER
A DIGITAL COUNTER IN WHICH ALL THE FLIP-FLOPS ARE NOT TRIGGERED
SIMULTANEOUSLY. IN THIS COUNTER, TRAILING EDGED TRIGGERED FLIP-FLOPS ARE
USED .FLIP-FLOPS ARE CONNECTED IN SUCH A WAY THAT OUTPUT OF FLIP-FLOP IS FED
TO THE SUCCESSIVE FLIP-FLOP CLOCK INPUT.

v
OPERATION OF ASYNCHRONOUS COUNTER

THREE TRAILING EDGE TRIGGERED FLIP- FLOPS CONNECTED TO FORM A ASYNCHRONOUS


OR RIPPLE COUNTER ARE SHOWN.
THE COUNTER IS INITIALLY RESET TO 000. WHEN THE FIRST CLOCK PULSE IS APPLIED FF1
TOGGLES AT THE NEGATIVE GOING EDGE OF THIS PULSE. THEREFORE Q0 GOES FROM LOW
TO HIGH .THIS BECOMES A POSITIVE GOING SIGNAL AT THE CLOCK INPUT OF FF2. SO FF2
IS NOT AFFECTED AND HENCE THE STATE OF THE COUNTER AFTER ONE CLOCK PULSE IS
001. AT THE NEGATIVE GOING EDGE OF THE SECOND CLOCK PULSE FF1 TOGGLES. SO Q0
CHANGES FROM HIGH TO LOW AND THIS NEGATIVE GOING SIGNAL APPLIED TO CLOCK OF
FF 2, ACTIVATES FF2 AND HENCE Q1 GOES FROM LOW TO HIGH THUS WE GET OUTPUT 010.
IN THIS WAY IT WILL COUNT UP TO 111 AT THE SEVENTH CLOCK PULSE, AND AT THE
EIGHTH CLOCK PULSE ALL FF RESET TO 0. IN THIS COUNTER, INPUT OF FLIP-FLOP IS
OBTAINED FROM ITS PRECEDING FLIP-FLOP SO TRIGGER MOVES FROM FIRST FLIP-FLOP TO
LAST FLIP-FLOP LIKE A RIPPLE IN WATER THAT IS WHY THIS COUNTER IS CALLED THE
RIPPLE COUNTER.

vi
TIMING DIAGRAM OF RIPPLE COUNTER

TIMING DIAGRAM FOR A 3-BIT RIPPLE COUNTER SHOWING THREE OUTPUT STATES FOR
EACH OF THE FIRST EIGHT PERIODS OF THE CLOCK COUNT PULSES .AT THE FIRST CLOCK
PULSE IT WILL COUNT 001.AT THE SECOND CLOCK PULSE IT WILL COUNT 010 AND AT THE
THIRD CLOCK PULSE IT WILL COUNT 011. IN THE SAME WAY AT THE SEVENTH CLOCK
PULSE IT WILL COUNT 111. AND AT EIGHTH CLOCK PULSE IT AGAIN RESET TO 000. IN THE
SAME WAY AT THE NINETH CLOCK PULSE IT WILL COUNT 001 ETC.

TRUTH TABLE OF ASYNCHRONOUS COUNTER


Q2 Q1 Qo clock pulse
0 0 0 0
0 0 1 1
0 1 0 2
0 1 1 3
1 0 0 4
1 0 1 5
1 1 0 6
1 1 1 7
0 0 0 8

vii
FROM THE TABLE IT CAN BE SEEN THAT OUTPUT OF A COUNTER IS A BINARY EQUIVALENT OF NUMBERS OF CLOCK PULSES THAT

HAVE OCCURRED. THE COUNTER IS A THREE BIT COUNTER SO BINARY NUMBERS THAT CAN BE COUNTED WITH THIS COUNTER ARE

FROM 000 TO 111. AS WE HAVE ALREADY DISCUSSED THAT AN ARRAY OF N FLIP-FLOPS HAS 2 N
OUTPUT STATES AND CAN

COUNT NUMBERS UP TO 2 -1. THIS COUNTER HAS 23=8 OUTPUT AND CAN COUNT NUMBERS UPTO 23-1=7. A 3-BIT COUNTER
N
IS

ALSO REFERRED TO AS A MODULUS -8 COUNTER BECAUSE IT HAS 8 POSSIBLE STATES. THE MODULUS OF A COUNTER IS THE

TOTAL NUMBER OF STATES THROUGH WHICH THE COUNTER CAN PASS.

SYNCHRONOUS COUNTER

THE RIPPLE COUNTER IS SIMPLEST TO BUILD, BUT THERE IS A LIMIT TO ITS HIGHEST OPERATING FREQUENCY. THIS DRAWBACK

HAS BEEN OVERCOME IN SYNCHRONOUS COUNTER BY TRIGGERING EVERY FLIP FLOP IN SYNCHRONISM WITH THE CLOCK. SO IN

THIS COUNTER, SETTING TIME IS EQUAL TO THE PROPAGATION DELAY TIME OF A SINGLE FLIP FLOP. SINCE IN THIS COUNTER,

EVERY FLIP FLOP IS TRIGGERED IN SYNCHRONISM WITH THE CLOCK. SO IT IS CALLED SYNCHRONOUS COUNTER.

3-BIT SYNCHRONOUS COUNTER

viii
Operation of synchronous counter

CIRCUIT DIAGRAM OF A 3-BIT SYNCHRONOUS COUNTER IS SHOWN ABOVE. IN THIS


COUNTER TWO AND GATE ARE ALSO USED WITH THREE T-FLIP-FLOPS. ALL THE FLIP-FLOP
ARE TRIGGERED BY THE SAME CLOCK SIGNAL. T-INPUT TERMINAL OF FLIP-FLOP A IS
SUPPLIED WITH HIGH LEVEL SIGNAL, SO FLIP-FLOP A TOGGLES JUST AT THE END OF
EVERY PULSE.T-INPUT OF FLIP-FLOP B IS SUPPLIED WITH THE AND GATE A1, AND GATE A1
TURNS ON ONLY OUTPUT OF FLIP-FLOP A IS HIGH AND ONLY DURING TN OUTPUTS OF
FLIP-FLOP C TOGHIS DURATION FLIP-FLOP B TOGGLES. FLIP-FLOP C SUPPLIED WITH THE
AND GATE A2, AND GATE A2 TURNS ON ONLY WHEN OUTPUT OF FLIP-FLOP B & AND GATE
A1 ARE HIGH AND ONLY DURING THIS PERIOD FLIP-FLOP C TOGGLES. INITIALLY ALL FLIP
FLOP ARE RESET TO ZERO, SO OUTPUT IS 000. BUT JUST AT THE END OF FIRST CLOCK
PULSE, FLIP FLOP A TOGGLES AND OUTPUT QA CHANGES FROM LOGIC 0 TO 1, WHICH ALSO
TURNS ON AND GATE A1.THIS DOES MAKE ANY CHANGE IN THE OUTPUT STATES OF FLIP
FLOP B AND FLIP FLOP C BECAUSE T INPUT TERMINALS OF FLIP FLOP B AND C WERE AT
LOGIC 0, BEFORE THE ARRIVAL OF THE FIRST CLOCK PULSE. INPUT TERMINAL T OF THE
FLIP FLOP A AND B ARE AT LOGIC 1 BEFORE THE ARRIVAL OF SECOND CLOCK PULSE, SO
THEY TOGGLE JUST AT THE END OF SECOND CLOCK PULSE.

TIMING DIAGRAM OF SYNCHRONOUS COUNTER

ix
TRUTH TABLE FOR SYNCHRONOUS COUNTER

QB QB QA CLOCK
PULSE
0 0 0 0
0 0 1 1
0 1 0 2
0 1 1 3
1 0 0 4
1 0 1 5
1 1 0 6
1 1 1 7
0 0 0 8

FROM THE TRUTH TABLE IT IS CLEAR THAT FOR THE FIRST CLOCK PULSE THE OUTPUT IS
001 AND FOR THE SECOND CLOCK PULSE THE OUTPUT IS 010. SO, IN THE SAME WAY FOR
SEVENTH CLOCK PULSE IT WILL BE 111. AND AT EIGHTH CLOC PULSE ALL THE FLIP-FLOP
RESET TO 000.IN SYNCHRONOUS COUNTER THE SETTLING IME OF THE COUNTER IS EQUAL
TO THE PROPAGATION DELAY TIME OF EACH FLIP-FLOP.

x
CHAPTER-2

UP-DOWN COUNTER

THE COUNTER COUNTS IN THE UP DIRECTION THAT IS, THE DECIMAL EQUIVALENT OF
THE COUNTER OUTPUT INCREASES WITH SUCCESSIVE CLOCK PULSES. IT IS ALSO
POSSIBLE TO MAKE A COUNTER IN WHICH THE DECIMAL EQUIVALENT OF THE
COUNTER OUTPUT DECREASES WITH THE APPLICATION OF SUCCESSIVE CLOCK PULSES
THAT IS, THE COUNTING PROCEEDS IN THE DOWN DIRECTION. THE FORMER IS
REFERRED TO AS AN UP COUNTER AND LATER AS A DOWN COUNTER.

DIAGRAM OF UP-DOWN COUNTER

xi
RING COUNTER

IN THIS COUNTER AS THE NAME DEPICTS, THE OUTPUT OF THE FLIP FLOP AND THE D
INPUT OF THE SUCCESSIVE FLIP FLOP ARE CONNECTED IN SUCH A WAY THAT IT FORMS
A RING.
IF THE SERIAL OUTPUT Q0 OF THE SHIFT REGISTER IS CONNECTED BACK TO THE
SERIAL INPUT, THEN AN INJECTED PULSE WILL KEEP CIRCULATING. THIS CKT IS
REFERRED AS RING COUNTER

Diagram of Ring counter

Operation of Ring Counter

TO INITIATE THE RING COUNTER, RESET SIGNAL IS APPLIED TO COUNTER WHICH


PRESETS THE F/F A AND RESETS THE OTHER F/F. NOW OUTPUT OF F/F A, QA IS HIGH
AND OTHER OUTPUTS ARE LOW. SO OUTPUT IS 0001.NOW BEFORE THE ARRIVAL OF
FIRST CLOCK PULSE, ONLY INPUT OF F/F B IS HIGH AND ALL OTHER F/F ARE LOW.
DURING THE NEGATIVE TRANSITION OF FIRST CLOCK PULSE. ALL INPUT SIGNALS OF
F/F GET TRANSFERRED TO THEIR OUTPUT. SO OUTPUT BECOME 0010.THIS CONTINUES
FOR EVERY NEXT PULSE AND SIGNAL OF HIGH BIT MOVES FROM 1ST F/F TO LAST F/F &
FROM LAST F/F TO FIRST F/F AND AGAIN TO LAST F/F.

xii
TRUTH TABLE FOR RING COUNTER

Qa Qb Qc Qd Clock pulse
1 0 0 0 0
0 1 0 0 1
0 0 1 0 2
0 0 0 1 3
1 0 0 0 4 next cycle
0 1 0 0 5
0 0 1 0 6
0 0 0 1 7
1 0 0 0 8 Next cycle

FOR THE FIRST CLOCK PULSE THE OUTPUT IS 0001 AND FOR THE SECOND CLOCK
PULSE THE OUTPUT IS 0010 AND FOR THIRD CLOCK PULS ETHE OUTPUT IS O100 AND FOR
THE FOURTH CLOCK PULSE THE OUTPUT IS 1000 AND THEN AGAIN FOR THE FIFTH CLOCK
PULSE THE OUTPUT IS 0100. IT MEANS THAT FOR EVERY CLOCK PULSE THE 1 IS SHIFTING
FROM ITS POSITION. AND AFTER THE FOURTH CLOCK PULSE IT AGAIN RECYCLE THE
PROCESS.THIS CONTINUES FOR EVERY NEXT PULSE AND SIGNAL OF HIGH BIT MOVES
FROM FIRST FLIP-FLOP TO LAST FLIP-FLOP AND FROM LAST FLIP-FLOP TO THE FIRST FLIP-
FLOP.

DECADE COUNTER

A DECADE COUNTER NEEDS A MODE 10 COUNTER AS THE DIGITS SPAN FROM 0 TO9. THESE
NUMBER REPRESENT THE 10 STATES THROUGH WHICH THE COUNTER MUST CYCLE. TO
MAKE DECADE COUNTER OUR REQUIREMENT IS THAT BY ADDING OF A COMBINATIONAL
CIRCUIT WHICH SERVES TO RECYCLE THE COUNTER AFTER 10 COUNTS. THIS CAN BE
EASILY ACHIEVED BY MONITORING THE OUTPUT BITS OF THE FOUR BIT COUNTER WITH A
NAND GATE AND ON REACHING THE STATE 1010 BY CONTAINING THE OUTPUT OF F/F B
AND D AS THE INPUTS TO NAND GATE

xiii
MOD-10 DECADE COUNTER

OPERATION OF DECADE COUNTER

DECADE COUNTERS ESPECIALLY THE BCD TYPE FIND WIDESPREAD USE IN APPLICATION
WHERE PULSE OR EVENS ARE TO BE COUNTED AND THE RESULT DISPLAYED ON SOME
TYPE OF DECIMAL NUMERAL READOUT. A DECADE COUNTER IS ALSO OFTEN AND USED
FOR DIVIDING A PULSE FREQUENCY EXACTLY BY MOD 10.

TRUTH TABLE FOR DECADE COUNTER

QD QB QC QA CLOCK
PULSE
0 0 0 0 O
0 0 0 1 1
0 0 1 0 2
0 0 1 1 3
0 1 0 0 4
0 1 0 1 5
0 1 1 0 6
0 1 1 1 7
1 0 0 0 8
1 0 0 1 9

xiv
FROM THE TRUTH TABLE AS SHOWN ABOVE WE CONCLUDE THAT FOR THE FIRST CLOCK
PULSE ALL THE FLIP-FLOP RESET TO 0.NOW FOR SECOND CLOCK PULSE THE OUTPUT WILL
BE 0001 AND AT THIRD CLOCK PULSE THE OUTPUT WILL BE 0010. IN THIS WAY AT THE
EIGHTH CLOCK PULSE THE OUTPUT WILL BE 1000 AND AT THE NINETH CLOCK PULSE THE
OUTPUT WILL BE 1001. NOW AT THE TENTH CLOCK PULSE ALL FLIP-FLOP WILL BE RESET
TO0. IN THIS WAY THE DECADE COUNTER COUNT FROM 0000 TO 1001. AND IT IS
COMMONLY KNOWN AS BCD COUNTER.

APPLICATIONS

• COUNTERS AS THE NAME SUGGEST IS SPECIFICALLY USED WHERE WE NEED TO DO


CALCULATIONS E.G. IN CALCULATORS ETC
• AND IN GENERATING SEQUENTIAL PULSES

xv
REFRENCES

[1] A ANAND KUMAR, FUNDAMENTALS OF DIGITAL CIRCUITS

[2] R.P.JAIN, MODERN DIGITAL ELECTRONICS, ELEVENTH REPRINT 2007,


TATA McGraw-HILL

[3] J.B.GUPTA, ELECTRONICS DEVICES AND CIRCUITS

[4] WWW.SCRIBD.COM

xvi

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