3rd N 4th Sem syllabus-VTU
3rd N 4th Sem syllabus-VTU
Sl. Subject Code Subject Teaching Teaching Examination Duration & Marks
No. Dept. hours / week
Sl. Subject Code Subject Teaching Teaching Examination Duration & Marks
No. Dept. hours / week
Unit I
1. Diode Circuits: Clippers and Limiters, Clampers
2. Special-Purpose Devices: Optoelectronic Devices, The
Schottky Diode, The Varactor, Other Diodes
6 Hours
Unit II
3. Transistor AC Models: Base-Biased Amplifier, Emitter-Biased
Amplifier, Small-Signal Operation, AC Beta, AC Resistance of
the Emitter Diode, Two Transistor Models, Analyzing an
Amplifier, AC Quantities on the Data Sheet
6 Hours
Unit III
4. Voltage Amplifiers: Voltage Gain, The Loading Effect of Input
Impedance, Multistage Amplifiers, Swamped Amplifier, Two-
Stage Feedback, Troubleshooting
5. CC and CB Amplifiers: CC Amplifier, Output Impedance,
Cascading CE and CC, Darlington Connections, Voltage
Regulation, The Common-Base Amplifier
7 Hours
Unit IV
6. Power Amplifiers: Amplifier Terms, Two Load Lines, Class A
Operation, Class B Operation, Class B Push-Pull Emitter
Follower, Biasing Class B/AB Amplifiers, Class B/AB Driver,
Class C Operation, Class C Formulas, Transistor Power Rating
7 Hours
Unit V
7. MOSFETs: The Depletion-Mode MOSFET, D-MOSFET
Curves, Depletion-Mode MOSFET Amplifiers, The
Enhancement-Mode MOSFET, The Ohmic Region, Digital
Switching, CMOS
6 Hours
Unit VI
8. Frequency Effects: Frequency Response of an Amplifier,
Decibel Power Gain, Decibel Voltage Gain, Impedance
Matching, Decibels above a Reference, Bode Plots
Text Book
Reference Books
1. Electronic Devices and Circuit Theory, Robert L. Boylestad, Louis
Nashelsky, 9th Edition, PHI/Pearson Education, 2006
Unit I
1. Digital Logic: Overview of Basic Gates and Universal Logic Gates,
AND-OR-Invert Gates, Positive and Negative Logic, Introduction to
HDL
2 Hours
2. Combinational Logic Circuits: Boolean Laws and Theorems, Sum-
of-products Method, Truth Table to Karnaugh Map, Pairs, Quads,
and Octets, Karnaugh Simplifications, Don’t Care Conditions,
Product-of-sums Method, Product-of-sums Simplification,
Simplification by Quine-McClusky Method, Hazards and Hazard
Covers, HDL Implementation Models
5 Hours
Unit II
3. Data-Processing Circuits: Multiplexers, Demultiplexers, 1-of-16
Decoder, BCD-to-Decimal Decoders, Seven-segment Decoders,
Encoders, EX -OR gates, Parity Generators and Checkers,
Magnitude Comparator, Read-only memory, Programmable Array
Logic, Programmable Logic, Troubleshooting with a Logic Probe,
HDL Implementation of Data Processing Circuits
7 Hours
Unit III
4. Arithmetic Circuits: Binary Addition, Binary Subtraction, Unsigned
Binary Numbers, Sign-Magnitude Numbers, 2’s Complement
Representation, 2’s Complement Arithmetic, Arithmetic Building
Blocks, The Adder-Subtractor, Fast Adder, Arithmetic Logic Unit,
Binary Multiplication and Division, Arithmetic Circuits using HDL
6 Hours
Unit IV
5. Clocks and Timing Circuits: Clock Waveforms, TTL Clock, Schmitt
Trigger, Monostables with Input Logic, Pulse-forming Circuits
2 Hours
6. Flip-Flops: RS Flip-flops, Gated Flip-flops, Edge-triggered RS, D,
JK Flip-flops, Flip-flop timing, JK Master-slave Flip-flops, Switch
Contact Bounce Circuits, Various Representations of Flip-flops,
Analysis of Sequential Circuits, Conversion of Flip-flops – a
synthesis example, HDL implementation of Flip-flop
5 Hours
Unit V
7. Registers: Types of Registers, Serial In-Serial Out, Serial In-Parallel
Out, Parallel In-Serial Out, Parallel In-Parallel Out, Applications of
Shift Registers, Register Implementation in HDL
2 Hours
8. Counters: Asynchronous Counters, Decoding Gates, Synchronous
Counters, Changing the Counter Modulus, Decade Counters,
Presettable Counters, Counter Design as a Synthesis Problem, A
Digital Clock, Counter Design Using HDL
5 Hours
Unit VI
9. Design of Sequential Circuit: Model Selection, State Transition
Diagram, State Synthesis Table, Design Equations and Circuit
Diagram, Implementation using Read Only Memory, Algorithmic
State Machine, State Reduction Technique, Analysis of
Asynchronous Sequential Circuit, Problems with Asynchronous
Sequential Circuits, Design of Asynchronous Sequential Circuit
6 Hours
Unit VII
10. D/A Conversion and A/D Conversion: Variable, Resistor Networks,
Binary Ladders, D/A Converters, D/A Accuracy and Resolution,
A/D Converter-Simultaneous Conversion, A/D Converter-Counter
Method, Continuous A/D Conversion, A/D Techniques, Dual-Slope
A/D Conversion, A/D Accuracy and Resolution
6 Hours
Unit VIII
11. Digital Integrated Circuits: Switching Circuits, 7400 TTL, TTL
Parameters, TTL Overview, Open-collector Gates, Three-state TTL
Devices, External Drive for TTL Loads, TTL Driving External
Loads, 74C00 CMOS, CMOS Characteristics, TTL-to-CMOS
Interface, CMOS-to TTL Interface
6 Hours
Text Book
Reference Books
Unit I
1. Set Theory: Sets and Subsets, Set Operations and the Laws of Set
Theory, Counting and Venn Diagrams, A First Word on Probability,
Countable and Uncountable Sets
6 Hours
Unit II
2. Fundamentals of Logic: Basic Connectives and Truth Tables, Logic
Equivalence – The Laws of Logic, Logical Implication – Rules of
Inference
7 Hours
Unit III
3. Fundamentals of Logic contd.: The Use of Quantifiers, Quantifiers,
Definitions and the Proofs of Theorems
6 Hours
Unit IV
4. Properties of the Integers: Mathematical Induction, The Well
Ordering Principle – Mathematical Induction, Recursive Definitions
6 Hours
Unit V
5. Relations and Functions: Cartesian Products and Relations,
Functions – Plain and One-to-One, Onto Functions – Stirling
Numbers of the Second Kind, Special Functions, The Pigeon-hole
Principle, Function Composition and Inverse Functions
7 Hours
Unit VI
6. Relations contd.: Properties of Relations, Computer Recognition –
Zero-One Matrices and Directed Graphs, Partial Orders – Hasse
Diagrams, Equivalence Relations and Partitions
7 Hours
Unit VII
7. Groups: Definitions, Examples, and Elementary Properties,
Homomorphisms, Isomorphisms, and Cyclic Groups, Cosets, and
Lagrange’s Theorem
8. Coding Theory and Rings: Elements of Coding Theory, The
Hamming Metric, The Parity Check, and Generator Matrices
6 Hours
Unit VIII
9. Group Codes: Decoding with Coset Leaders, Hamming Matrices
10. Rings and Modular Arithmetic: The Ring Structure – Definition and
Examples, Ring Properties and Substructures, The Integers Modulo
n
7 Hours
Text Book
Reference Books
Part A
C Language Features
Unit I
1. Pointers: Concepts, Pointer variables, Accessing variables through
pointers, Pointer declaration and definition, Initialization of pointer
variables, Pointers and functions, Pointer to pointers, Co mpatibility,
Lvalue and Rvalue, Arrays and pointers, Pointer arithmetic and arrays,
Passing an array to a function, Understanding complex declarations,
Memory allocation functions, Array of pointers.
7 Hours
Unit II
2. Strings: String concepts, C strings, String I/O functions, Array of strings,
String manipulation function, Memory formatting.
2 Hours
3. Derived types -Enumerated, Structure, and Union: The type definition,
Enumerated types, Structure, Accessing structures, Complex structures,
Array of structures, Structures and functions, Unions
3 Hours
4. Binary Files: Classification of Files, Using Binary Files, Standard
Library Functions for Files
2 Hours
Part B
Unit III
5. The Stack: Definition and Examples, Representing Stacks in C, An
Example – Infix, Postfix, and Prefix
7 Hours
Unit IV
6. Recursion: Recursive Definition and Processes, Recursion in C, Writing
Recursive Programs, Simulating Recursion, Efficiency of Recursion
4 Hours
7. Queues: The Queue and its Sequential Representation
2 Hours
Unit V
8. Lists: Linked Lists, Lists in C, An Example – Simulation using Linked
Lists
6 Hours
Unit VI
1. Lists contd.: Other List Structures
6 Hours
Unit VII
10. Trees: Binary Trees, Binary Tree Representations
6 Hours
Unit VIII
11. Trees contd.: Representing Lists as Binary Trees, Trees and their
applications
7 Hours
Text Books
Reference Books
Note
The Question paper consists of two parts A and B containing 2 and 6
questions respectively. The student is required to answer any 5 questions
selecting at least one question from part A.
Unit I
1. The Unix Operating System, The UNIX architecture and Command
Usage, The File System
6 Hours
Unit II
2. Basic File Attributes, The vi Editor
6 Hours
Unit III
3. The Shell, The Process, Customizing the environment
7 Hours
Unit IV
4. More file attributes, Simple filters
6 Hours
Unit V
5. Filters using regular expressions,
6 Hours
Unit VI
6. Essential Shell Programming
7 Hours
Unit VII
5. awk – An Advanced Filter
7 Hours
Unit VIII
perl - The Master Manipulator
7 Hours
Text Book
Note: In the examination each student picks one question from a lot of all 14
questions.
Part A
1. a. To study the working of positive clipper, double -ended
clipper and positive clamper using diodes.
b. To build and simulate the above circuits using a simulation
package
2. a. To determine the frequency response, input impedance,
output impedance, and bandwidth of a CE amplifier.
b. To build the CE amplifier circuit using a simulation
package and determine the voltage gain for two different
values of supply voltage and for two different values of
emitter resistance.
3. a. To determine the drain characteristics and transconductance
characteristics of an enhancement-mode MOSFET.
b. To implement a CMOS inverter using a simulation package
and verify its truthtable.
4. a. To design and implement a Schmitt trigger using Op-Amp
for given UTP and LTP values.
b. To implement a Schmitt trigger using Op-Amp using a
simulation package for two sets of UTP and LTP values.
5. a. To design and implement a rectangular waveform generator
(Op-Amp relaxation oscillator) for given frequency.
b. To implement a rectangular waveform generator (Op-Amp
relaxation oscillator) using a simulation package and observe
the change in frequency when all resistor values are doubled.
6. To design and implement an astable multivibrator circuit using
555 timer for a given frequency and duty cycle.
7. To implement a +5V regulated power supply using full-wave
rectifier and 7805 IC regulator in simulation package. Find the
output ripple for different values of load current.
Part B
1. a. Given any 4-variable logic expression, simplify using
Entered Variable Map and realize the simplified logic
expression using 8:1 multiplexer IC.
b. Write the Verilog /VHDL code for an 8:1 multiplexer.
Simulate and verify its working.
2. a. Realize a full adder using 3-to-8 decoder IC and 4 input
NAND gates.
b. Write the Verilog/VHDL code for a full adder. Simulate
and verify its working.
3. a. Realize a J-K Master/Slave Flip-Flop using NAND gates and
verify its truth table.
b. Write the Verilog/VHDL code for D Flip-Flop with
positive-edge triggering. Simulate and verify its working.
4. a. Design and implement a mod-n (n<8) synchronous up
counter using J-K Flip-Flop ICs.
b. Write the Verilog/VHDL code for mod-8 up counter.
Simulate and verify its working.
5. a. Design and implement a ring counter using 4-bit shift
register.
b. Write the Verilog/VHDL code for switched tail counter.
Simulate and verify its working.
6. Design and implement an asynchronous counter using decade
counter IC to count up from 0 to n (n<=9).
7. Design a 4-bit R-2R ladder D/A converter using Op-Amp.
Determine its accuracy and resolution.
Part A
Unit I
1. Introduction to Graph Theory: Definitions and Examples,
Subgraphs, Complements, and Graph Isomorphism, Vertex Degree,
Euler Trails and Circuits
7 Hours
Unit II
2. Introduction to Graph Theory contd.: Planar Graphs, Hamilton Paths
and Cycles, Graph Colouring, and Chromatic Polynomials
6 Hours
Unit III
3. Trees: Definitions, Properties, and Examples, Routed Trees, Trees
and Sorting, Weighted Trees and Prefix Codes
6 Hours
Unit IV
4. Optimization and Matching: Dijkstra’s Shortest Path Algorithm,
Minimal Spanning Trees – The algorithms of Kruskal and Prim,
Transport Networks – Max-flow, Min -cut Theorem, Matching
Theory
7 Hours
Part B
Unit V
5. Fundamental Principles of Counting: The Rules of Sum and
Product, Permutations, Combinations – The Binomial Theorem,
Combinations with Repetition, The Catalon Numbers
6 Hours
Unit VI
6. The Principle of Inclusion and Exclusion: The Principle of Inclusion
and Exclusion, Generalizations of the Principle, Derangements –
Nothing is in its Right Place, Rook Polynomials
6 Hours
Unit VII
7. Generating Functions: Introductory Examples, Definition and
Examples – Calculational Techniques, Partitions of Integers, The
Exponential Generating Function, The Summation Operator
7 Hours
Unit VIII
8. Recurrence Relations: First Order Linear Recurrence Relation, The
Second Order Linear Homogeneous Recurrence Relation with
Constant Coefficients, The Non-homogeneous Recurrence Relation,
The Method of Generating Functions
7 Hours
Text Book
1. Discrete and Combinatorial Mathematics, Ralph P. Grimaldi, 5th
Edition, PHI/Pearson Education, 2004
(Chapter 11, Chapter 12.1 to 12.4, Chapter 13, Chapter 1, Chapter
8.1 to 8.4, Chapter 9 Chapter 10.1 to 10.4)
Reference Books
1. Graph Theory and Combinatorics, Dr. D.S. Chandrasekharaiah,
Prism, 2005
2. Introduction to Graph Theory, Chartrand Zhang, TMH, 2006
3. Introductory Combinatorics, Richard A. Brualdi, 4th Edition,
Pearson Prentice Hall, 2004
4. Graph Theory Modeling, Applications, and Algorithms, Geir
Agnarsson & Raymond Geenlaw, Pearson Prentice Hall, 2007
Note
The Question paper consists of two parts A and B containing 4
questions each. The student is required to answer any 5 questions
selecting at least two questions from each part.
Unit I
1. Introduction: What is an Algorithm?, Fundamentals of Algorithmic
Problem Solving, Important Problem Types, Fundamental Data
Structures
6 Hours
Unit II
2. Fundamentals of the Analysis of Algorithm Efficiency: Analysis
Framework,
3. Asymptotic Notations and Basic Efficiency Classes, Mathematical
Analysis of Nonrecursive and Recursive Algorithms, Example –
Fibonacci Numbers
6 Hours
Unit III
4. Brute Force: Selection Sort and Bubble Sort, Sequential Search and
Brute-Force String Matching, Exhaustive Search
5. Divide and Conquer: Mergesort, Quicksort, Binary Search
6 Hours
Unit IV
6. Divide and Conquer contd.: Binary tree traversals and related
properties, Multiplication of large integers and Stressen’s Matrix
Multiplication.
7. Decrease and Conquer: Insertion Sort, Depth First Search, Breadth
First Search, Topological Sorting,
Algorithms for Generating Combinatorial Objects
7 Hours
Unit V
8. Transform and Conquer: Presorting, Balanced Search Trees, Heaps
and Heapsort, Problem Reduction
9. Space and Time Tradeoffs: Sorting by Counting, Input Enhancement
in String Matching
7 Hours
Unit VI
10. Space and Time Tradeoff contd.: Hashing
11. Dynamic Programming: Computing a Binomial Coefficient,
Warshall’s and Floyd’s Algorithms, The Knapsack Problem and
Memory Functions
6 Hours
Unit VII
12. Greedy Technique: Prim’s Algorithm,Kruskal’s Algorithm,
Dijkstra’s Algorithm, Huffman Trees
13. Limitations of Algorithm Power: Lower-Bound Arguments, Decision
Trees
7 Hours
Unit VIII
14. Limitations of Algorithm Power contd.: P, NP and NP-Complete
Problems
15. Coping with the Limitations of Algorithm Power: Backtracking,
Branch-and-Bound, Approximation Algorithms for NP-Hard
Problems
7 Hours
Text Book
1. Introduction to The Design & Analysis of Algorithms, Anany
Levitin, 2nd Edition, Pearson Education, 2007
(Chapter 1, 2.1 to 2.5, 3.1, 3.2, 3.4, 4.1 to 4.5, 5.1 to 5.4, 6.1, 6.3,
6.4, 6.6, 7.1 to 7.3, 8.1, 8.2, 8.4, 9, 11.1, 11.2, 11.3, 12.1, 12.2, 12.3)
Reference Books
1. Introduction to Algorithms, Thomas H. Cormen, Charles E.
Leiserson, Ronal L. Rivest, Clifford Stein, 2nd Edition, PHI, 2006
Unit I
1. Introduction to C++: A Review of Structures, Procedure-Oriented
Programming Systems, Object-Oriented Programming Systems,
Comparison of C++ with C, Console Input/Output in C++, Variables
in C++, Reference Variables in C++, Function Prototyping,
Function Overloading, Default Values for Formal Arguments of
Functions, Inline Functions
4 Hours
2. Class and Objects: Introduction to Classes and Objects
2 Hours
Unit II
3. Class and Objects contd.: Member Functions and Member Data,
Objects and Functions, Objects and Arrays, Namespaces, Nested
Classes
6 Hours
Unit III
4. Dynamic Memory Management: Introduction, Dynamic Memory
Allocation, Dynamic Memory Deallocation, The set_new_handler()
function
5. Constructors and Destructors: Constructors, Destructors, The
Philosophy of OOPS
7 Hours
Unit IV
6. Inheritance: Introduction to Inheritance, Base Class and Derived
Class Pointers, Function Overriding, Base Class Initialization, The
Protected Access Specifier, Deriving by Different Access Specifiers,
Different Kinds of Inheritance, Order of Invocation of Constructors
and Destructors
6 Hours
Unit V
7. Virtual Functions and Dynamic Polymorphism: The Need for
Virtual Functions, Virtual Functions, The Mechanism of Virtual
Functions, Pure Virtual Functions, Virtual Destructors and Virtual
Constructors
8. Stream Handling: Streams, The Class Hierarchy of Handling
Streams, Text and Binary Input/Output, Text Versus Binary Files,
Text Input/Output, Binary Input/Output
6 Hours
Unit VI
9. Stream Handling contd.: Opening and Closing Files, Files as
Objects of the fstream Class, File Pointer, Random Access to Files,
Object Input/Output through Member Functions, Error Handling,
Manipulators
10. Operator Overloading: Operator Overloading, Overloading the
Various Operators – Overloading the Increment and the Decrement
Operators (Prefix and Postfix), Overloading the Unary Minus and
the Unary Plus Operator, Overloading the Arithmetic Operators
7 Hours
Unit VII
11. Operator Overloading contd.: Overloading the Relational Operators,
Overloading the Assignment Operator, Overloading the Insertion
and Extraction Operators, Overloading the new and the delete
Operators, Overloading the Subscript Operator, Overloading the
Pointer-to-member (->) Operator (Smart Pointer)
7 Hours
Unit VIII
12. Type Conversion, New Style Casts, and RTTI
13. Templates: Introduction, Function Templates, Class Templates, The
Standard Template Library (STL)
14. Exception Handling: Introduction, C-Style Handling of Error-
generating Codes, C++ Style Solution – the try/throw/catch
Construct, Limitation of Exception Handling
7 Hours
Text Book
Reference Books
Microprocessors
(Common to CSE & ISE)
Reference Books
Computer Organization
(Common to CSE & ISE)
Unit I
1. Basic Structure of Computers: Computer Types, Functional Units,
Basic Operational Concepts, Bus Structures, Performance –
Processor Clock, Basic Performance Equation, Clock Rate,
Performance Measurement, Historical Perspective
2. Machine Instructions and Programs: Numb ers, Arithmetic
Operations and Characters, Memory Location and Addresses,
Memory Operations, Instructions and Instruction Sequencing,
6 Hours
Unit II
3. Machine Instructions and Programs contd.: Addressing Modes,
Assembly Language, Basic Input and Output Operations, Stacks and
Queues, Subroutines, Additional Instructions, Encoding of Machine
Instructions
7 Hours
Unit III
4. Input/Output Organization: Accessing I/O Devices, Interrupts –
Interrupt Hardware, Enabling and Disabling Interrupts, Handling
Multiple Devices, Controlling Device Requests, Exceptions, Direct
Memory Access, Buses
6 Hours
Unit IV
5. Input/Output Organization contd.: Interface Circuits, Standard I/O
Interfaces – PCI Bus, SCSI Bus, USB
6 Hours
Unit V
6. Memory System: Basic Concepts, Semiconductor RAM Memories,
Read Only Memories, Speed, Size, and Cost, Cache Memories –
Mapping Functions, Replacement Algorithms, Performance
Considerations
6 Hours
Unit VI
7. Memory System contd.: Virtual Memories, Secondary Storage
8. Arithmetic: Addition and Subtraction of Signed Numbers, Design of
Fast Adders
7 Hours
Unit VII
9. Arithmetic contd.: Multiplication of Positive Numbers, Signed
Operand Multiplication, Fast Multiplication, Integer Division,
Floating-point Numbers and Operations
7 Hours
Unit VIII
10. Basic Processing Unit: Some Fundamental Concepts, Execution of a
Complete Instruction, Multiple Bus Organization, Hard-wired
Control, Microprogrammed Control
7 Hours
Text Book
Reference Books
Microprocessor Laboratory
(Common to CSE and ISE)
Note:
• Develop and execute the following programs using an
8086 Assembly Language. All the programs to be
executed using an assembler like MASM, TASM etc.
• Program should have suitable comments.
• The board layout and the circuit diagram of the interface
are to be provided to the student during the examination.
Note: In the examination each student picks one question from a lot of
all 15 questions.
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