1

Seat No.: _____ Enrolment No.______

GUJARAT TECHNOLOGICAL UNIVERSITY
Diploma Semester -III Remedial Examination May - 2011

Subject code: 331102
Subject Name: Digital Electronics
Date: 25 /05 /2011 Time: 02.30 pm 05.00 pm
Total Marks: 70
Instructions:
1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.
4. English version Authentic

Q.1 (a) Do following Conversions
(1) (B3F)
16
=( ______)
10
(2) (10101110101)
2
=( _____ )
8

(3) (1001.101)
2
=( ______)
10
(4) (121)
8
=( ______)
10

08
(b) Draw Gray To Binary Code Converter Circuit and find Binary Equivalent of
Gray code (1011011) .
04
(c) Write De-Morgan Theorems and Prove any one Using Truth table. 02
Q.2
(a) Differentiate between Combinational Logic Circuits and Sequential Logic
Circuits.
07
(b) What is Multiplexer? Draw Circuit of 4X1 MUX ,write Truth table and Explain
it.
07
OR
(b) What is Decoder? Draw 3 to 8 Line Decoder and State any one Application of
circuit
07
Q.3
(a) Minimize Boolean equation F(A,B,C) = (1,3) +dont care(0,2,5,7) using K-
map
04
(b) Why NAND Gate is known as an Universal Gate? Draw circuit diagram of
Exclusive OR operation using NAND gates only.
04
(c) What is Triggering of flip flops? List Types of Triggering and Explain each in
detail
06
OR
Q.3 (a) Explain following Terms
(1)Propagation Delay (2) EPROM (3) Fan Out (4) VLSI
04
(b) Draw Circuit Diagram and symbol of T-Flip Flop and write Truth Table, also
Explain why it is known as Toggle Flip Flop?
04
(c) Design Full Adder circuit . 06
Q.4
(a) List Types of ADC and Explain working of Successive approximation type ADC. 07
(b) Draw circuit diagram and Explain working of BCD Asynchronous Counter 07
OR
Q. 4 (a) Describe 4-bit Serial Input Shift right Register and explain its working by
giving waveforms .
07
(b) What is resolution? Draw Weighted Resistors type DAC and explain its
working.
07
Q.5
(a) Draw Circuit Diagram of TTL NAND gate with Totem Pole output and explain
its working .
07
2

(b) Draw 3 X 8 line Decoder circuit using two 2 X 4 decoders. 07
OR
Q.5 (a) What is PLA? Draw PLA circuit for F(A,B)=(0,3) and explain. 07
(b) Describe 4-Bit Ring Counter by drawing circuit diagram and truth Table 07


5| `Gv! 5| `Gv! 5| `Gv! 5| `Gv! V
- 3
(1) (B3F)
16
= ( ______)
10
(2) (10101110101)
2
=( _____ )
8

(3) (1001.101)
2
= ( ______)
10
(4) (121)
8
= ( ______)
10

08
A
7 l 3 l 7 (1011011)

=
l 3 .
04
S
l- | .
02



5| `GvZ 5| `GvZ 5| `GvZ 5| `GvZ V
~ % l 5 l .
07
A
Cl5 ? 4X1 Cl5 l , =
.
07
VYJF VYJF VYJF VYJF
A
l ? 2 8 = (2X8) l |
.
07
5| `Gv# 5| `Gv# 5| `Gv# 5| `Gv#

V
F(A,B,C) = (1,3) + dont care(0,2,5,7) -
04
A
NAND ? 5O | ? NAND
l .
04
S
ll ? ll .
06
VYJF VYJF VYJF VYJF
5| `Gv# 5| `Gv# 5| `Gv# 5| `Gv#
V
.(1) Propagation Delay (2) EPROM (3) Fan Out (4) VLSI
04
A
l- S S | , ~ = .
S S .
04
S
3 | l .
06
5| `Gv$ 5| `Gv$ 5| `Gv$ 5| `Gv$

V
l 5 H l =
07
A
l l5 u | = .
07
VYJF VYJF VYJF VYJF
5| `Gv$ 5| `Gv$ 5| `Gv$ 5| `Gv$ V
4- l S | | , = .
07
A
lC ? = l ... .
07
5| `Gv5 5| `Gv5 5| `Gv5 5| `Gv5

V
TTL NAND = | l ..
07
A
2X4 l 2 X 8 l | .
07
VYJF VYJF VYJF VYJF
5| `Gv5 5| `Gv5 5| `Gv5 5| `Gv5 V
... ?F(A,B)=(0,3) ...| l .
07
A
4- l u | = .
07

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