Fan Control AUTOMATIC Fan Control Abstract
Fan Control AUTOMATIC Fan Control Abstract
Features
o Integrated Thermal Measurement and Fan Regulation o Programmable Fan Threshold Temperature o Programmable Temperature Range for Full-Scale Fan Speed o Accurate Closed-Loop Fan-Speed Regulation o On-Chip Power Device Drives Fans Rated Up to 250mA o Programmable Under/Overtemperature Alarms o SPI-Compatible Serial Interface o 1C (+60C to +100C) Thermal-Sensing Accuracy
MAX6661
Ordering Information
PART MAX6661AEE TEMP RANGE -40C to +125C PIN-PACKAGE 16 QSOP
Applications
Telecom Systems Servers Workstations Electronic Instruments
1F 5k
VFAN
VCC ALERT
FAN
TACH IN
OVERT
MAX6661
SC SDIN DOUT SPI CLOCK SPI DATA IN SPI DATA OUT SPI CHIP SELECT
DXN
CS
Pin Configuration appears at end of data sheet. SPI is a trademark of Motorola, Inc.
PENTIUM
AGND PGND
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxims website at www.maxim-ic.com.
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 3V to 5.5V, VFAN = 12V, TA = -40C to +125C, unless otherwise specified. Typical values are at VCC = 3.3V and TA = +25C.) (Notes 1 and 2)
PARAMETER ADC AND POWER SUPPLY Temperature Resolution (Note 3) Remote-Junction Temperature Measurement Error (Note 4) Fan-Speed Measurement Accuracy VCC Supply Voltage Range VFAN Supply Voltage Range Conversion Time Conversion Rate Timing Error Undervoltage Lockout (UVLO) Threshold UVLO Threshold Hysteresis POR Threshold (VCC) POR Threshold Hysteresis Standby Supply Current Operating Supply Current DXN Source Voltage TACH Input Transition Level TACH Input Hysteresis TACH Input Resistance Fan Output Current Fan Output Current Limit Fan Output On-Resistance IF IL RONF (Note 5) 250mA load 250 320 4 410 ISHDN ICC VDXN VFAN = 12V VFAN = 12V Shutdown, configuration bit 6 = 1 Fan off VUVLO VHYST VCC rising 1.4 VCC falling -25 2.50 2.80 90 2.0 90 3 450 0.7 10.5 190 250 20 700 2.5 VCC VFAN 3.0 4.5 0.25 +25 2.95 TE TA = +85C, VCC = 3.3V TRJ = +60C to +100C TRJ = +25C to +125C TRJ = -40C to +125C 0.125 11 -1 -3 -5 25 5.5 13.5 +1 +3 +5 C Bits C C C % V V s % V mV V mV A A V V mV k mA mA SYMBOL CONDITIONS MIN TYP MAX UNITS
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MAX6661
INTERFACE PINS (SDIN, SC, CS, DOUT, ALERT, OVERT) SC VCC = 3V VCC = 5.5V VCC = 3V to 5V VCC = 3V, ISOURCE = 6mA (Note 5) VCC = 3V, ISINK = 6mA (Note 5) VCC = 3V, ISINK = 6mA (Note 5) ALERT, OVERT forced to 5.5V Logic inputs forced to VCC or GND -2 VCC 0.4V 0.4 0.4 1 2 2.2 2.4 0.8 2.5 MHz V V V V V A A
Note 1: TA = TJ. This implies zero dissipation in pass transistor (no load, or fan turned off). Note 2: All parameters are 100% production tested at a single temperature, unless otherwise indicated. Parameter values through temperature are guaranteed by design. Note 3: The fan control section of the MAX6661 and temperature comparisons use only 9 bits of the 11-bit temperature measurement with a 0.5C LSB. Note 4: Wide-range accuracy is guaranteed by design, not production tested. Note 5: Guaranteed by design.
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20 15 TEMPERATURE ERROR (C) 10 5 0 -5 -10 -15 -20 -25 -30 1 10 LEAKAGE RESISTANCE (M) PATH = DXP TO VCC (5V) PATH = DXP TO GND
20
100
-50
50 TEMPERATURE (C)
100
150
10
100 1k
FREQUENCY (Hz)
4.0 3.5 TEMPERATURE ERROR (C) 3.0 2.5 2.0 1.5 1.0 0.5 0 -0.5 -1.0 -1.5 1 10 100 1k VIN = 25mVP-P VIN = 50mVP-P VIN = 100mVP-P VIN = SQUARE WAVE AC-COUPLED TO DXN
2 CONFIG BIT 6 = 1 1
3.5
4.0
4.5
5.0
5.5
FREQUENCY (Hz)
450
3.0
3.3
3.6
3.9
4.2
4.5
4.8
5.1
5.4
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MAX6661
Detailed Description
The MAX6661 is a remote temperature sensor and fan controller with an SPI interface. The MAX6661 converts the temperature of a remote PN junction to a 10-bit + sign digital word. The remote PN junction can be a diode-connected transistor, such as a 2N3906, or the type normally found on the substrate of many processors ICs. The temperature information is provided to the fan-speed regulator and is read over the SPI interface. The temperature data, through the SPI interface, can be read as a 10-bit + sign twos complement word with a 0.125C resolution (LSB) and is updated every 0.5s. The MAX6661 incorporates a closed-loop fan controller that regulates the fan speed with tachometer feedback. The temperature information is compared to a threshold and range setting, which enables the MAX6661 to automatically set fan speed proportional to temperature. Full control of the fan is available by being able to open either the thermal control loop or the fan control loop. Figure 1 shows a simplified block diagram.
temperature is computed. The DXN pin is the cathode of the remote diode and is biased at 0.7V above ground by an internal diode to set up the ADC inputs for a differential measurement. The worst-case DXPDXN differential input voltage range is 0.25V to 0.95V. Excess resistance in series with the remote diode causes about 1/2C error per ohm. Likewise, 200mV of offset voltage forced on DXP-DXN causes approximately 1C error.
Remote-Diode Selection
Temperature accuracy depends on having a goodquality, diode-connected, small-signal transistor. Accuracy has been experimentally verified for all devices listed in Table 1. The MAX6661 can also directly measure the die temperature of CPUs and other ICs that have on-board temperature-sensing diodes.
ADC
The ADC is an averaging type that integrates the signal input over a 125ms period with excellent noise rejection. A bias current is steered through the remote diode, where the forward voltage is measured, and the
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FAN-SPEED REGULATOR
TACH IN FAN
FAN N REGISTERS TMAX DXP DXN REMOTE TEMPERATURE DATA CONTROL LOGIC THIGH SC SDIN DOUT CS CONFIGURATION THERMAL OPEN/ CLOSE LOOP SPI INTERFACE TLOW ALERT MUX ADC THYST COMPARAT0R OVERT
FAN TACHOMETER DIVISOR (FTD) TFAN (FT) FAN GAIN (FG) FULL SCALE (FS) FAN TACHOMETER PERIOD LIMIT (FTPL) MODE (M) FAN-CONVERSION RATE (FCR) FAN-SPEED CONTROL (FSC) STATUS FAN TACHOMETER PERIOD (FTP)
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a conversion cycle. When measuring temperature with discrete remote sensors, smaller packages (e.g., a SOT23) yield the best thermal response times. Take care to account for thermal gradients between the heat source and the sensor, and ensure that stray air currents across the sensor package do not interfere with measurement accuracy. Sensor self-heating, caused by the diode current source, is negligible.
MAX6661
The transistor must be a small-signal type with a relatively high forward voltage. Otherwise, the A/D input range could be violated. The forward voltage must be greater than 0.25V at 10A. Check to ensure this is true at the highest expected temperature. The forward voltage must be less than 0.95V at 100A. Check to ensure that this is true at the lowest expected temperature. Large power transistors, power diodes, or small-signal diodes must not be used. Also, ensure that the base resistance is less than 100. Tight specifications for forward-current gain (50 < <150, for example) indicate that the manufacturer has good process controls and that the devices have consistent VBE characteristics. Bits 52 of the mode register can be used to adjust the ADC gain to achieve accurate temperature measurements with diodes not included in the recommended list or to calibrate individually the MAX6661 for use in specific control systems.
PC Board Layout
Follow these guidelines to reduce the measurement error of the temperature sensors: 1) Place the MAX6661 as close as practical to the remote diode. In noisy environments, such as a computer motherboard, this distance can be 4in to 8in (typ). This length can be increased if the worst noise sources are avoided. Noise sources include CRTs, clock generators, memory buses, and ISA/PCI buses. 2) Do not route the DXP-DXN lines next to the deflection coils of a CRT. Also, do not route the traces across fast digital signals, which can easily introduce a 30C error, even with good filtering. 3) Route the DXP and DXN traces in parallel and in close proximity to each other, away from any higher voltage traces, such as 12VDC. Leakage currents from PC board contamination must be dealt with carefully since a 20M leakage path from DXP to ground causes about a 1C error. If high-voltage traces are unavoidable, connect guard traces to GND on either side of the DXP-DXN traces (Figure 2). 4) Route through as few vias and crossunders as possible to minimize copper/solder thermocouple effects.
7
MAX6661
and the SPI interface is alive and listening for SPI commands. In standby mode, the one-shot command initiates a conversion. Activity on the SPI bus causes the device to draw extra supply current. If a standby command is received while a conversion is in progress, the conversion cycle is interrupted, and the temperature registers are not updated. The previous data is not changed and remains available.
SPI Interface
The data interface for the MAX6661 is compatible with SPI, QSPI, and MICROWIRE devices. For SPI/QSPI, ensure that the CPU serial interface runs in master mode so that it generates the serial clock signal. Select a 2.5MHz clock frequency or lower, and set zero values for clock polarity (CPOL) and phase (CPHA) in the P control registers. Data is clocked into the MAX6661 at SDIN on the rising edge of SC when CS is low. The first byte is the command byte and the second byte is the data byte. The command byte can be either a read byte or a write byte (Table 2). The last bit READ/WRITE (LSB) of the command byte tells the MAX6661 whether it is a read or a write operation, where a high signifies a read, and a low signifies a write. When CS is high, the MAX6661 does not respond to any activity on the SPI bus. All valid communications on the SPI should have 16 bits except for the SPOR and the OSHT. During a READ operation, the DOUT line goes low on the falling clock edge after the READ/WRITE bit (8th bit). The data in the shift register is moved to the DOUT line during the 8th to 15th falling-clock edges and the MSB of the data is available to be read at the rising edge of the 9th clock pulse. The remaining clock pulses in the READ operation shift the register contents on the negative clock edge so that they can be latched into the master on the positive edge. Any READ operation with less than 16 bits results in truncated data. Figure 3 shows the read cycle. For a WRITE operation, the command byte is decoded during the 8th clock pulse. Then data is loaded into the shift register on the positive edges of the 9th to 16th clock pulses and transferred to the appropriate register on the negative edge of the 16th clock period. Any WRITE operation that does not have the 16th clock edge does not get shifted out of the shift register and thus is ignored. Since returning CS high resets the SPI interface at the end of a transfer, this cannot be done until after the 16th falling clock edge. If CS is returned high before this 16th falling clock edge, the appropriate
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register is not loaded. DOUT is high impedance during a WRITE operation. Figure 4 shows the write cycle. For single byte commands such as OSHT and SPOR, the operation need only be 7 bits long where the READ/WRITE bit is omitted. Here the command is loaded into the shift register on the rising edge of SC and the command is decoded during the high period of the 7th clock pulse. The 7th falling edge of SC shifts the command from the shift register to the appropriate register. CS can then go high after the SC low to CS high hold time tCSH (see SPI AC Timing, Electrical Characteristics). Figure 5 shows the timing waveforms for the MAX6661s SPI interface.
register 81h are the 3LSBs. If the two registers are not read immediately, one after the other, their contents may be the result of two different temperature measurements, leading to erroneous temperature data. For this reason, a parity bit has been added to the 81h register. Bit 4 of this is zero if the data in 81h and 83h are from the same temperature conversion and 83h is read first. Otherwise, bit 4 is one. The remaining bits are dont cares. When reading temperature data, register 83h must be read first.
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CS
DIN
DOUT
THREE-STATE
D7
D6
D0
THREE-STATE
SC
CS
DIN
D8
D0
DOUT
THREE-STATE
THREE-STATE
CS
tCSS tCL SC
tCH
tSCS
tCP
tDO
tTR
DOUT
MAX6661
By setting bit 0 in the configuration register to 1, the ALERT line always remains high. Prior to taking corrective action, always check to ensure that an interrupt is valid by reading the current temperature and the status register. Example: The remote temperature reading crosses T HIGH, activating ALERT. The host responds to the interrupt by reading the status register, clearing the interrupt. If the condition persists, the interrupt reappears.
One Shot
The one-shot command immediately forces a new conversion cycle to begin. In software standby mode (RUN/STOP bit = high), a new conversion is begun by writing an OSHT (9Eh) command. After the conversion, the device returns to standby mode. If a conversion is in progress when a one-shot command is received, the command is ignored. If a one-shot command is between conversions in autoconvert mode (RUN/STOP bit = low), a new conversion begins immediately.
ALERT Interrupts The ALERT interrupt output signal is activated (unless it is masked by bit 7 in the configuration register) whenever the remote-diodes temperature is below TLOW or exceeds THIGH. A disconnected remote diode (for continuity detection), a shorted diode, or an active OVERT also activates the ALERT signal. The activation of the ALERT signal sets the corresponding bits in the status register. Once activated, ALERT is latched until cleared. To clear the ALERT, read the status register. The interrupt does not halt automatic conversions. New temperature data continues to be available over the SPI interface after ALERT is asserted. ALERT is an activelow open-drain output so that devices can share a common interrupt line. The interrupt is updated at the end of each temperature conversion so, after being cleared, it reappears after the next temperature conversion if the cause of the fault has not been removed.
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Write Protect
Thermal Closed/ Open Loop OVERT Input Inhibit Mask OVERT Output N/A
2 1 0
0 0 0
6 5 4 3 2 1 0
0 0 0 0 0 0 0
present. Bits 2 through 6 of the status register are cleared by any successful read of the status register, unless the fault persists. The ALERT output follows the status flag bit. Both are cleared when successfully read, but if the condition still exists, the ALERT and the
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corresponding status bit are reasserted at the end of the next conversion. When autoconverting, if the THIGH and TLOW limits are close together, it is possible for both high-temperature and low-temperature status bits to be set, depending
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MAX6661
Thermal Loop
Thermal Closed Loop The MAX6661 can be operated in a complete closedloop mode, with both the thermal and fan loops closed, where the remote-diode sensor temperature directly controls fan speed. Setting bit 3 of the configuration register to zero places the MAX6661 in thermal closed loop (Figure 6). The remote-diode temperature sensor is updated every 500ms. The value is stored in a temporary register (TEMPDATA) and compared to the programmed temperature values in the T HIGH , T LOW , THYST, TMAX, and TFAN registers to produce the error outputs OVERT and ALERT. The fan conversion rate (FCR) register (Table 6) can be programmed to update the TEMPDATA register every 0.5s to 32s. This enables control over timing of the thermal feedback loop to optimize stability. The fan threshold (TFAN) register value is subtracted from the UPDATE register value. If UPDATE exceeds TFAN temperature, then the fan-speed control (FSC) register (Table 7), stores the excess temperature in the form of a 7-bit word with an LSB of 0.5C. If the difference between the TFAN and UPDATE registers is higher than 32C, then bits 6-0 are set to 1. In thermal closed loop, the FSC register is READ ONLY. The fan gain (FG) register (Table 8) determines the number of bits used in the fan-speed control register. This gain can be set to 4, 5, or 6. If bits 6 and 5 are set to 10, all 6 bits of TEMPDATA are used directly to program the speed of the fan so that the thermal loop has a control range of 32C with 64 temperature steps from fan off to full fan speed. If bits 6 and 5 are set to 01, the thermal control loop has a control range of 16C with 32 temperature steps from fan off to full fan speed. If bits 6 and 5 are set to 00, the thermal control loop has a control range of 8C with 16 temperature steps from fan off to full fan speed. Thermal Open Loop Setting bit 3 of the configuration register (Table 4) to 1 places the MAX6661 in thermal open loop. In thermal open-loop mode, the FSC register is read/write.
Fan Control
The fan-control function can be divided into the thermal loop, the fan-speed-regulation loop (fan loop), and the fan-failure sensor. The thermal loop sets the desired fan speed based on temperature while the fan-speed-regulation loop uses an internally divided down reference oscillator to regulate the fan speed. The fan-speed-regulation loop includes the fan driver and the tachometer sensor. The fan-failure sensor provides a FAN FAIL alarm that signals when the value in the fan tachometer period register is greater than the fan tachometer period limit register value, which corresponds to a fan going slower than the limit. The fan driver is an N-channel, 4 MOSFET with a 13.5V maximum VDS whose
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13
DATA
TEMPERATURE CONVERTER
00h 01h
FAN CONVERSION RATE
the fan full-scale (FS) register (Table 9), which is limited to values between 127 to 255, for a range of reference clock full-scale frequencies from 33Hz to 66Hz. A further division is performed to set the actual desired fan speed. This value appears in the fan-speed control register in thermal closed-loop mode. If the thermal loop is open, but the fan-speed control loop is closed, this value is programmable in the FSC. When in fan openloop mode (which forces the thermal loop to open), the FSC register becomes a true DAC, programming the voltage across the fan from zero to nearly VFAN. The tachometer input (TACH IN) includes a programmable (1/2/4/8) prescaler. The divider ratio for the (1/2/4/8) prescaler is stored in the fan tachometer divisor (FTD) register (Table 10). In general, the values in FTD should be set such that the full-speed fan frequency divided by the prescaler fall in the 33Hz to 66Hz range. The UP/DN counter has six stages that form the input of a 6-bit resistive ladder DAC whose voltage is divided down from V FAN . This DAC determines the voltage applied to the fan. Internal coding is structured such that when in fan closed-loop mode (which includes thermal closed loop), higher values in the 0 to 32 range correspond to higher fan speeds and greater voltage across the fan. In fan open-loop mode (which forces thermal open loop), acceptable values range from 0 to 63 (3Fh) for proportional control; a value of 64 (40h) commands unconditional full speed. Fan closed-loop mode is selected by setting bit 0 of the FG to zero; open-loop mode is selected by setting bit 0 to 1. In open-loop mode, the gain block is bypassed and the FSC register is used to program the fan voltage rather than the fan speed. When in fan open-loop mode, both the temperature feedback loop and fanspeed control loop are broken, which result in the TACH IN input becoming disabled. A direct voltage can be applied to the fan after reading the temperature,
In thermal open-loop mode, the fan loop can operate in open or closed mode. In fan open loop, the FSC register programs fan voltage directly, accepting values from 0 to 64 (40h). For example, in fan open-loop mode, zero corresponds to no voltage across the fan and 40h corresponds to full fan voltage. Proportional control is available over the 0 to 63 (3Fh) range with 64 (40h) forcing unconditional full speed. In fan closed-loop mode, zero corresponds to zero fan speed. When the FG register is set to 4 bits, 10h corresponds to 100% fan speed; 100% fan speed is 20h at 5 bits, and 3Fh at 6 bits.
Fan Loop
The fan loop (Figure 7) is based on an up/down counter where a reference clock representing the desired fan speed drives the count up, while tachometer pulses drive it down. The reference clock frequency is divided down from the MAX6661 internal clock to a frequency of 8415Hz. This clock frequency is further divided by
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Label
POR State
Notes: Bit 0: Fan driver mode. When bit 0 is set to 1, the fan driver is in fan open-loop mode. In this mode, the fan DAC programs the fan voltage rather than the fan speed. Tachometer feedback is ignored, and the user must consider minimum fan drive and startup issues. Thermal open loop is automatically set to 1 (see configuration register). Fan Fail (bit 0 of the status register) is set to 1 in this mode and should be ignored. Bit 1: Fan feedback mode. When bit 1 is set to 1, the fan loop uses driver current sense rather than tachometer feedback. Bits 6, 5: Fan gain of the fan loop, where 00 = 8C with resolution = 4 bits. This means that the fan reaches its full-scale (maximum) speed when there is an 8C difference between the remote-diode temperature and the value stored in TFAN, 01 = +16C, with a 5-bit resolution and 10 = +32C with a 6-bit resolution. Bit 7: Writing a zero to bit 7 forces bits 6 and 5 to their POR values.
Note: This register determines the maximum reference frequency at the input of the up/down counter. It controls a programmable divider that can be set anywhere between 127 and 255. The value in this register must be set in accordance with the procedure described in the TACH IN section (equivalent 8415/(Max Tachometer Frequency Fan Tachometer Divisor)). Programmed value below 127 defaults to 127. POR value is 255.
Note: This byte sets the prescalar division ratio for tachometer or current-sense feedback. (This register does not apply to the tach signal used in the fan-speed register.) Select this value such that the fan frequency (rpm / 60s x number of poles) divided by the FCD falls in the 33Hz to 66Hz range. See TACH IN section: Bits 1, 0: 00 = divide by 1, 01 = divide by 2, 10 = divide by 4, 11 = divide by 8. ______________________________________________________________________________________ 15
Fan Driver
The fan driver consists of an amplifier and low-side NMOS power device whose drain is connected to FAN and is the connection for the low side of the fan. There is an internal connection from the fan to the input of the amplifier. The FET has 4 on-resistance with 320mA (typ) current limit. The driver has a thermal shutdown sensor that senses the drivers temperature. It shuts down the driver if the temperature exceeds +150C. The driver is reactivated once the temperature has dropped below +140C.
Applications Information
Mode Register
Resistance in series with the remote-sensing junction causes conversion errors on the order of 0.5C per ohm. The MAX6661 mode register gives the ability to eliminate the effects of external series resistance of up to several hundred ohms on the remote temperature measurement and to adjust the temperature-measuring ADC to suit different types of remote-diode sensor. For systems using external switches or long cables to connect to the remote sensor, a parasitic resistance cancellation mode can be entered by setting mode register bit 7 = 1. This mode requires a longer conversion time and so can only be used for fan conversion rates of 1Hz or slower. Bits 6, 1, and 0 of the mode register are not used. Use bits 52 to adjust the ADC gain to achieve accurate temperature measurements with diodes not included in the recommended list or to individually calibrate the MAX6661 for use in specific control systems. These bits adjust gain to set the temperature reading at +25C, using twos complement format reading. Bit 5 is the sign (1 = increase, 0 = decrease), bit 4 = 2C shift, bit 3 = 1C shift, bit 2 = 1/2C shift. Origin of gain curve is referred to 0K. To use this feature, the sensor must be calibrated by the user.
TACH IN
The TACH IN input connects directly to the tachometer output of a fan. Most commercially available fans have two tachometer pulses per revolution. The tachometer input is fully compatible with tachometer signals, which are pulled up to VFAN.
Fan-Failure Detection
The MAX6661 detects fan failure by comparing the value in the fan tachometer period (FTP) register, a READ ONLY register, with a limit stored in the fan tachometer period limit (FTPL) register (Table 11). A counter counts the number of on-chip oscillator pulses between successive tachometer pulses and loads its value into the FTP register every time a tachometer pulse arrives. If the value in FTP is greater than the
16
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FAN-SPEED CONTROL 1 TO 63
COUNTER
COMPARATOR
TACH IN
FAN FAIL
UP/DOWN
DAC
DRIVER
Note: The fan tachometer period limit register is programmed with the maximum speed that is compared against the value in the FS register to produce an error output to the status register.
register to the desired fan frequency [read: speed]. The 8415Hz is divided down from the MAX6661 internal clock, and has a 25C tolerance. 1) Determine the fans maximum tachometer frequency: f(TACH) Hz = (rpm/60s / min) number of poles Where poles = number of pulses per revolution. Most fans are two poles; therefore, they have two pulses per revolution.
2) Set the programmable FTD so that the frequency of the fan tachometer divided by the prescaler value in the FCD register falls in the 33Hz to 66Hz range. 3) Determine the value required for the fan FS register: FS = 8415 / (fTACH P) Where P is the prescaler division ratio of the FCD register. Example: Fan A has a 2500rpm rating and 2 poles: fTACH = 2500 / 60 2 = 83.4Hz
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Panasonic
Sunon
Fan Selection
For closed-loop operation and fan monitoring, the MAX6661 requires fans with tachometer outputs. A tachometer output is typically specified as an option on many fan models from a variety of manufacturers. Verify the nature of the tachometer output (open collector, totem pole) and the resultant levels and configure the connection to the MAX6661. For a fan with an opendrain/collector output, a pullup resistor of typically 5k must be connected between TACH IN and VFAN. Note how many pulses per revolution are generated by the tachometer output (this varies from model to model and among manufacturers, though two pulses per revolution are the most common). Table 12 lists the representative fan manufacturers and the model they make available with tachometer outputs.
electronics. If the voltage supplied to the fan is lowered too far, the internal electronics may no longer function properly. Some of the following symptoms are possible: The fan may stop spinning. The tachometer output may stop generating a signal. The tachometer output may generate more than two pulses per revolution. The problems that occur and the supply voltages at which they occur depend on which fan is used. As a rule of thumb, 12V fans can be expected to experience problems somewhere around 1/4 and 1/2 their rated speed.
Chip Information
TRANSISTOR COUNT: 6479 PROCESS: BiCMOS
Low-Speed Operation
Brushless DC fans increase reliability by replacing mechanical commutation with electronic commutation. By lowering the voltage across the fan to reduce its speed, the MAX6661 is also lowering the supply voltage for the electronic commutation and tachometer
18 ______________________________________________________________________________________
MAX6661
MAX6661
QSOP
Package Information
QSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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