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Experiment 2 VLSI

The document summarizes an experiment to design an inverter circuit using CMOS transistors in the DA-IC software. Key steps included creating a test bench path, placing an inverter symbol and connecting power and ground pins. Transient analysis was run by setting DC voltage to 5V over 1ns periods and 40ns delays. The output waveform was viewed which showed the simulation process worked with no errors, though the software license prevented longer use.

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Radhie Noah
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22 views

Experiment 2 VLSI

The document summarizes an experiment to design an inverter circuit using CMOS transistors in the DA-IC software. Key steps included creating a test bench path, placing an inverter symbol and connecting power and ground pins. Transient analysis was run by setting DC voltage to 5V over 1ns periods and 40ns delays. The output waveform was viewed which showed the simulation process worked with no errors, though the software license prevented longer use.

Uploaded by

Radhie Noah
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Experiment 2: Introduction to ADK3 (Creating a Test Bench) Objective: Design and create the symbol for inverted circuit

using CMOS transistors. Software Required: 1. Design Architect IC (DA-IC) 2. ELDO 3. Ezwave cor (xelga) 4. IC station 5. Calibre Theory: Truth table and Schematic diagram

Design Specification: Using CMOS transistors to design the inverter circuit. Procedure: 1. Create a path to save the information for the test bench. Follow the procedure as given in the lab manual. 2. A symbol for an inverter will pop-out and place it on the schematic sheet. 3. Generate a symbol. 4. Go to ADK IC LIBRARY and select PLUSE, DC, VDD, GND and place them on the schematic sheet. 5. Connect all the wire and check the schematic. 6. Click on SIMULATION, then follow the procedure as given in lab manual. 7. Set the DC value to 5V, delay to 1ns, period to 40ns. 8. Setup the Transient and state output start time as 0 and thick the transient as well. Choose Probes/Plots and select Voltage. 9. Run the simulation by clicking Run Eldo. One window for netlist design and another one is simulation design. 10. Check the schematic diagram whether theres an error or not. 11. View the waveform for the simulation process.

Figure 2: Test Bench

Figure 3: output waveform Conclusions: In this second lab, i get to know all the basic things about designing a circuit using Design Architect IC (DA-IC), create the test bench and generate the output waveform of the simulation. During this lab, i dont have any problem or error of doing it. The only problem is, the software is not under licence, the software will close automatically and i have to restart doing it all over again.

KUALA LUMPUR INFRASTRUCTURE UNIVERSITY COLLEGE SCHOOL OF ENGINEERING INFRASTRUCTURE TECHNOLOGY (SETI)

VLSI Lab BEE307

LAB 2 REPORT

LECTURER: MRS JEBASHINI

MOHD RADHI B. MD NOR @ MOHD NOAH

092004655

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