EE105 - Fall 2006

Microelectronic Devices and

Circuits
Prof. Jan M. Rabaey (jan@eecs)

Lecture 3: Semiconductor Basics (cntd)

Semiconductor Manufacturing

Overview
ƒ Last lecture
– Carrier velocity and mobility
– Drift currents
– IC resistors
ƒ This lecture
– Diffusion currents
– Overview of IC fabrication process
– Review of electrostatics

1
 Administrativia
ƒ Make-up Lecture tomorrow Fr at 3:30pm (streamed)
ƒ Another Make-up Lecture Monday at 4pm (streamed)
NO LECTURE ON TUESDAY
ƒ Labs start next TU – MAKE SURE TO ATTEND

Some other reading material

ƒ Sedra and Smith, Microelectronic Circuits, Fifth Edition,
Oxford University Press
ƒ Donald Neamen, Microelectronics – Circuit Analysis and
Design, Third Edition, McGraw Hill
ƒ R. F. Pierret, Semiconductor Device Fundamentals,
Addison Wesley, 1996. (130 Text Book)
ƒ R. S. Muller and T. I. Kamins with Mansun Chan, Device
Electronics for Integrated Circuits, 3rd Edition; Wiley
and Sons, Publisher.

2
 Resistivity

Bulk silicon: uniform doping concentration, away from surfaces

n-type example: in equilibrium, no = Nd
When we apply an electric field, n = Nd

J n = qμ n nE = qμ n N d E

Conductivity σ n = qμ n N d ,eff = qμ n ( N d − N a )
1 1
Resistivity ρn = = Ω − cm
σn qμ n N d ,eff
5

Ohm’s Law

V ⎛ σ tW ⎞ V
I = JA = J ⋅ (tW ) = σ t W E = σ t W =⎜ ⎟ ⋅V =
L ⎝ L ⎠ R

1 L ρ L 1 1
R= = with ρn = =
σtW t W σn qμ n N d ,eff
6

3
 Sheet Resistance (Rs)
ƒ IC resistors have a specified thickness – not under
the control of the circuit designer
ƒ Eliminate t by absorbing it into a new parameter: the
sheet resistance (Rs)

ρL ⎛ ρ ⎞⎛ L ⎞ ⎛L⎞
R= = ⎜ ⎟⎜ ⎟ = Rsq ⎜ ⎟
Wt ⎝ t ⎠⎝ W ⎠ ⎝W ⎠

“Number of Squares”

Using Sheet Resistance (Rs)

ƒ Ion-implanted (or “diffused”) IC resistor

4
 Idealizations

ƒ Why does current density Jn “turn”?

ƒ What is the thickness of the resistor?
ƒ What is the effect of the contact regions?

Diffusion
ƒ Diffusion occurs when there exists a concentration
gradient
ƒ In the figure below, imagine that we fill the left chamber
with a gas at temperate T
ƒ If we suddenly remove the divider, what happens?
ƒ The gas will fill the entire volume of the new chamber.
How does this occur?

10

5
 Diffusion (cont)
ƒ The net motion of gas molecules to the right chamber
was due to the concentration gradient
ƒ If each particle moves on average left or right then
eventually half will be in the right chamber
ƒ If the molecules were charged (or electrons), then there
would be a net current flow
ƒ The diffusion current flows from high concentration to
low concentration:

11

Diffusion Equations
ƒ Assume that the mean free path is λ
ƒ Find flux of carriers crossing x=0 plane

1
n (λ ) F= vth (n(−λ ) − n(λ ) )
n (0 ) 2
n ( −λ ) 1 ⎛⎡ dn ⎤ ⎡ dn ⎤ ⎞
F= vth ⎜⎜ ⎢n(0) − λ ⎥ − ⎢n(0) + λ ⎥ ⎟⎟
2 ⎝⎣ dx ⎦ ⎣ dx ⎦ ⎠
dn
1
n(−λ )vth
1
n(λ )vth
F = −vth λ
2 2 dx
dn
−λ 0 λ J = − qF = qvth λ
dx
12

6
 Einstein Relation
ƒ The thermal velocity is given by kT
1
2 mn*vth2 = 12 kT
Mean Free Time
λ = vthτ c
τc kT qτ c Mobility
vth λ = vth2 τ c = kT *
=
m n q mn*

dn ⎛ kT ⎞ dn dn
J = qvth λ = q⎜⎜ μ n ⎟⎟ = qDn
dx ⎝ q ⎠ dx dx
Diffusion Coefficient
Dn ⎛ kT ⎞
= ⎜⎜ ⎟⎟ = Vth Einstein Relation
μn ⎝ q ⎠
13

Total Current
ƒ When both drift and diffusion are present, the total
current is given by the sum:
dn
J = J drift + J diff = qμ n nE + qDn
dx

14

7
 IC Fabrication: Photo-Lithographic Process

optical
mask
oxidation

photoresist photoresist coating

removal (ashing)
stepper exposure

Typical operations in a single

photolithographic cycle (from [Fullman]).
photoresist
development
acid etch
process spin, rinse, dry
step

15

IC Fabrication: Si Substrate
ƒ Pure Si crystal is starting material (wafer)
ƒ The Si wafer is extremely pure (~1 part in a billion
impurities)
ƒ Why so pure?
– Si density is about 5 1022 atoms/cm3
– Desire intentional doping from 1014 – 1018
– Want unintentional dopants to be about 1-2 orders of magnitude
less dense ~ 1012
ƒ Si wafers are polished to about 700 μm thick (mirror
finish)
ƒ The Si forms the substrate for the IC
16

8
 IC Fabrication: Oxide
ƒ Si has a native oxide: SiO2
ƒ SiO2 (glass) is extremely stable and very convenient for
fabrication
ƒ It’s an insulator
ƒ SiO2 windows are etched using photolithography
ƒ These openings allow ion implantation into selected
regions
ƒ SiO2 can block ion implantation in other areas

17

IC Fabrication: Patterning of SiO2

Chemical or plasma
etch
Si-substrate
Hardened resist
SiO
2
(a) Silicon base material
Si-substrate
Photoresist
SiO
2 (d) After development and etching of resist,
chemical or plasma etch of SiO
Si-substrate 2

(b) After oxidation and deposition Hardened resist

of negative photoresist SiO
2
Si-substrate
UV-light
Patterned (e) After etching
optical mask

Exposed resist
SiO
2

Si-substrate Si-substrate

(f) Final result after removal of resist

(c) Stepper exposure
18

9
 “Diffusion” Resistor
Oxide
N-type Diffusion Region

P-type Si Substrate

ƒ Using ion implantation/diffusion, the thickness and

dopant concentration of resistor is set by process
ƒ E.g. 100Ω/□ (unsilicided), 10Ω/□ (silicided)
ƒ Shape of the resistor is set by design (layout)
ƒ Metal contacts are connected to ends of the resistor
ƒ Resistor is capacitively isolation from substrate
– Reverse-biased PN Junction! 19

Using Sheet Resistance (Rs)

ƒ Ion-implanted (or “diffused”) IC resistor

20

10
 Poly Film Resistor
Polysilicon Film (N+ or P+ type) Oxide

P-type Si Substrate

ƒ To lower the capacitive parasitics, we should build the

resistor further away from substrate
ƒ We can deposit a thin film of “poly” Si (heavily doped)
material on top of the oxide
ƒ E.g. 10-100Ω/□ (unsilicided), 1Ω/□ (silicided)
ƒ Bad absolute tolerance, very good relative tolerance
21

CMOS Process at a Glance

Define active areas

Etch and fill trenches

Implant well regions

Deposit and pattern

polysilicon layer

Implant source and drain

regions and substrate contacts

Create contact and via windows

Deposit and pattern metal layers
22

11
 Electrostatics: a Tool for Device Modeling

Gauss’s Law ∇•( εE ) = ρ

Potential Def. E = – ∇φ

Poisson’s Eqn. ∇• ( ε ( – ∇φ ) ) = – ε ∇ 2φ = ρ

23

One-Dimensional Electrostatics

Gauss’s Law dE ρ
∇⋅E = =
dx ε

Potential Def. dφ
E=−
dx

Poisson’s Eqn. d 2φ ( x) ρ ( x)
=−
dx 2
ε

24

12
 Electrostatics Review (1)
ƒ Electric field go from positive charge to negative charge
(by convention)
+++++++++++++++++++++

−−−−−−−−−−−−−−−
ρ
∇⋅E =
ε

ƒ In words, if the electric field changes magnitude, there

has to be charge involved!
ƒ Result: In a charge-free region, the electric field must
be constant!

25

Electrostatics Review (2)

ƒ Gauss’ Law equivalently says that if there is a net
electric field leaving a region, there has to be positive
charge in that region:
+++++++++++++++++++++

−−−−−−−−−−−−−−−

Electric Fields are Leaving This Box!

Q
∫ E ⋅ dS = ε

26

13
 Electrostatics in 1D
ƒ Everything simplifies in 1-D
dE ρ ρ
∇⋅E = = dE = dx
dx ε ε
x
ρ ( x' )
E ( x) = E ( x0 ) + ∫ dx'
x0
ε
ƒ Consider a uniform charge distribution
E ( x)
ρ0
x1
Zero field ρ (x) ε
boundary ρ0
condition
x x x1
x1 ρ ( x' ) ρ
E ( x) = ∫ dx' = 0 x
0
ε ε 27

Electrostatic Potential
ƒ The electric field (force) is related to the potential
(energy):
dφ
E=−
dx

ƒ Negative sign says that field lines go from high

potential points to lower potential points (negative
slope)
ƒ Note: An electron should “float” to a high potential
point: φ1 dφ
dφ F = −e
Fe = qE = −e e
dx
dx e
φ2 28

14
 More Potential
ƒ Integrating this basic relation, we have that the potential
φ (x)
is the integral of the field:
r
φ ( x) − φ ( x0 ) = − ∫ E ⋅ dl r
C
dl
ƒ In 1D, this is a simple integral: E
x
φ ( x0 )
φ ( x) − φ ( x0 ) = − ∫ E ( x' )dx'
x0

ƒ Going the other way, we have Poisson’s equation in 1D:

d 2φ ( x) ρ ( x)
=−
dx 2
ε
29

Boundary Conditions
ƒ Potential must be a continuous function. If not, the
fields (forces) would be infinite
ƒ Electric fields need not be continuous. We have already
seen that the electric fields diverge on charges. In fact,
across an interface we have:

Δx
∫ ε E ⋅ dS = −ε E S + ε
1 1 2 E2 S = Qinside
E1 (ε 1 ) Qinside ⎯Δx
⎯→ ⎯0 → 0
− ε 1 E1S + ε 2 E2 S = 0
E2 (ε 2 ) S E1 ε 2
=
E2 ε 1
30

15
 IC MIM Capacitor
Bottom Plate Top Plate Bottom Plate

Contacts

Thin Oxide

Q = CV

ƒ By forming a thin oxide and metal (or polysilicon) plates, a

capacitor is formed
ƒ Contacts are made to top and bottom plate
ƒ Parasitic capacitance exists between bottom plate and substrate

31

Review of Capacitors
Q
∫ E ⋅ dS = ε
+++++++++++++++++++++
+ Vs
−
Q
−−−−−−−−−−−−−−−
∫ E ⋅ dS = − ε
Vs Q = CVs
∫ E ⋅ dl = E t
0 ox = Vs E0 =
tox
Vs Q Aε
Q C=
∫ E ⋅ dS = E0 A = ε tox
A=
ε tox

ƒ For an ideal metal, all charge must be at surface

ƒ Gauss’ law: Surface integral of electric field over
closed surface equals charge inside volume
32

16
 Capacitor Q-V Relation
+++++++++++++++++++++
Q y
−−−−−−−−−−−−−−−

Vs Q( y )

Q = CVs

ƒ Total charge is linearly related to voltage

ƒ Charge density is a delta function at surface (for
perfect metals)
33

A Non-Linear Capacitor
+++++++++++++++++++++
Q y
−−−−−−−−−−−−−−−

Vs Q( y )

Q = f (Vs )
ƒ We’ll soon meet capacitors that have a non-linear Q-V
relationship
ƒ If plates are not ideal metal, the charge density can penetrate into
surface
34

17
 What’s the Capacitance?
ƒ For a non-linear capacitor, we have
Q = f (Vs ) ≠ CVs

ƒ We can’t identify a capacitance

ƒ Imagine we apply a small signal on top of a bias
voltage:
df (V )
Q = f (Vs + vs ) ≈ f (Vs ) + vs
dV V =Vs
Constant charge

ƒ The incremental charge is therefore:

df (V )
Q = Q0 + q ≈ f (Vs ) + vs
dV V =Vs 35

Small Signal Capacitance

ƒ Break the equation for total charge into two terms:
Incremental
Charge

df (V )
Q = Q0 + q ≈ f (Vs ) + vs
dV V =Vs

Constant
Charge

df (V )
q= vs = C vs
dV V =Vs

df (V )
C≡
dV V =Vs
36

18
 Example of Non-Linear Capacitor
ƒ Next lecture we’ll see that for a PN junction, the charge
is a function of the reverse bias:
V Voltage Across NP
Q j (V ) = −qN a x p 1 − Junction
φb

Charge At N Side of Junction

Constants

ƒ Small signal capacitance:

dQ j qN a x p 1 C j0
C j (V ) = = =
dV 2φb V V
1− 1−
φb φb
37

19