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Advanced Digital Signal Processing

1. The document discusses several topics related to advanced digital signal processing including: defining convolution summation, determining minimum sampling frequency to avoid aliasing, explaining round off and truncation of signal magnitudes, explaining decimation factor and output sequences. 2. Additional topics covered include: explaining the difference between FIR and IIR systems, converting an analog filter to a digital IIR filter using backward difference method, explaining multiple sampling using I/D, and explaining how digital signal processing technique of decimation by 2 is applied to speech processing. 3. The document also discusses calculating power density spectrum using Bartlet method, defining quality factor for Bartlet spectrum, and determining frequency derivation and record length for Bartlet spectrum.

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68 views

Advanced Digital Signal Processing

1. The document discusses several topics related to advanced digital signal processing including: defining convolution summation, determining minimum sampling frequency to avoid aliasing, explaining round off and truncation of signal magnitudes, explaining decimation factor and output sequences. 2. Additional topics covered include: explaining the difference between FIR and IIR systems, converting an analog filter to a digital IIR filter using backward difference method, explaining multiple sampling using I/D, and explaining how digital signal processing technique of decimation by 2 is applied to speech processing. 3. The document also discusses calculating power density spectrum using Bartlet method, defining quality factor for Bartlet spectrum, and determining frequency derivation and record length for Bartlet spectrum.

Uploaded by

nzaeqwdhqswjhv
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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ADVANCED DIGITAL SIGNAL PROCESSING

1.a) Define convolution summation. b) Consider the analog signal xa (t) = 3cos (100)t. determine the minimum value of sampling frequency, to avoid aliasing.

2.

a) With a typical example explain round off & Truncaction of signal magnitudes. b) A discrete domain sequence is given below.

The process is characterized by f(n)=2x(Dn) where D is decimation factor. Sketch the output sequence for D=2. 3.a) Briefly mention the difference between FIR & IIR systems. b) convert the analog filter with the transfer function Ga(s)= in to a digital IIR

filter using backward difference method for sampling period of T=0.1s. 4.Explain in detail the multiple sampling process using I/D.

5. Explain how digital signal processing technique of decimation by 2 is applied to speech processing. 6.a) Derive the expression for power density spectrum using Bartlet method. b) Define quality factor for Bartlet spectrum. If sample size is 1000 & quality factor is 10, determine the frequency derivation f & record length for Bartlet spectrum.

AVLSI
1. a) What is a Spanning Tree? b) A graph shown below is having the cost of various edges as indicated in the following Table. Explain the procedure for constructing the Minimum cost spanning Tree for the graph and plot the constructed tree. Edge Cost 1-2 16 1-5 19 1-6 21 2-3 5 2-4 6 2-6 11 3-4 10 4-5 18 4-6 14

2. What are the various Layout Methodologies? Explain in detail. 3. Explain about i) Branch and Bound i) Local Search methods used for combinatorial Optimization. 4. Explain a) Genetic Algorithm b) Local Search methods

5. Find the Shortest path from the node B to D in the following graph, using Dijkstras Algorithm. Explain the procedure of finding the required.

6. Find the Spanning tree for the following graph using Prims algorithm. Explain the procedure

CPLD
1. a) Explain the PLA design for the fallowing f=x'y'z+x'yz+xyz+xy'z' . b) Explain speed performance and system programming. 2. Consider any logic block and explain routing architecture. 3. Explain the design flow technology mapping for FPGA's 4. a) Explain the Max 5000/7000 series architecture. b) Explain Pac with an example. 5. Explain lattice plats architecture 3000 series.

6. a) Explain the design aspects of AXC4000 FPGA. b) Explain the design flow for FPGA

DIGITAL SYSTEM DESIGN


1. Derive state machine chart for binary multiplier? 2. Discuss about designing with programmable logic devices? 3. Define the terms failure and fault? Discuss the different fault models? 4. Discuss about any one method of fault diagnosis in combinational circuits using an example? 5. a) Explain D-algorithm with an example b) Explain the signature analysis test 6. a) Explain podem with an example. b) Explain transition count testing with an example

MESD
1. a) What is an Embedded system? How is it different from a personal computer? b. Explain the steps involved in the design process of an embedded system. 2. a) Explain how External memory is interfaced to 8051. b. Discuss the need for Timers. 3. a) Write notes on the various Memory arbitration schemes. b. Explain about PIC controllers. 4. a) Explain the hardware units and devices in an Embedded system. b) Give the classification of embedded systems. 5. a) Discuss in detail the architecture of 8051 microcontroller. b) Explain the need for counters. 6. Discuss in detail memory and I/O devices interfacing to the microcontroller

VLSI
1. a) Derive the relevant expressions Ids versus Vds in the Non-Saturated and Saturated regions. b) Explain the pseudo-NMOS logic during the low to high transition. [12] 2. a) Explain about various layout design and tools in VLSI design. With diagrams. b) Design the layout for an n-diffusion wire connected to a p-diffusion wire. 3. a) Explain the fabrication procedure for P-Well CMOS technology. b) What are the differences between CMOS and BiCMOS technologies in fabrication? 4. a) Determine Zpu /Zpd for NMOS inverter driven by another inverter. b) Draw and explain the CMOS inverter. 5. a) Explain about scalable Design rules related to NMOS and CMOS technologies. b) What are the issues involved in driving large capacitive loads in VLSI circuits? Explain. 6. a) Draw and explain the a simple BiCMOS inverter. b) Latch_up in CMOS circuits.

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