Computer Organization July 2005 Old
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Prasad C MComputer Organization July 2005 Old
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Prasad C MI NEW SCHEME I
CS46
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Fourth Semester B.E. Degree Examination, July/August 2005
Common to BMIECIEE/I'E/MI.IIT/CSIIS
Computer Organisation
Tlnw J hr.:; I (Max.Marks 100
Note: Answer any FIVE full question.<;.
All qtwstions rarry equal marks.
1. (a) Disru;;s the v11riO\lS gcnNaLions lhmugh which lhe compuwrs have evolved
to lhP stage lndiate thl' lmpoltant technologiral features and devul's
that characterised each generatiOn. oo Mnkl
Cbl Di.;tmgw,;h bE-tween unsigrwd and mteger.o. \'hth example->, md.Icate
whcn eaC'h t:- !)(' of mtegers ,,,11 bt u.;eful.
lei An mt!'ger of 32 b1t Slze is ::.torecl m memory locauon in the little enciian
f<l.'<hion lmhcate using a p;;cudo program, how a lnp; enwan 16-bit
couJd rearrange the numb!'r and ;;ton it property for itt! hack in the samf'
location. !G
2. ' Ll {:"mg rt>glSLlr transff'r notallon, and ron1ept ofindirPct ndtlr-essmg ofnwmory
:<how how you can rearrange an a.:;cfndmg sorted d<lta array to a descending
N)rtNl an-ay m the same memory I If at Ass11me the array Plemruus are of
16-h1t and the processor sy,;tcm i;;; also 16 btl- ,uze. 110 :>t...-... ,
!bl Comirler the following:
i 1 A 11ubroutine may requm>d the> parameters passecl l.o it (from the roam
J.ITO!,'I'am), in n random ordPJ' ;md more than once
ia I A stack is a data structure ir1 nwmory, from which tlw data can be accessPd
in a IWO order and ten stack is not a suitable data .>tructurc
for handhng subroutine param('tcrs.
ml Y!'t, JlilSSmg subroutine through stack IS ()('rhaps the common-
c-;t way of handling subroutine parameters.
\\bat m!'l'.h:'lnh!rn 1S employed "'' that the paramcteril arr made randomlv
arcPssible to the ,;ubroutine from the stack'' Explam 1nth an example.
(10 Murkll)
3. J Show a dr'Cuit whl'rPhl' del' may intrrrupt a procc::;sor
on a single interrupt request lull'
If it i.'< re<turred to handle the dcnn rnti'ITUpts on a fuecl pnor!Ly basts, inchcatP
m dPtatl
iJ A hardware based
ill A sofl.war, basPd method for addres:<mg th1;;
!bl Explam tlw luudwarP rPgi.;t<:rs th<lt mE' req\lired 10 a controller dup
\Vh" 11 fnr llft.f A ,., ,,.,, tnl1o-.. tn hA ... t" ............... .... ,... \......., ...,._.,,. ...... ,_. __ .. )
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CS46
4. (al Explain the significant features of any ONE of the following bases .
t) PCJ ii) SCSI till USB. no
(b) Duscuss the different types of RAM's bringutg out thetr sa.hent featurE-S Gtve
some idea of thetr speeds and relative costs. uo \larlul
5. (a) Constder a pro<:essor system with 32 bit address capability, usmg 64 KB of
cache, arranged to operate as a 4 way set associative cache. Work out Lhe logit
wluch determines cache hit or miss for this system. Assume you havt' 20-bit
comparators available for the purpose. no lllarlut
tbl De:ICrlbe the etrcutt and operation of a 4 bit carry look ahead adder. Compare
the computational time, in terms of gale propagation times for a 32 btt adder
usmg
i) 8 numbers of 4-bit carry look-ahead adders.
ii) 4 numbers of 8-bit carry look-ahead adders
Assume no second level of look-ahead-carry generation.
6. (a) Indicate the computattonal details of multiplying two 4-bit number!l 10 ll and
0101 using Booth's algortthm Vpnfy the resul t obtained. oo Marko>
(b) Give the basic features of the IEEE Ooatmg point number standard oo
7. (a) GJVe the details oftht> system and tht> control signals for executing th<> followmg
functions in a processor
i> MOV R
1
to R2
t 10 -'llU'kol
(bl Give a brief out lin<' of the sequt>nct of actions produced by a procct;sor to
fetch and execute an unconditional branch instruction in terms of th<' speCJ.fic
control signals produced at each clock during the whole process 10 Marks>
8. (a) ln<hcate the various steps in dt>s1grung elther the hardwired control for a
microprocessor or nucroprogramm<"d control for a microprocessor no liJIU'kt
(bl Dt>scribe the salient features of a Simple microcontroller that can be embedded
m systems like nucrowave ovens. t 10 Mnrkl
** * **
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