MICRO ELECTRO MECHANICAL SYSTEMS (MEMS)

THE EMERGING TECHNOLOGY

- Jagan. B. R
([email protected])

- Avinash. V
([email protected])

ABSTRACT

Among the most advanced technologies, MEMS technology is the emerging out
with various exciting results. It finds its application in every field. This paper
absorbs the concepts of MEMS. The paper is divided into three main parts. The
first part is the introduction of MEMS and its merits over the conventional IC
fabrication techniques. Secondly, the paper describes the methods for fabricating
the MEMS device. Thirdly, the paper aims at exposing the methods for
fabricating a MEMS piezoresistive differential pressure sensor and single crystal
silicon fabrication using proton implantation smart cut technique.

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Introduction

Micro – Electro – Mechanical Systems (MEMS) is the integration of mechanical,

sensors, actuators and electronics on a common silicon substrate through micro-
fabrication technology. While the electronics are fabricated using integrated
circuit (IC) process sequences (eg., CMOS, Bipolar, or BICMOS processes), the
micro-mechanical components are fabricated using compatible micro-machining
process that selectively etch away parts of the silicon water or add new structural
layers to form the mechanical and electromechanical devices.

MEMS promises to revolutionize nearly every product category by bringing

together silicon- based microelectronics with micro-machining technology,
making possible the realization of complete systems on a chip. MEMS is an
enabling technology allowing the development of smart products, augmenting
the computational ability of microelectronics with the perception and control
capabilities of micro-sensors and micro-actuators and expanding the space of
possible designs and applications.

Microelectronic integrated circuits can be thought of as “brains” of a system and

MEMS augment this decision- making capability with “eyes” and “arms”, to
allow Microsystems to sense and control the environment. Sensors gather
information from the environment through measuring mechanical, thermal,
biological chemical, optical and magnetic phenomena. The electronics then
process the information derived from the sensors and through some decision-
making capability direct the actuators to respond by moving, positioning,
regulating, pumping and filtering thereby controlling the environment for some
desired outcome or purpose. Because MEMS devices are manufactured using
batch fabrication techniques similar to those used for integrated circuits,

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unprecedented levels of functionality, reliability and sophistication can be placed
on a small silicon chip at a relatively low cost.

MEMS devices can be used as miniature sensors, controllers, or actuators. But so

far, very few commercial applications exist. Some that are presently on the
market are pressure sensors and collision detectors (used for air-bag
deployment). However, there us a vast amount of research attempting to make
these types of MEMS devices available for commercial use:

• Sensors: Pressure, chemical, motion, fluid and gas flow.

• Fluid pumps and valves.
• Micro - optics: Optical scanners and mirror arrays.

Why do we prefer MEMS technology ?

• MEMS devices can be so small that hundreds of them fit in the same space
as one single macro-device that performs the same function.

• Cumbersome electrical components are not needed, since the electronics

can be placed directly on the MEMS device. This integration also has the
advantage of sensors.

• Using IC processes, hundreds to thousands of these devices can be

fabricated on a single wafer. This mass production greatly reduces the
price of individual devices. Thus, MEMS devices will be much less
expensive than their macro-world counterparts.

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Although MEMS devices are extremely small (eg., MEMS ha enabled electrically
driven motors smaller than the diameter of a human hair to be realized), MEMS
technology is not about size. Furthermore, MEMS is not about making things out
of silicon, even though silicon possesses excellent materials properties making it
a attractive choice for many high performance mechanical applications (eg., The
strength-to-weight ratio for silicon is higher than many other engineering
materials allowing very high bandwidth mechanical devices to be realized).
Instead, MEMS is a manufacturing technology; a new way of making complex
electromechanical systems using batch fabrication techniques similar to the way
integrated circuits are made and making these electromechanical elements along
with electronics.

This new manufacturing technology has several distinct advantages. First, MEMS
is an extremely diverse technology that potentially could significantly impact
every category of commercial and military products. MEMS technology and its
diversity of useful applications makes it potentially a far more pervasive
technology than even integrated circuit microchips. Second, MEMS blurs the
distinction between complex mechanical systems and integrated circuit
electronics.

Historically, sensors and actuators are the most costly and unreliable part of a
macro-scale sensory-actuator-electronics system. In comparison MEMS
technology allows these complex electromechanical systems to be manufactured
using bath fabrication techniques allowing the cost and reliability of the sensors
and actuators to be put into parity with that of integrated circuits. Interestingly,
even though the performance of MEMS devices and systems is expected to be
superior to macro-scale components and systems, the price is predicted to be
much lower.

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What is the difference between fabrication of MEMS
device and ICs ?

There are many similarities between fabricating ICs and MEMS products. Both
usually involve silicon wafers. The suppliers of capital equipment for MEMS
manufacturing generally are also suppliers of semiconductor manufacturing
equipment. Both fields are facing tough technical challenges in device packaging.
And both industries are witnessing an increase in the number of companies
offering foundry services.

Beyond those points, there are a number of dissimilarities between ICs and
MEMS devices. Many MEMS processes call for the bonding of two or more
wafers together to provide a sufficient depth of silicon for etching micro-
machines. Gold, an element that is banned from semiconductor fabrication lines
because of its conductive properties is employed as a thin film in some MEMS.
Because MEMS are used in harsh environments like automobile engines, they are
subject to stress requirements and testing that would melt many ICs.

MEMS devices and ICs are “alike and different in many ways.” In the conception
and design of MEMS, there are substantial differences. Since MEMS are three-
dimensional products, compared with the two-dimensional world of ICs, there
are design requirements that go beyond the conventional methods.

Simulation of a design is one example. In ICs, you can set down the layout of a
device and be reasonably assured of first-pass success. With MEMS, we have to
model and simulate in multiple domains, such as optical, atmospheric, etc.

The fabrication technology is similar, but on a different scale. For MEMS, we

deposit materials and remove them, essentially the same as IC s. But the films put

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down are thicker by an order of magnitude, several microns thick, sometimes up
to 10 microns, while IC thin-film layers are typically measured in angstroms
these days. And MEMS fabrication calls for deeper etches. The whole point of
MEMS is to wind up with a mechanical structure that moves.

In wafer-scale testing, dicing, packaging and final test, there are significant
differences between ICs and MEMS. The equipment used is similar to IC dicing,
packaging and testing equipment, but used at extremes.

Bulk micro-machining, which cleaves up to four substrates together, uses both

wet and dry etching processes, including anisotropic etching with potassium
hydroxide, while semiconductor manufacturing has generally progressed to dry
plasma etching. In putting together substrates, MEMS also requires bonding
silicon to silicon, silicon to glass and silicon to ceramics.

Both ICs and MEMS make use of silicon-on-insulator (SOI) technology. The
reason they need it is dramatically different. With MEMS, the SOI layer is used
for an etch stop and to control uniformity across the wafer.

Packaging is another challenge in MEMS manufacturing. MEMS products often

need to be hermetically sealed. MEMS devices can’t use plastic (packages),
because of outgassing by the devices. While low-cost packaging is available to
ICs, MEMS devices frequently resort to ceramic packaging, because of their use
in environments like chemical plants and spacecraft.

Processes involved in the fabrication of MEMS device

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MEMS technology is based on a number of tools and methodologies, which are
used to form small structures with dimensions in the micrometer scale
( one millionth of a meter ). Significant parts of the technology has been adopted
from the integrated circuit technology. For instance, almost all devices are build
on wafers of silicon, like ICs. The structures are realized in thin films of materials,
like Ics. They are patterned using photolithographic methods, like Ics. There are
however several processes that are not derived from IC technology, and as the
technology continues to grow the gap with IC technology also grows.

There are three basic building blocks in MEMS technology, which are the ability
to deposit thin films of material on a substrate, to apply a patterned mask on top
of the films by photolithographic imaging, and to etch the films selectively to the
mask. A MEMS process is usually a structured sequence of these operations to
form actual devices.

1. Deposition:
Deposition is a key building block in that it is the ability to deposit
thin films of material. MEMS deposition technique is classified in two groups.

a) Deposition resulting from chemical reactions: Chemical vapor deposition,

electro-deposition, epitaxy and thermal oxidation. These processes exploit
the creation of solid materials directly from chemical reactions in gas
and/or liquid compositions or with the substrate material. The solid
material is usually not the only product formed by the reaction.
Byproducts can include gases, liquids and even other solids.

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 b) Depositions resulting from physical reaction: Physical vapor deposition,
casting. The material deposited is physically moved on to the substrate ( a
chemical byproduct is not created).

2. Etching:
In order to form a functional MEMS structure on a substrate
it is necessary to etch the thin film previously deposited and/or the substrate
itself. In general there are two classes of etching processes:

a) Wet etching: The material is dissolved when immersed in a chemical

solution.

b) Dry etching: The material is sputtered or dissolved using reactive ions or a

vapor phase etchant.

3. Lithography:
Lithography in the MEMS context is typically the
transfer of a pattern to a photosensitive material by selective exposure to a
radiation source such as sunlight. When a photosensitive material is selectively
exposed to radiation (eg., by masking some of the radiation), the radiation
pattern in the material is transformed to the material exposed( the properties of
the exposed and unexposed regions differ).

Goal of Wafer fabrication

The four stages of semiconductor manufacturing are materials preparation,

crystal growth and wafer preparation, wafer fabrication and packaging.

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Wafer fabrication is the series of processes used to create the semiconductor
devices in and on the wafer surface. The polished starting wafer come into
fabrication with blank surfaces and exit with the surface covered with hundreds
of completed chips.

Wafer terminology:

The regions of wafer surface are

1. Chip, die, circuit, microchip or bar. All these terms are used to identify the
identical patterns covering the majority of the wafer surface
2. Scribe lines, saw lines, streets and avenues, These areas are small avenues
of space between the chips used to separate the chips from each other.
Generally the scribe lines are black, but some companies place alignment
targets in them.

3. Engineering die, test die. These chips are different from the regular device
or circuit die. They contain special devices and circuit elements that can be
electrically tested during the fabrication processing.

4. Edge die. The edges of the wafer contain partial die patterns. The partial
die will not function. The number and area occupied by the edge die is a
function of the chip size and the wafer diameter. One of the driving forces
behind larger wafer diameters is to minimize the area occupied by the
edge die.

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 5. Wafer crystal Planes. The cutaway section illustrates the crystal structure
of the wafer under the circuit layers. The diagram shows that the chip
edges are oriented to the wafer crystal structure.

6. Wafer flats. The depicted wafer has a major and minor flat, indicting that
it is a p- type oriented wafer.

Basic Wafer fabrication operations

Wafer – fabrication areas around the world produce billions of chips with
thousands of different functions and designs. The variations in the
manufacturing techniques are infinite, with each company exercising its own

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version of a standard process. But within all this process diversity there are only
four basic operations performed on a wafer in the fabrication process. They are
1. Layering
2. Patterning
3. Doping
4. Heat treatments

Layering

Layering is the operation used to add thin layers to the wafer surface. These
layers are either insulators, semiconductors or conductors. They are of different
materials and are grown or deposited by variety of techniques. Layers are added
to the surface by two major techniques, growing and deposition. Oxidation is a
technique of growing a silicon dioxide layer on a silicon wafer. Common
deposition techniques are chemical vapour deposition (CVD), evaporation and
sputtering. The following table shows the common layer materials and layering
processes.

Layers Thermal Chemical vapour Evaporation Sputtering

oxidation deposition
Insulators Silicon Silicon Silicon
dioxide dioxide,silicon dioxide,
nitrides Silicon
monoxide
Semiconductor Epitaxial silicon,
s Polysilicon
Conductors Aluminum, Tungten,

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 Aluminum/ Titanium,
silicon, Molybdenum,
Aluminum/ Aluminum,
Copper, Aluminum/sil
Nichrome, icon,
Gold. Aluminum/Cu

Patterning

Patterning is the series of steps that results in the removal of selected portions of
the added surface layers. After removal, a pattern of the layer is left on the wafer
surface. The material removed may be in the form of a hole in the layer or just a
remaining island of the material. The patterning process is known by the names
photomasking, masking, photolithography, microlithography. It is the patterning
operation that creates the surface parts of the devices that make up a circuit. The
goal of the operation is to create in or on the wafer surface the parts of the device
or circuit in the exact dimensions (feature size) required by the circuit design
and to locate them in their proper location on the wafer surface.

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The removal of selected portions are carried out using the process called etching.
Now we shall discuss the various etching process in detail.

Etching

Etching is the process of removing the top layer(s) from the wafer surface
through the openings in the resist pattern. The various etching processes are

1. Wet etching
2. Dry etching

Wet etching

In this process the wafers are immersed in a tank of an etchant for a specific
time, transferred to a rinse station for acid removal and transferred to a station
for final rinse and a spin dry step. Wet etching is used for products with feature
sizes greater than 3µm. Below that level the control and precision needed
requires dry etching techniques.

Etching uniformity and process control are enhanced by the addition of heaters
and agitation devices, such as stirrers and ultrasonic or megasonic waves to the
immersion tanks. For etching the control of the chemical composition and timing
becomes critical. The problem of etchant contamination of the wafers is
addressed by point-of-use filters.

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These are special filters fitted to automatic chemical dispensing systems to filter
clean the chemicals just prior to filling the immersion tank. This placement
catches particulate contamination from the chemicals , pumps and tubing
systems.

Wet etchants are selected for their ability to uniformly remove the top wafer
layer without attacking the underlying material. Etch time variability is process
parameter influenced by temperature variation as the boat and wafer come to
temperature equilibrium in the tank and the continued etching action as the
wafers are transferred to a rinse tank. Generally the process is set at the shortest
time compatible wit uniform etching and high productivity. The maximum time
is limited to the amount of time the resist will continue to adhere to the wafer
surface.

The exactness of the image transfer is dependent on the several process factors.
They include incomplete etch , over etching, under cutting, selectivity and
anisotropic/isotropic etching of the side walls.

Limitations of wet etching

Wet etching is limited to pattern sizes of 3µm.

Wet etching is isotropic, resulting in sloped side walls.
A wet etch process requires rinse and dry steps.
The wet chemicals are hazardous and/or toxic.

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 Wet processes represent a contamination potential.
Failure the resist-wafer bond causes undercutting.

Dry etching

The limitations of wet etching have led to the use of dry etch processes for the
definition of small feature sizes on advanced circuits.

Dry etching is a generic term that refers to the etching techniques in which gases
are the primary etch medium and the wafers are etched without wet chemicals or
rinsing. The wafers enter and exit the system in a dry state. There are three dry
etching techniques: plasma, ion milling and reactive ion etch (RIE).

Plasma etching

Plasma etching, like wet etching, is a chemical process but uses gases and plasma
energy to cause the chemical reaction. Comparison of silicon dioxide etching in
the two systems illustrates the differences. In wet etching of silicon dioxide the
fluorine in the BOE etchant is the ingredient that dissolves the silicon dioxide,
converting it in to water rinseable components. The energy required to drive the
reaction comes from the internal energy in the BOE solution or from an external
heater.

A plasma etcher requires the same elements: a chemical etchant and an energy
source. Physically, a plasma etcher consists of a chamber, vacuum system, gas
supply and a power supply. The wafers are loaded into the chamber and the
pressure inside is reduced by the vacuum system. After the vacuum is

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established, the chamber is filled with reactive gas. For the etching of silicon
dioxide the gas is usually CF4 mixed with oxygen. A power supply creates a radio
frequency (RF) field through electrodes in the chamber. The field energizes the
gas mixture to a plasma state. In the energized state the fluorine attacks the
silicon dioxide, converting it into volatile components that are removed from the
system by the vacuum system.

Ion milling

A second type of dry etch system is the ion beam system. Unlike the chemical
plasma systems ion beam etching is a physical process. The wafers are placed on
a holder in a vacuum chamber and a stream of argon is introduced into the
chamber. Upon entering the chamber the argon is subjected to a stream of high
energy electrons from a set of cathode –anode electrodes.

The electrons ionize the argon atoms to high-energy state with a positive charge.
The wafers are held on a negatively grounded holder, which attracts the ionized
argon atoms. As the argon atoms travel to the wafer holder they accelerate
picking up energy. At the wafer surface they crash into the exposed wafer layer a
literally blast small amounts the wafer surface. This physical process is known as
momentum transfer. No chemical reaction takes place between the argon atoms
and the wafer material. Ion beam etching is also called sputter etching or ion
milling.

The material removal (etching) is highly directional (anisotropic) resulting in

good definition of small openings. Being a physical process, ion milling has poor
selectivity especially with photo-resist layers. Radiation damage from the
ionization is also a problem.

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Reactive ion etching

Reactive ion etching (RIE) systems combine plasma etching and ion beam etching
principles. The systems are similar in construction to the plasma systems but
have a capability of ion milling. The combination brings the benefits of chemical
plasma etching along with the benefits of directional ion milling. A major
advantage of RIE systems is in the etching of silicon dioxide over the silicon
layers. The combination etch results in a selectivity ratio of 35:1, whereas ratios of
only 10:1 are available with plasma – only etching. RIE systems have become the
etching system of choice for most advanced product lines.

Patterning is the most critical of the four basic operations. This operation sets the
critical dimensions of the devices. Error in the patterning process can cause
distorted or misplaced patterns that result in changes in the electrical functioning
of the device or circuit. Misplacement of the pattern can have same bad results.

Another problem is defects. Patterning is a high-tech version of photography, but

performed at incredibly small dimensions. This contamination problem is
magnified by the facts that patterning operations are performed on the wafer
from 5 to 20-plus times in the course of the wafer fabrication process.

Doping

Doping is the process that puts specific amounts of dopants in the wafer surface
through opening in the surface layers. The two techniques are thermal diffusion
and ion implantation.

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 • Thermal diffusion is a chemical process that takes place when the wafer is
heated to the vicinity of 1000o C and exposed to vapours of the proper
dopant.

• Ion implantation is a physical process in which the dopant atoms are

ionized, accelerated to a high speed and shot into the wafer surface.

The purpose of the doping operation is to create either n-type or p-type pockets
in the wafer surface. These pockets form the n-p junctions required for operation
of the transistors, diodes, capacitors and the resistors of the circuit.

Heat treatments

Heat treatments are the operations in which the wafer is simply heated and
cooled to achieve specific results. In the heat treatment operations, no addition of
materials is added or removed from the wafer. An important heat treatment
takes place after ion implantation. The implantation of the dopant causes a
disruption of the wafer crystal structure which is repaired by a heat treatment,

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called anneal, at 1000o C. Another takes place after the conducting stripes of metal
are formed on the wafer. These stripes carry the electrical current between the
devices in the circuit. To ensure good electrical conduction, the metal is alloyed
to the wafer surface by a heat treatment which takes place at 450o C.

Fabrication of Piezoresistive Differential Pressure Sensor

The steps involved are

Anisotropic etching of top silicon wafer to realize the thin membrane.

Implanting for in the regions where the resistors need to be located on

the top wafer

Interconnect the four resistors to form the Wheatstone’s bridge.

Bond a bottom wafer with a hole to act as the pressure port.

Finally packaging is done.

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Single Crystal Silicon MEMS Fabrication Technology Using Proton
Implantation Smart Cut Technique

Single crystal silicon material is highly desirable for implementing Micro Electro
Mechanical devices and systems due to its reliable and reproducible mechanical
and electrical properties. Silicon on insulator (SOI) wafers have been used to
realize single crystal silicon MEMS inertial sensors, optical devices, field emission
components, etc. The silicon structural layer is typically obtained through wafer
bonding followed by a grinding and chemical mechanical polishing (CMP). This
technique, however, results in a substantial amount of silicon material loss
through the grinding and CMP process, hence increasing the substrate and
processing cost.

Proton implantation smart cut technique has been proposed to produce low cost SOI
wafers, with a typical silicon thickness on the order of nanometers, for low power
microelectronics applications. At present most devices, however, call for silicon structural
layer with a thickness of at least 1µm, sometimes a few ten micrometers, to achieve
certain performance requirements. Single crystal silicon layer with micrometer thickness

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can be obtained through increasing the proton implantation energy using the smart cut
technique for MEMS applications. The silicon film thickness, critical for precision micro-
system fabrication, can be accurately determined through implantation energy control.
The proposed fabrication technique eliminates the grinding and CMP processes required
in conventional MEMS SOI wafer preparation, potentially resulting in a significant
substrate and processing cost reduction. MEMS prototype structures such as cantilever
beams and clamped-clamped micro-bridges with a silicon thickness of 1.78 µm have been
fabricated as demonstrated vehicles for future sensor and actuator implementations. A
further increased layer thickness can be obtained through enhancing the implantation
energy or silicon epitaxial growth in top of the existing layer to improve micro-system
performance.

Fabrication process

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A 4-inch silicon substrate(wafer A)is first passivated with 1000 angstrom thermal
oxide followed by proton implantation with a dose ranging from 5 x 1016 to 7 x

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1016 ions/cm2 and implant energy of 200 KeV. The implantation energy is chosen
to achieve a H+ peak concentration of approximately 1.8 µm below the water
surface,. The implanted hydrogen ions introduce micro-cavities along the peak
concentration. After bonded to a carrier substrate, the micro-cavities cause silicon
wafer to split along the peak concentration when annealed at elevated
temperatures, thus forming a uniform crystal silicon layer with a thickness of 1.8
µm which can be used as structural material for MEMS sensor and actuator
applications. An increased thickness can be obtained through further enhancing
the implant energy or epitaxial growth.

After implantation the oxide passivation layer is polished to obtain smooth

surface for the subsequent wafer bonding. Another 4 inch silicon substrate
(Wafer B) serving as a carrier wafer is passivated by thermal oxide. A 1.5 µm
thick oxide is chosen for the prototype devices fabrication. This wafer is RCA
cleaned and rinsed in DI water along with wafer A to ensure a hydrophilic
surface, critical for obtaining an initial wafer bonding at low temperature
required for the smart cut process. The two substrates are then bonded together
through a compression bonding to eliminate the residual water vapor particles.

The bonded wafers are annealed at 270oC for 12 hours to enhance the initial
bonding strength, crucial for successful subsequent silicon splitting at an elevated
temperature. The wafers are then heated at 485oC for 30 minutes to initiate the
splitting process causing a 1.8 µm- thick single crystal silicon layer transferred
from wafer A to wafer B as depicted. At this point, wafer A can be polished and
reused for the same procedure thus eliminating silicon material loss due to the
grinding and CMP steps required in conventional MEMS SOI wafer preparation,
potentially resulting in a significant cost reduction. The split silicon layer along
with the carrier substrate is then annealed over 1100oC for two hours. This

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annealing step not only strengthens the chemical bonds but also removes
implantation-induced defects in the transferred layer.

To experiment the prototype process, sample pieces diced from wafer A are
bonded to wafer B for the splitting study.

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Conclusion

Thus MEMS technology is enabling new discoveries in science and engineering.

We come to know that MEMS is an extremely diverse technology that could
affect every category of commercial and military products. The recent trends in
MEMS proved that this technology would be an essential one in the progress of
future fabrication science. Thus we conclude that MEMS, which is an emerging
technology today, would reach a position where it would be an inevitable
technique to fabricate any device without using MEMS.

Bibiliography

Jack W. July and Paulo Motta, “A lecture and hands on laboratory course:
Introduction to Micromachining and MEMS.

Jack W. July and Paulo Motta, “Fabrication of MEMS devices”.

Peter Van Zant, “ Microchip fabrication “.

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