Edge Detection (RC and NAND)
Edge Detection (RC and NAND)
SAIT- ENT-DIGI-260
Objectives:
1. Observe and analyze the operation of an RC Edge Detection circuit. 2. Observe and analyze the operation of an RC Monostable 3. Observe and analyze the operation of a NAND edge detection circuit.
Pre-Lab Preparation:
1. Attend lectures and review the theory of operation of edge detection circuits. 2. Read the textbook chapters and on-line materials that relate to edge detection circuits.
Equipment Required:
1. 2. 3. 4. 5. Experimenters board with 5V power supply Function Generator Oscilloscope PC with EWB 4093 Schmitt NAND, parts kit.
Additional Notes:
1. Important: Measure and set the voltages on the function generator before connecting to the circuit. Apply DC offset if providing the output to a logic gate. 2. The Schmitt triggered gates produce a fast output edge on a slow input edge.
SAIT- ENT-DIGI-260
Procedure 1:
Observe the operation of an R-C based edge detection / monostable circuit 1. Physically connect the circuit shown in Figure #1 below. Use the following values: C = 0.1 F R = 1k E = 1KHz square wave, 5 Vpp at 50% duty cycle (no offset) 2. Place Channel 1 of an oscilloscope at the output of the oscillator and Channel 2 at R. View the time-domain relationship between the input and the output. (note: a time-domain relationship diagram indicates the relationship
between the input signal and the resultant output signal at specific points in time).
3. Predict the pulse width using typical Vt- specifications and include values in table #1. Look up the specification sheet and determine the range of Vt- and use a median value for your calculations. Use the equation tw=-RC ln( Vt-/5) to calculate the anticipated pulse width (tw). Show all work (use back of the lab). 4. Measure the output of the inverter with respect to its input. Capture a time-domain relationship from the oscilloscope and paste as Capture #1..
C R
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Figure #1: RC Circuit 5. Using EWB, connect the circuit shown in Figure #1. Run the simulation and compare the results to your physical circuit. 6. Answer the questions at the end of the lab. 7. Repeat the procedures 1 to 4 above using a smaller value of RC. Record the values. Capture a time-domain relationship from the oscilloscope and paste as Capture #2. 8. Answer the questions at the end of the lab. 9. Leave the circuit connected for the instructor to verify its functionality. 2
SAIT- ENT-DIGI-260
Procedure 2:
Observe the operation of a NAND based edge detection circuit 1. Using EWB, connect the circuit shown in Figure #2 below. Place Channel 1 of the oscilloscope at the input and channel 2 at the output. Run the simulation and measure the output pulse width. Record this value in Table #2. 2. Physically connect the circuit shown in Figure #2 below. Use the 4093B CMOS Schmitt-Triggered NAND gates.
Figure #2: NAND Edge Detector 3. Apply a 100 kHz square wave 50% DC with DC offset (0 to +5 Volt). Measure the output pulse. Record the value in Table #2 and capture a time-domain relationship from the oscilloscope and paste as Capture #3. 4. Add an additional inverter to the end of the circuit (see figure 3 below). Again, apply a 100 kHz square wave 50% DC with DC offset (0 to +5 Volt). Measure the output pulse (measure at the half-way mark). Capture a time-domain relationship from the oscilloscope and paste as Capture #4. 5. Answer the questions at the end of the lab.
SAIT- ENT-DIGI-260
Predicted pulse width Measured Pulse Width (circuit) Table #1: Predicted pulse width for the RC-based circuit
SAIT- ENT-DIGI-260
Measured Pulse Width (Physical Circuit) Measured Pulse Width (EWB Simulation) Table #2: Pulse width from NAND edge detector
SAIT- ENT-DIGI-260
Procedure 4:
Complete the following questions:
1.
RC Circuit: Explain why this circuit is considered an edge detector. Which edge will this circuit detect?
What are the results of changing the input frequency on its edge detection and monostable properties?
2. NAND Edge detector: Explain how to increase or decrease the output pulse width of the edge detectors using observations from figure 3 and 4.
RC edge detector circuit, simulation, diagram and questions: ___________ NAND edge detector ccts, simulation, diagram, table and question: _________