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Design and Evaluation of A Capacitively Coupled Sensor Readout Circuit, Toward Contact-Less ECG and EEG (Electronics Project)

Design and Evaluation of a Capacitively Coupled Sensor Readout Circuit, Toward Contact-less ECG and EEG (Electronics Project)
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109 views75 pages

Design and Evaluation of A Capacitively Coupled Sensor Readout Circuit, Toward Contact-Less ECG and EEG (Electronics Project)

Design and Evaluation of a Capacitively Coupled Sensor Readout Circuit, Toward Contact-less ECG and EEG (Electronics Project)
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Institutionen fr systemteknik

Department of Electrical Engineering


Examensarbete

Design and evaluation of a capacitively coupled sensor readout circuit, toward contact-less ECG and EEG
Examensarbete utfrt i elektroniska komponenter vid Tekniska hgskolan i Linkping av Daniel Svrd LiTH-ISY-EX--10/4390--SE
Linkping 2010

Department of Electrical Engineering Linkpings universitet SE-581 83 Linkping, Sweden

Linkpings tekniska hgskola Linkpings universitet 581 83 Linkping

Design and evaluation of a capacitively coupled sensor readout circuit, toward contact-less ECG and EEG

Examensarbete utfrt i elektroniska komponenter vid Tekniska hgskolan i Linkping av


Daniel Svrd LiTH-ISY-EX--10/4390--SE

Handledare: Examinator:

Atila Alvandpour
isy, Linkping University

Atila Alvandpour
isy, Linkping University

Linkping, 23 March, 2010

Avdelning, Institution Division, Department Division of Electronic Devices Department of Electrical Engineering Linkpings universitet SE-581 83 Linkping, Sweden Sprk Language Rapporttyp Report category ISBN ISRN

Datum Date

2010-03-23

Svenska/Swedish Engelska/English

Licentiatavhandling Examensarbete C-uppsats D-uppsats vrig rapport

LiTH-ISY-EX--10/4390--SE Serietitel och serienummer ISSN Title of series, numbering

URL fr elektronisk version


http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-54520

Titel Title

Design och utvrdering av en kapacitivt kopplad sensorutlsningskrets, mot kontaktls EKG och EEG Design and evaluation of a capacitively coupled sensor readout circuit, toward contact-less ECG and EEG

Frfattare Daniel Svrd Author

Sammanfattning Abstract In modern medicine, the measurement of electrophysiological signals play a key role in health monitoring and diagnostics. Electrical activity originating from our nerve and muscle cells conveys real-time information about our current health state. The two most common and actively used techniques for measuring such signals are electrocardiography (ECG) and electroencephalography (EEG). These signals are very weak, reaching from a few millivolts down to tens of microvolts in amplitude, and have the majority of the power located at very low frequencies, from below 1 Hz up to 40 Hz. These characteristics sets very tough requirements on the electrical circuit designs used to measure them. Usually, measurement is performed by attaching electrodes with direct contact to the skin using an adhesive, conductive gel to xate them. This method requires a clinical environment and is time consuming, tedious and may cause the patient discomfort. This thesis investigates another method for such measurements; by using a non-contact, capacitively coupled sensor, many of these shortcomings can be overcome. While this method relieves some problems, it also introduces several design diculties such as: circuit noise, extremely high input impedance and interference. A capacitively coupled sensor was created using the bottom layer of a printed circuit board (PCB) as a capacitor plate and placing it against the signal source, that acts as the opposite capacitor plate. The PCB solder mask layer and any air in between the two acts as the insulator to create a full capacitor. The signal picked up by this sensor was then amplied by 60 dB with a high input impedance amplier circuit and further conditioned through ltering. Two measurements were made of the same circuit, but with dierent input impedances; one with 10 M and one with 10 G input impedance. Additional ltering was designed to combat interference from the main power lines at 50 Hz and 150 Hz that was discovered during initial measurements. The circuits were characterized with their transfer functions, and the ability to amplify a very lowlevel, low frequency input signal. The results of these measurements show that high input impedance is of critical importance for the functionality of the sensor and that an input impedance of 10 G is sucient to produce a signal-to-noise ratio (SNR) of 9.7 dB after digital ltering with an input signal of 25 V at 10 Hz. Nyckelord Keywords sensors, ecg, eeg, low noise, low frequency, electronics, readout, pcb, electrophysiological signals, amplier, instrumentation amplier

Abstract
In modern medicine, the measurement of electrophysiological signals play a key role in health monitoring and diagnostics. Electrical activity originating from our nerve and muscle cells conveys real-time information about our current health state. The two most common and actively used techniques for measuring such signals are electrocardiography (ECG) and electroencephalography (EEG). These signals are very weak, reaching from a few millivolts down to tens of microvolts in amplitude, and have the majority of the power located at very low frequencies, from below 1 Hz up to 40 Hz. These characteristics sets very tough requirements on the electrical circuit designs used to measure them. Usually, measurement is performed by attaching electrodes with direct contact to the skin using an adhesive, conductive gel to xate them. This method requires a clinical environment and is time consuming, tedious and may cause the patient discomfort. This thesis investigates another method for such measurements; by using a non-contact, capacitively coupled sensor, many of these shortcomings can be overcome. While this method relieves some problems, it also introduces several design diculties such as: circuit noise, extremely high input impedance and interference. A capacitively coupled sensor was created using the bottom layer of a printed circuit board (PCB) as a capacitor plate and placing it against the signal source, that acts as the opposite capacitor plate. The PCB solder mask layer and any air in between the two acts as the insulator to create a full capacitor. The signal picked up by this sensor was then amplied by 60 dB with a high input impedance amplier circuit and further conditioned through ltering. Two measurements were made of the same circuit, but with dierent input impedances; one with 10 M and one with 10 G input impedance. Additional ltering was designed to combat interference from the main power lines at 50 Hz and 150 Hz that was discovered during initial measurements. The circuits were characterized with their transfer functions, and the ability to amplify a very lowlevel, low frequency input signal. The results of these measurements show that high input impedance is of critical importance for the functionality of the sensor and that an input impedance of 10 G is sucient to produce a signal-to-noise ratio (SNR) of 9.7 dB after digital ltering with an input signal of 25 V at 10 Hz.

Acknowledgments
I would like to thank the following people for making it possible for me to write this thesis: First of all Professor Atila Alvandpour, my supervisor and examiner, for giving me the opportunity and inspiring me to do this project as my master thesis. We have had interesting discussions and you have given me many valuable advice. Thank you for your patience. Dr. Christer Jansson for useful discussions and tips on circuit techniques. Michael Pettersson for proof-reading my manuscript and making great comments to improve its readability. Lic. Timmy Sundstrm and Lic. Jonas Fritzin for being helpful and teaching me how to use the lab equipment as well as giving both technical and nontechnical advice. Arta Alvandpour for helping me with computer related issues and creating the circuit boards; and Anna Folkesson for your help with administration and getting me settled in. Finally, my sister Soa and my parents Inger and Christian Svrd for your love and support. Thank you all very much!

vii

Acronyms
ADC analog-to-digital converter ECG electrocardiography EEG electroencephalography FFT fast Fourier transform LSB least signicant bit PCB printed circuit board RMS root mean square SNR signal-to-noise ratio

ix

Contents
Abstract Acknowledgments Acronyms Contents List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Introduction 1.1 Background and Motivation . . 1.2 Goal of This Thesis . . . . . . . 1.3 Organization of the Thesis . . . 1.4 Electrophysiological Signals . . 1.4.1 Electrocardiography . . 1.4.2 Electroencephalography v vii ix xi xiii xiv 1 1 2 3 3 3 5 7 8 9 9 10 10 11 11 12 14 16 18 21

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2 Circuit Design 2.1 System Overview . . . . . . . . . . . . . . . . . . . 2.1.1 The Capacitive Sensor . . . . . . . . . . . . 2.1.2 Instrumentation Amplier . . . . . . . . . . 2.1.3 Notch Filters . . . . . . . . . . . . . . . . . 2.1.4 Second Gain Stage and Band Pass Filtering 2.2 Circuit Analysis . . . . . . . . . . . . . . . . . . . . 2.2.1 Capacitive Sensor . . . . . . . . . . . . . . 2.2.2 Input Amplication Stage . . . . . . . . . . 2.2.3 Interstage Filter and Level Shifter . . . . . 2.2.4 Second Amplication Stage . . . . . . . . . 2.2.5 Notch Filter . . . . . . . . . . . . . . . . . . 2.2.6 The Complete System . . . . . . . . . . . . xi

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xii 3 Printed Circuit Board Layout 3.1 Software Tools . . . . . . . . . . . . . . . . . 3.2 Sensor and Instrumentation Amplier Board 3.2.1 Layout Considerations . . . . . . . . . 3.2.2 Unused Circuitry . . . . . . . . . . . . 3.2.3 Layout . . . . . . . . . . . . . . . . . . 3.3 Signal Conditioning Board . . . . . . . . . . . 3.3.1 Layout . . . . . . . . . . . . . . . . . . 3.4 Notch Filters on Stripboard . . . . . . . . . . 4 Measurement 4.1 Measurement Setup . . . . . . . . . . . . . 4.1.1 Oscilloscope Resolution . . . . . . . 4.1.2 Function Generator Signal Level . . 4.1.3 Measurement Methodology . . . . . 4.2 Problem with Main Power Line Noise . . . 4.2.1 Notch Filters . . . . . . . . . . . . . 4.2.2 Filtering in MATLAB R . . . . . . . 4.3 Measurements with a 10 M Bias Resistor . 4.3.1 Input Filter . . . . . . . . . . . . . . 4.3.2 Transfer Characteristic . . . . . . . . 4.3.3 Low Level Signal Response . . . . . 4.4 Measurements with a 10 G Bias Resistor . 4.4.1 Input Filter . . . . . . . . . . . . . . 4.4.2 Transfer Characteristic . . . . . . . . 4.4.3 Low Level Signal Response . . . . . 4.5 Conclusions . . . . . . . . . . . . . . . . . .

Contents 23 23 23 25 26 26 27 28 29 31 32 33 33 33 34 35 36 36 36 37 38 40 40 41 42 43 45 47 49 51 51 52 53 54 57 58 58 59

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5 Summary 5.1 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . References A MATLAB R Code Listings A.1 Notch Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A.2 Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B Schematics B.1 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C PCBs C.1 PCB Layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C.1.1 Sensor PCB . . . . . . . . . . . . . . . . . . . . . . . . . . . C.1.2 Signal Conditioning PCB . . . . . . . . . . . . . . . . . . .

Contents

xiii

List of Figures
1.1 1.2 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 2.11 2.12 2.13 2.14 2.15 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 4.12 EEG electrodes and skin preparation pads. . . . . . . . . . . . . . Graph of a typical ECG signal. . . . . . . . . . . . . . . . . . . . . Circuit diagram of the complete system. . . . . . . . . . . . . . . . Cross-section of the sensor PCB. . . . . . . . . . . . . . . . . . . . Small signal model of the capacitive sensor. . . . . . . . . . . . . . Transfer function of the lter at the input. . . . . . . . . . . . . . . Small signal model of the instrumentation amplier. . . . . . . . . Transfer function of the input amplication stage. . . . . . . . . . Small signal model of the interstage lter and level shifter. . . . . . Transfer function of the interstage high-pass lter. . . . . . . . . . Small signal model of the second amplication stage. . . . . . . . . Transfer function of the second amplication stage. . . . . . . . . . Circuit diagram of an active twin-T notch lter circuit. . . . . . . Small signal model of the notch lter. . . . . . . . . . . . . . . . . Transfer functions of notch lters with dierent values of Q. . . . . Transfer function of the complete system including the notch lters. Transfer function of the complete system without any notch lters. Schematic for sensor and instrumentation amplier stage including component values. . . . . . . . . . . . . . . . . . . . . . . . . . . . Decoupling for the instrumentation amplier. . . . . . . . . . . . . Guard pins of the INA116 and recommended layout practice. . . . Instrumentation amplier and sensor PCB in scale 2:1. . . . . . . . Schematic for second amplication stage including component values and supply decoupling. . . . . . . . . . . . . . . . . . . . . . . Signal conditioning PCB in scale 2:1. . . . . . . . . . . . . . . . . . Schematic for notch lter including component values and supply decoupling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Stripboard complete with the two notch lters. . . . . . . . . . . . Photograph of the PCBs together with coin for scale. . . . . . . PCBs measurement setup. . . . . . . . . . . . . . . . . . . . . . Plot of noise at the input. . . . . . . . . . . . . . . . . . . . . . Fourier transform of the noise. . . . . . . . . . . . . . . . . . . Transfer function of the input lter with a 10 M bias resistor. Transfer function of the complete circuit with a 10 M resistor. Output of the circuit when a low level input signal is present. . Output of low level signal after digital ltering in MATLAB R . Transfer function of high pass lter at input of sensor. . . . . . Transfer function of the complete circuit with a 10 G resistor. Output when a low level input signal is present. . . . . . . . . . Output of low level signal after digital ltering in MATLAB R . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 8 9 11 12 13 15 15 16 17 17 18 19 20 21 21

24 24 25 27 28 28 29 30 31 32 34 35 37 37 38 39 40 41 42 43

xiv

Contents

List of Tables
1.1 1.2 3.1 3.2 Summary of the dierent parts of an ECG signal. . . . . . . . . . . Summary of the dierent waves of an EEG signal. . . . . . . . . . Components used on the sensor PCB including values, tolerances and packages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Components used on the second stage PCB including values, tolerances and packages. . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5

27 29

4.1 4.2 5.1 5.2

Power consumption of the sensor readout circuit with a 10 M resistor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Power consumption of the sensor readout circuit with a 10 G resistor. 43 Signal levels and bandwidths of ECG and EEG signals. . . . . . . Measurement results and performance of the circuit. . . . . . . . . 45 46

Chapter 1

Introduction
1.1 Background and Motivation

In modern medicine, the measurement of electrophysiological signals play a key role in health monitoring and diagnostics. Electrical activity originating from our nerve and muscle cells conveys real-time information about our current health state. The two most common and actively used techniques for measuring such signals are electrocardiography (ECG) and electroencephalography (EEG). ECG is the measurement of the electrical signals generated by the heart muscle as it is beating; and has applications ranging from diagnosis of arrhythmia and infarction to simple heart rate monitoring. Similarly, EEG is the measurement of the electrical signals originating from the brain; and is used to monitor and diagnose diseases and disorders such as epilepsy, sleep disorders, Alzheimer and Parkinson. In addition, EEG could be used to help develop advanced prosthesis that could be controlled by the patients thoughts. Another, non-clinical application might be detection of drowsiness in car drivers to avoid accidents related to driver fatigue [1, 2]. ECG and EEG signals are extremely weak, with EEG signals reaching down to the order of tens of microvolts [3]. Additionally, these signals are very slow with frequencies reaching down to between 0 and a few Hz. These two characteristics combined makes them extremely dicult to measure and sets strict requirements on the signal-to-noise ratio and linearity of the interfacing analog circuitry. The most critical part of the measurement is a robust and accurate sensor interface circuit to amplify these slowly changing, low-level signals in the presence of noise sources and other interference. The design of such electronic circuits is a major challenge. Todays circuits for measuring EEG largely relies on direct contact with the subjects skin and uses conductive coupling to measure these signals. This is done by xating electrodes such as silver chloride or gold electrodes to the naked skin with a conductive gel. This gel acts as a glue to x the electrode to the skin and together they form an electrical transducer to transform ionic current at the surface of the skin to electron current that can be amplied with a high-precision, low-noise electrical readout circuit. 1

Introduction

Figure 1.1. Silver chloride (AuCl) EEG electrodes for use with a conductive gel and skin preparation pads for cleaning of the skin.

To use this kind of direct contact electrodes, preparation to the measuring surface is needed by means of shaving of hair and possibly even abrasion of the skin. Moreover, the chemical makeup of the gel risks irritating the skin, making it uncomfortable for the patient. For long-period measurements, the gel dries out, hardens and loses its conductive ability as well as its ability to hold the electrode in place. This means that the skin has to be cleaned and the whole process of attaching the electrodes has to be remade a very time consuming task. All of these issues makes it very desirable to develop a measurement technique without the need for direct electrical contact with the skin. Such a technique would eliminate patient discomforts due to the use of a conductive gel as well as increase the speed and eciency of the measurement. In extension, such a technique could enable measurement at greater distances, for instance through clothing, chairs, mattresses, telephones (while talking to your physician perhaps) or any other suciently closely located object. This eliminates the need for presence at a medical clinic during measurement; one could for instance have a simple ECG monitoring device at home that automatically sends measurement data to ones physician over the Internet. This would result in a lowcost, simple, remote monitoring system that improves the patient care, reduces the overall health care cost for society and would enable a signicant improvement in treating diseases and disabilities.

1.2

Goal of This Thesis

As a part of a long-term objective of designing and manufacturing a non-contact, capacitively coupled sensor system for measuring ECG, EEG and other electrophysiological signals; this thesis investigates the feasibility of using a small printed circuit board (PCB) with a low-noise amplifying circuit where the PCB itself works as a capacitive sensor to measure input signals of very low amplitude and frequency.

1.3 Organization of the Thesis

1.3

Organization of the Thesis

This thesis consists of ve chapters, a glossary of terms and a number of appendices. Chapter 1 provides the background, motivation and describes the goal of this thesis. This chapter also describes and characterizes ECG and EEG signals. Chapter 2 deals with the design choices made for the circuit. It also includes an analysis of the complete circuit by deriving the transfer functions of each part of the circuit. This allows for a better, more quantitative understanding of the circuit functions. Chapter 3 describes the layout of the PCB manufactured to support circuit measurements. Chapter 4 presents the data acquired from measurements of the circuit and contrasts dierent measurements to nd the most suitable circuit conguration. Chapter 5 summarizes the report and presents the conclusions of the results with regards to the thesis goal. Moreover, this chapter also presents the authors ideas of what can be improved and what would benet from further investigation. The glossary introduces acronyms and terms that are used throughout this report and that are thought to be new to the reader. Appendices include material that the author feels is necessary to repeat the work done for the thesis and that are too long to include within the report itself; such as: circuit schematics, detailed layout gures and source code for computations.

1.4

Electrophysiological Signals

Electrophysiological signals are electrical signals originating from cells in the human body. There are many dierent types of cells, but the ones of consequence for ECG and EEG are muscle cells and nerve cells. The electrical signals are created in the same way for both types of cells; where the cell membranes produce electrochemical impulses as a result of cell excitation. These impulses are conducted over the membranes of the cells. With a collection of a large number of such cells, an electrical signal strong enough to be measured can be generated [3].

1.4.1

Electrocardiography

Electrocardiography is the process of recording electrical impulses generated by the heart as it is beating. The heart is a complex system and it is outside the scope of this thesis to explain exactly how it works and how ECG signals are generated (more information can be found in [3]). However, a simple, qualitative explanation is made below. The heart consists of four dierent blood-lled chambers; the left and right atria and the left and right ventricles. When blood arrives to the heart through the blood vessels from the body, it rst arrives to the atria. The blood is then transferred to the ventricles before it is pumped back out into the body. It is the

4
R

Introduction

P-R

T U Q S-T S

Figure 1.2. Graph of a typical ECG signal with its respective parts marked out.

activation of the muscle cells in these chambers by means of muscle contraction that produces the ECG signal. A signal of a normal ECG cycle in the time domain is shown in Figure 1.2; the dierent parts of the signal marked by letters P, Q, R, S, T and U. The Pwave is a result of atrial depolarization (activation of the muscle cells). The part consisting of letters Q, R and S is commonly referred to as the QRS-complex and appears at the depolarization of the ventricles; also during this time, the electrical repolarization (that happens during resting of the muscle cells) of the atria happens. The T-wave appears during the repolarization of the ventricles. The U-wave is very weak and is not always observed. While there are dierent theories, a generally accepted explanation to the origin of the U-wave is yet to be found. Part P-wave P-R segment QRS complex S-T segment T-wave U-wave Amplitude 100-150 V 1-1.5 mV 150-200 V 50 V Duration 100-120 100 80-100 140-160 16-180 40 ms ms ms ms ms ms

Table 1.1. Summary of the parts of an ECG signal as shown in Figure 1.2, and their approximate amplitude and duration as measured on the surface of the skin [3].

Table 1.1 shows approximate values of the amplitudes and durations of the dierent parts the ECG cycle that is shown in Figure 1.2. These numbers show that the ECG signal is very weak and slow, making it a challenging signal to measure. It has been shown that almost all the power in a typical QRS-complex is contained in frequencies below 30 Hz and that the peak power is in the range 4-12 Hz [4] information that is very useful when designing a sensor readout

1.4 Electrophysiological Signals circuit.

1.4.2

Electroencephalography

Electroencephalography is the process of recording electrical impulses generated from nerve cells in the brain. The many nerve cells in the human brain creates electric elds when excited. These elds can be measured at the scalp of the head or in the brain tissue. The origin and meaning of these electrical signals is very complex and not fully understood to this day, hence an explanation similar to that of the ECG above is dicult to make. Therefore, the study of EEG is largely based on statistical and empirical data. Observing the time domain signal of an EEG is rarely of interest, and as such most studies observe the information contained in the frequency domain of the signal. Most of the power of the EEG is contained in frequencies below 50 Hz, with special attention often given to alpha () waves at around 10 Hz [3, 57]. The reason for this is that the alpha waves are easily recreated and measured at the back of the head when the subjects eyes are closed. The other information carrying frequencies of the EEG and where the can be observed is listed in Table 1.2. Wave Alpha Beta Delta Theta () ( ) ( ) () Observed At the back of the head with eyes closed At the top and front of the head In infants and sleeping adults In children and sleeping adults Frequencies 8-13 13-30 0.5-4 4-8 Hz Hz Hz Hz

Table 1.2. Summary of the dierent EEG waves: where they are measured and their frequency bands.

When measured at the brain tissue, EEG signals have an amplitude of about 100 mV, however the level is signicantly lower than this at the scalp; reaching down to 10-100 V [3]. Thus, EEG signals are weaker than ECG signals and puts a stricter requirement on the signal-to-noise ratio of the sensor and readout circuitry that is used to measure them.

Chapter 2

Circuit Design
The design of the circuit in this thesis is based on the papers by Sullivan, Deiss and Cauwenberghs [5] and Harland, Clark and Prance [7]. The design makes use of a low-noise sensor readout circuit that uses the PCB itself as the sensor. One metal layer on the PCB acts to capacitively couple charge from the skin of the subject to the amplifying circuitry. Because of the size of the circuit, it was split up into two dierent PCBs intended to be placed on top of each other in order to reduce the area of the sensor. A reduced area would mean that more sensors could be placed on the same surface an important property for EEG measurement where it is benecial to have a large number of sensors [8]. The idea here is that the bottom layer of the sensor board is lled with metal and acts as an antenna to pick up electromagnetic elds in its vicinity. The board is put at onto the subject to create a capacitor with its metal layer as one plate and the skin of the subject as the other. Isolation between the plates are created by the solder mask, air and possibly the hair and/or the clothing of the subject. A metal shield layer is placed between the sensor layer and the rest of the circuitry to reduce the amount of interference caused by the circuit. The signal picked up by this capacitor is then amplied 50 times by a very low noise and low input bias current (high input impedance) instrumentation amplier; and then further ltered and amplied 20 times by a low noise operational amplier. The total amplication achieved is thus 1000. Because the sensor capacitor eectively cuts o the DC connection to ground at the input of the instrumentation amplier, the charge supplied by its input bias currents integrates onto the capacitor to generate an increasing oset voltage. Eventually this voltage would be large enough to go outside of the ampliers common mode input range and at that point, the amplier would stop operating properly and the output would be undened. To prevent this, there is a need to supply the input bias current with a return path to ground. In this thesis, a resistor is used to provide this path to ground. This resistor, together with the sensor capacitance, constitutes a high-pass lter and thus the resistance needs to be very high (because the sensor capacitance is low) to not lter out the low frequency ECG and EEG signals. 7

Circuit Design

The goal is to see if it is possible to get a usable signal with this simple circuit (as opposed to the more complex bias circuit described in [5]), and to investigate the possibilities and limitations of such a circuit.

2.1

System Overview

The system consists of four main parts; the capacitor plate that acts as the actual sensor; a rst amplication stage consisting of an instrumentation amplier with high input impedance; two notch lters for ltering out interfering signals; and a second amplication stage providing additional gain and ltering. The complete system is shown in Figure 2.1.

Instrumentation Amplier
510k

150 Hz
226k 226k

Second Gain Stage


OPA27
+

10 113k 4.7n 1k INA116 4.7n

10k

9.4n

10

LT6010
+

10.5k Vout

50 Hz
680k 10M10G 680k

20k
+

150n 10k OPA27


+

10

390k 3.9n

9.4n 340k 4.7n 4.7n

20k

Capacitive Sensor with Shield

Vref

Notch Filters

Figure 2.1. Circuit diagram of the complete system including component values, but excluding decoupling capacitors for the ampliers.

The sensor consists of a metal layer on the PCB that acts as a capacitor plate and is insulated from its opposing plate (thought to be the skin of the subject) by the solder mask and anything else that is placed in between the two plates. This capacitor is shielded from the rest of the circuit by a separate metal layer on the PCB and connected to the positive input of the instrumentation amplier. The instrumentation amplier is set to amplify the signal about 50 times and is connected in a feedback loop. The loop lter acts as a low-pass lter and makes the negative input slowly track the positive input. The last part of the circuit further amplies the signal approximately 20 times and provides band-pass ltering over the wanted signal band. This creates a theoretical maximum gain of 1000 or 60 dB in the circuit passband.

2.1 System Overview

2.1.1

The Capacitive Sensor

The sensor capacitor is built up as a parallel-plate capacitor, i.e. two metal plates separated by an insulator material. In this case the two plates are made up by the bottom metal layer on the PCB and the skin of the person whose signal is to be measured. This setup is described in Figure 2.2. Assuming that the area of the plates are much larger than the distance between them, the fringing capacitance at the edges can be neglected and the capacitance of the parallel-plate capacitor is given by the following relation [9]: C = 0 r A , d (2.1)

where A is the area of the two plates that overlap; d is the distance between the two plates; and 0 and r are the electric constant and the relative dielectric constant of the insulating material, respectively.

Circuitry Sensor Layer

PCB Shield Layer

Solder Mask

0 r Skin Width

Figure 2.2. A two-dimensional cross-section of the sensor PCB. This shows how the dierent variables in equation (2.1) are determined physically.

In this case, two of these variables are varying with the position of the sensor on the subjects body, the distance d and the dielectric constant r . This makes it dicult to get an exact gure on the capacitance of the sensor. The total dielectric constant is made up a combination of the constants of the solder mask, the air trapped between the plates and possibly even hair and/or clothing that is caught between the two capacitor plates. As will be seen later, in section 2.2, the sensor capacitance creates a highpass lter together with the input resistance of the rst amplier. Lowering the capacitance by, for example, moving the sensor further away from the body, will thus shift the high-pass lter cuto frequency upwards. Because of this, it is necessary to have as high an input resistance as possible to still enable the low frequencies that are to be measured through. Moreover, the higher the input resistance, the less impact the capacitance change will have on the cuto frequency of the lter.

2.1.2

Instrumentation Amplier

The instrumentation amplier used is the INA116 from Texas Instruments. The reason this amplier is used is that it has a very high input impedance and thus

10

Circuit Design

very low input bias currents. Moreover, it has a very low current noise, which makes it particularly suitable for this sort of low noise application. Other features are buered guard output pins for each input, that follows the input but has a low output impedance [10]. These are ideal to use as the shielding of the sensor, because if the potential of the shield follows that of the sensor plate, the stray capacitance between the two metal layers are minimized and thus reduces leakage. The amplier is of a standard instrumentation amplier type with three operational ampliers where, the rst two amplies the signal and the third acts as a dierence amplier subtracting the two amplied signals. The analysis of this internal circuit is shown in section 2.2.2.

2.1.3

Notch Filters

A notch lter is a very narrow band-stop lter, i.e. it lters out a specic frequency from the input signal. Such lters are commonly used to suppress interferers in radio circuits, and to lter out hum from the main power lines in audio frequency circuits. Upon rst measurement of the circuit, large signal amplitudes at 50 Hz and 150 Hz were measured at the input of the instrumentation amplier. These were large enough to saturate the last stage of the circuit and thus needed to be removed. To suppress these interferers, two notch lters were inserted between the two stages; one at each of these frequencies. The notch lters are of the active twin-T type and are analyzed in section 2.2.5. Two operational ampliers were needed to realise each notch lter, so a total of four ampliers were used. The amplier used for these lters were the OPA27 from Texas Instruments. This is a low noise precision amplier [11] that was selected because it would not contribute signicantly to the circuit noise.

2.1.4

Second Gain Stage and Band Pass Filtering

This circuit provides additional gain and ltering to the signal with the help of an operational amplier. The operational amplier used for this circuit is the LT6010 from Linear Technology. It is a precision amplier that can be run o a single ended 3 V supply [12]. It is set in a band-pass conguration with a gain of 20.5 in the passband. Immediately following it is an RC low-pass lter that limits the upper band of the signal and reduces the aliasing during a subsequent sampling of the signal. The transfer function for this part of the circuit is derived in section 2.2.4. The rst part of the circuit is a high-pass lter that removes any DC voltage from the output of the instrumentation amplier. It also serves to shift the common mode level at the input of the operational amplier to the center of its supply voltage. The lter is analyzed in section 2.2.3.

2.2 Circuit Analysis

11

2.2

Circuit Analysis

The rest of this chapter is devoted to the analysis of the dierent parts of the circuit. Here, the transfer functions of the whole system are derived analytically. The Laplace transform is used throughout to express the frequency dependency of the circuits.

2.2.1

Capacitive Sensor

This part of the circuit is the actual sensor. It is meant to create a capacitor between the circuit board and the human skin to pick up the weak signals that are generated by the human body. The capacitor creates a very high impedance to DC voltages and together with the biasing resistors for the input instrumentation amplier, it constitutes a lter with a high-pass characteristic. The capacitance value of the sensor is dicult to estimate since it depends on a number of factors: The area of the sensor, The distance between the skin and the sensor, The dielectric constant of the materials in between the sensor metal layer and the skin of the body, such as the PCB solder mask, any body hair and air that is caught in between.

Csensor vout (s) vskin (s) Rbias Cin

Figure 2.3. Small signal model of the capacitive sensor. Csensor is the capacitance made up by the PCB and the skin; Rbias is the resistor biasing the input of the instrumentation amplier; and Cin is the input capacitance of the instrumentation amplier.

The circuit is shown in Figure 2.3 where Cin is the capacitance at the input of the instrumentation amplier. A simple AC analysis reveals its high-pass lter nature. Assuming that the input resistance of the instrumentation amplier is much higher than the bias resistor, the voltage at the output is vout (s) = Rbias
1 sCsensor 1 sCin 1 sCin

vskin (s) .

(2.2)

+ Rbias

After some algebra the transfer function H (s) is found as H (s) = vout (s) Csensor s = , vskin (s) Csensor + Cin s + 0 (2.3)

12 where 0 = 1 Rbias (Csensor + Cin ) .

Circuit Design

(2.4)

The high-pass characteristic of the lter is visible in (2.3) and the cuto frequency is given by (2.4). Another noticeable thing in (2.3) is the constant loss of Csensor Csensor +Cin in the passband. Depending on the capacitance value of the sensor, this loss can be more or less signicant. If the capacitance drops to within one order of magnitude of the input capacitance, the loss will be more than 10 % of the amplitude.
0

Gain (dB)

10

15

20

25 0.01 Hz

0.1 Hz 0.12 Hz

1 Hz

10 Hz 100 Hz Frequency

1 kHz

10 kHz

100 kHz

Figure 2.4. Transfer function of the lter at the input. The -3 dB cuto frequency is indicated with the dashed line and is 0.12 Hz.

Figure 2.4 shows the transfer function as given by (2.3) with Rbias = 10 G, Cin = 7 pF as per the amplier datasheet [10] and Csensor = 125 pF (from measurements described later).

2.2.2

Input Amplication Stage

This is an analysis of the internals of the INA116 instrumentation amplier. The amplier is made up of three operational ampliers as shown in Figure 2.5. The rst two ampliers provides gain to both the inputs. The gain is set by choosing the appropriate value of RG , which is an external resistor. The nal amplier then outputs the dierence between these two amplied signals. The INA116 also includes a buer amplier at each of its inputs [10], however since they ideally should not aect the signal, they are left out of the following analysis. A feedback network that is external to the amplier is connected to the negative input. The input signal is connected to the positive amplier input. To simplify the analysis, it is assumed that all operational ampliers are ideal, i.e. they have innite gain, innite input resistance and zero output resistance.

2.2 Circuit Analysis

13

Rext A Cext C Rf RG Rf B vin (s)

+
E F R1 R2

vout (s)

+
R1 D F R2

Figure 2.5. Small signal model of the instrumentation amplier with the interesting nodes marked out by A, B, C, D, E, F. R1 , R2 and Rf are internal to the amplier; RG sets the amplication; and Rext and Cext is an external feedback loop.

From Figure 2.5 the following nodal equations can be identied: Node A: Node B: Node C: Node F: vout (s) va (s) =0, Rext va (s) vin (s) vd (s) vin (s) + =0, RG Rf vin (s) va (s) ve (s) va (s) + =0, RG Rf vd (s) vf (s) vf (s) =0, R1 R2 ve (s) vf (s) vout (s) vf (s) + =0. R1 R2 va (s) sCext + (2.5) (2.6) (2.7) (2.8) (2.9)

The above equations can be rewritten as va (s) = vout (s) vd (s) = 1 , 1 + sRext Cext (2.10) (2.11) (2.12) (2.13)

Rf vin (s) va (s) + vin (s) , RG Rf ve (s) = vin (s) va (s) + va (s) , RG R2 vout (s) = vd (s) ve (s) . R1

14

Circuit Design

Inserting (2.11) and (2.12) into (2.13) and substituting va (s) according to (2.10) yields vout (s) = R2 R1 1+ 2Rf RG vin (s) vout (s) 1 1 + sRext Cext . (2.14)

It then follows that the transfer function is given by H (s) = where z = 1 Rext Cext 1+ and p =
R2 R1

R2 R1

1+

2Rf RG

s + z , s + p 1+
2R f RG

(2.15)

Rext Cext

(2.16)

Inspection of (2.15) and (2.16) shows that the low-pass lter in the feedback loop yields one pole, p , and one zero, z , in the transfer function. It is also evident that (provided that the gain is larger than 1) p z , which indicates a high-pass characteristic. At low frequencies, the gain of the circuit is
R2 R1

1+

|H (0)| =

2R f RG 2R f RG

1+

R2 R1

if

1+

R2 R1

1+

2Rf RG

1.

At higher frequencies, the gain of the circuit becomes |H (s )| R2 R1 1+ 2Rf RG .

Another factor not taken into account here is the upper bandwidth limit of the circuit. This limit is dependent on the instrumentation amplier itself and varies depending on the gain of the amplier. At a gain setting of 100 (40 dB) this thesis congures the circuit to a gain of 51, however 100 is the closest setting to 51 specied in the datasheet the -3 dB bandwidth of the amplier is 70 kHz [10], which is well above the requirement for this system. Figure 2.6 shows the plotted transfer function as given in (2.15). Rf , R1 and R2 have values 25 k, 60 k and 60 k respectively, as specied in the datasheet [10]. From (2.15) the gain resistor RG is 1 k to give 51 times amplication. Finally, the external feedback network is set to give a closed-loop pole at 1.62 Hz with Rext = 510 k and Cext = 10 F as given by (2.16).

2.2.3

Interstage Filter and Level Shifter

This circuit is a simple passive high-pass lter with a built in level shift. The level shift is done to bring the DC bias of the signal to the middle of the voltage rails of the second amplier that uses a single ended supply voltage. The circuit is shown in Figure 2.7.

2.2 Circuit Analysis


35 30 25 Gain (dB) 20 15 10 5 0 0.01 Hz

15

0.1 Hz

1 Hz 1.62 Hz

10 Hz 100 Hz Frequency

1 kHz

10 kHz

100 kHz

Figure 2.6. Transfer function of the input amplication stage. It is a high-pass lter and its -3 dB cuto frequency is indicated by the dashed line at 1.62 Hz.

vout (s) C vin (s) R

+ Vref

Figure 2.7. Small signal model of the interstage high-pass lter and level shifter.

Starting with a DC analysis, the capacitor is replaced by an open circuit. Since node Vout is oating, there is then no current owing through the resistor and the output voltage must be equal to the voltage of the DC voltage source, i.e. there is a level shift. Vout = Vref (2.17) For the small signal AC analysis the DC voltage source is short circuited to ground. The current owing through the circuit is then iout (s) = vin (s) . 1 R+ sC (2.18)

The output voltage is then the voltage drop over the resistor caused by iout and is given by: sRC vin (s) . (2.19) vout (s) = 1 + sRC

16 Rewriting (2.19) gives the transfer function of the circuit as H (s) = vout (s) s = , vin (s) s + 0 where 0 =

Circuit Design

1 . RC

(2.20)

Equation (2.20) shows that this is a high-pass lter with a cuto frequency of 1 . 0 = RC
0 5 10 Gain (dB) 15 20 25 30 35 40 0.01 Hz 0.1 Hz 1 Hz 0.80 Hz 10 Hz 100 Hz Frequency 1 kHz 10 kHz 100 kHz

Figure 2.8. Transfer function of the interstage high-pass lter. The -3 dB cuto frequency is marked by the dashed line and is at 0.80 Hz.

Figure 2.8 shows the plotted transfer function of the lter. With component values R = 20 k and C = 10 F, the cuto frequency is at 0.8 Hz.

2.2.4

Second Amplication Stage

The second amplication stage provides more gain to the signal as well as additional ltering. It consists of an active band-pass lter followed by a passive low-pass lter. The circuit is shown in Figure 2.9. For the small signal AC analysis of this circuit we assume rst that the operational amplier is ideal and then we short circuit the DC voltage source Vref to ground. Looking at Figure 2.9 we get the following nodal equations: Node A: Node C: vin (s) vb (s) vin (s) =0, 1 + 1 R1 + sC R2 sC 1 2 vb (s) vout (s) vout (s) sC3 = 0 . R3 (2.21) (2.22)

Solving (2.21) and (2.22) for vb (s) and equating them gives the output voltage as vout (s) = vin (s) 1 + R2 R1 +
1 sC2 1 sC1

1 . 1 + sR3 C3

(2.23)

2.2 Circuit Analysis

17

+
B A C1 vin (s) R1 C R3 R2 C2 C3

vout (s)

+ Vref

Figure 2.9. Small signal model of the second amplication stage and output lter with nodes used for analysis marked out with A, B, C. R1 , C1 and R2 , C2 creates a band-pass lter; and R3 , C3 is a low-pass lter.

This results in the transfer function H (s) = where HP = 1 , R1 C 1 LP 1 = 1 , R2 C2 LP 2 = 1 . R3 C3 (2.25) 1+ R2 s LP 1 R1 s + HP s + LP 1 LP 2 , s + LP 2 (2.24)

If LP 1 LP 2 HP , we see from (2.24) that this stage forms a band-pass R2 . lter with a DC gain of 1 and a passband gain of 1 + R 1
30 25 20 Gain (dB) 15 10 5 0 0.01 Hz

0.1 Hz

1 Hz 0.78 Hz

10 Hz Frequency

100 Hz 67.50 Hz

1 kHz

10 kHz

Figure 2.10. Transfer function of the second amplication stage. The -3 dB cuto frequencies are marked by the dashed lines and are 0.78 Hz and 67.50 Hz.

18

Circuit Design Figure 2.10 shows the transfer function with the following component values: R1 = 20 k R2 = 390 k R3 = 10.5 k C1 = 10 F C2 = 3.9 nF C3 = 150 nF

The passband of the lter in the gure is between 0.78 Hz and 67.5 Hz.

2.2.5

Notch Filter

A notch lter removes a single frequency component from a signal. The eectiveness of the lter depends on its quality factor (Q). A higher value of Q generates a deeper notch and a narrower band of attenuation, while the opposite is true for a low value of Q. There are a few dierent types of circuits that can be used to generate a notch lter; some of them are listed in [13]. The circuit chosen was an active lter based on the common passive twin-T notch lter as shown in Figure 2.11.

R1 R2 vout (s)

+
R5

vin (s) R3

C1

C2

Figure 2.11. Circuit diagram of an active twin-T notch lter circuit.

As will be shown below, the original passive lter can at best give Q = 1 4 , while the active feedback makes it possible to achieve much higher values for Q. This circuit topology, however, makes Q quite sensitive to component matching. Poor matching between elements will reduce the depth of the notch, but it is a simple circuit requiring few elements and is simple to realize. The transfer function for a notch lter is given below [13]: H (s) =
2 s2 + 0 0 2 s2 + s + 0 Q

+
R4
(2.26)

C3

2.2 Circuit Analysis

19

This analysis assumes that the relationships between the passive elements in the lter are as follows: R = R1 = R2 = 2R3 and C = C1 = C2 = C3 . 2 (2.27)

And the frequency of the notch (f0 ) is then given by 2f0 = 0 = 1 . RC (2.28)

Figure 2.12 shows a simplied circuit of the notch lter with important nodes marked out. The operational amplier buers are assumed to be ideal and thus removed, and the voltage divider at the output substituted for a voltage dependent voltage source.

vout (s)

2C X vin (s) R 2 B R4 vout (s) R4 + R5

Figure 2.12. Small signal model of the notch lter with nodes used for analysis marked out by A, B, X and Y.

Looking at Figure 2.12, we get the nodal equations Node X: Node A: Node B: Node Y: vx (s) = R4 vout (s) = K vout (s) , R4 + R5 vin (s) va (s) vx (s) va (s) vout (s) va (s) + + =0, R 1/s2C R vin (s) vb (s) vx (s) vb (s) vout (s) vb (s) + + =0, 1/sC R/2 1/sC va (s) vout (s) vb (s) vout (s) + =0. R 1/sC (2.29) (2.30) (2.31) (2.32)

Rewriting equations (2.30), (2.31) and (2.32) and substituting for vx (s) as given

20 by (2.29) gives

Circuit Design

vin (s) 1 + 2K sRC + vout (s) , 2 + 2 sRC 2 + 2 sRC sRC 2K + sRC vb (s) = vin (s) + vout (s) , 2 + 2 sRC 2 + 2 sRC va (s) sRC vout (s) = + vb (s) . 1 + sRC 1 + sRC va (s) =

(2.33) (2.34) (2.35)

After inserting (2.33) and (2.34) into (2.35) and using (2.28), some algebraic reordering results in the transfer function of the circuit as H (s) =
2 s2 + 0 vout (s) = 2 2 . vin (s) s + 4(1 K )0 s + 0

(2.36)

0 12.50 1.25 20 0.25

Gain (dB)

40

60

80

100 20

30

40

50 Frequency (Hz)

60

70

80

Figure 2.13. Transfer functions of notch lters with dierent values of Q. The number next to each line is the value of Q as given by equation (2.37).

The value of Q can now easily be obtained by identication of equation (2.36) with equation (2.26) and substituting for K as given by equation (2.29). Q= 1 R4 R4 + R5 = 1+ 4R5 4 R5 (2.37)

This means that Q can easily be controlled by the ratio of R4 to R5 and varied between 1 4 and innity. In reality, Q can never reach innity because of circuit non-idealities and component mismatches, but it can get signicantly higher than in the passive case1 . A potentiometer could be used to tune the quality factor in the actual lter implementation. Figure 2.13 shows the dierence in width of the notches depending on Q. Here, 4 the ratio R R5 of the three curves is 0, 4 and 49.
1 In the passive twin-T notch lter, the common node in both branches is connected to ground, thus equivalent with setting R4 to 0 in Figure 2.11. This yields a Q of 1 as per (2.37). 4

2.2 Circuit Analysis

21

2.2.6

The Complete System

Putting all the separate transfer functions for these sub-circuits together by multiplication results in the complete transfer function for the whole system and is shown in Figure 2.14. All the dierent sub-circuits were included once in the transfer function except for the notch lter, for which two copies were included one at 50 Hz and one at 150 Hz, both with a Q of 5.
60 50 40 Gain (dB) 30 20 10 0 10 2.08 Hz 20 0.01 Hz 0.1 Hz 1 Hz 43.40 Hz 100 Hz 1 kHz 10 kHz 10 Hz Frequency

Figure 2.14. Transfer function of the complete system including two notch lters at 50 Hz and 150 Hz.

A comparison to the transfer function without any notch lters (Figure 2.15) reveals that the 50 Hz notch limits the upper bound on the bandwidth of the circuit somewhat from 69.2 Hz to 43.4 Hz. This does not pose a big problem, since the EEG and ECG signals have most of their power in frequencies below 40 Hz.
60 50 40 Gain (dB) 30 20 10 0 10 2.09 Hz 20 0.01 Hz 0.1 Hz 1 Hz 10 Hz Frequency 69.20 Hz 100 Hz 1 kHz 10 kHz

Figure 2.15. Transfer function of the complete system without any notch lters.

Chapter 3

Printed Circuit Board Layout


This chapter describes the construction of the two dierent PCBs that was created for this thesis. It also describes how the two notch lters were constructed on a piece of stripboard. Schematic and PCB design software tools were used to create the necessary les for fabrication of both boards and are described in the next section. For consistency, the schematics created with this software were redrawn to look the same as the rest of the document. However, the schematics for the software tools are included in Appendix B and likewise the PCB layouts are included in Appendix C.

3.1

Software Tools

For the layout of the PCBs, an open source layout software called PCB from the gEDA project1 was used. The gEDA project works to provide a set of tools for electronic design automation that are licensed under the GNU General Public License. This includes tools for schematic capture, netlisting, analog and digital circuit simulation and PCB layout, among other things. PCB supports exporting its layout to the industry standard RS-274-X format and thus it is compatible with most PCB fabricators. To support the layout development, schematic capture was rst done in another gEDA project tool called gschem and netlisting from gschem to PCB was done with the gnetlist tool.

3.2

Sensor and Instrumentation Amplier Board

This PCB contains the sensor and the INA116 instrumentation amplier part of the system. It is a four layer board with the bottom layer constituting the sensor
1 http://www.gpleda.org/

23

24

Printed Circuit Board Layout

capacitor plate; the layer above it is the shield; and the two top layers are circuit traces. The schematic used to create this board is shown in Figure 3.1 and the supply decoupling is shown in Figure 3.2. The INA116 runs o a 5 V supply voltage and its reference pin is connected to ground. Figure 3.1 also shows a pair of bipolar transistors and circuitry related to them; this will be further explained in section 3.2.2.
R101 Shield C101 10
3 G-

510k Vee
2/4 8 11 REF 9 13

Sensor

R102 1k

U101
16 6

INAMP_OUT

G+ 5/7

R103 60k RESET R104 20k RESET_REF


1

Vcc
3 1 2 2 3

R105 10M

R106 10M

Q101

Q102

Figure 3.1. Schematic for sensor and instrumentation amplier stage including component values. Pin numbers are shown for the amplier and the bipolar transistor packages.

Vcc VCC C102 1n C103 1 GND C104 1n Vee C105 1 VEE

Figure 3.2. Decoupling for the instrumentation amplier.

3.2 Sensor and Instrumentation Amplier Board

25

3.2.1

Layout Considerations

Since this PCB was to be used to sense the very low-level input signals, it was important to try to layout the board as to reduce the noise and disturbances as much as possible. In eect, this meant to take certain precautions with the shielding of the sensor, the grounding scheme and guarding of the sensitive input signal. Guarding of Inputs The inputs of the INA116 amplier are internally buered before being amplied. The output of these buers are not only connected to the rest of the instrumentation amplier, but they are also connected to two guard pins on each side of the input pins of the amplier package as shown in Figure 3.3. This means that there is access to a low impedance source that follows the input. To reduce coupled interference on the input trace, another trace surrounding the input trace (and preferably also the input source) should be connected in a closed loop to these two guard pins [10]. In the case of this circuit, it was not possible to surround the complete sensor, as it was made up by a separate layer that only constituted one half of a capacitor, however, the input traces was still enclosed as much as possible with these guard rings.

GINGG+ IN+ G+ IN+ IN-

GGG+ G+

Figure 3.3. Guard pins of the INA116 and recommended layout practice. The right hand side shows the internal buers of the amplier package and where the guard outputs; and the left hand side shows the physical package and how the input traces are surrounded by its corresponding guard.

Shielding The shield metal layer was inserted to reduce the amount of charge coupled capacitively from the circuitry to the sensor metal layer. With the shield connected to a low impedance source, any charge coupled to it from the other circuitry would be absorbed into the source. However, because the shield covered a whole layer of the PCB and with its proximity to the sensor layer, they would act as a parallel-plate capacitor and there would be a signicant stray capacitance between these two layers as well. If the shield is assumed to be connected to the low impedance ground, then any

26

Printed Circuit Board Layout

sudden change in potential at the sensor layer would couple some charge to the shield thus reducing the amplitude of the sensed signal. To reduce the capacitive coupling between these two layers, the shield was connected to the guard pin of the input instead of to ground. This means that the shield follows the input and that the dierence in potential between the two will be close to zero. Grounding In a low frequency, low noise circuit, it is important to control the return current paths. As opposed to the case of high frequency circuit where the return current takes the path with the lowest impedance at low frequencies it takes the closest path back. This means that there is a large risk that current paths will cross and interfere with each other if using a ground plane; instead a star grounding scheme was used, where each ground pin has a separate path to a common ground point on the board.

3.2.2

Unused Circuitry

Also included on this PCB was circuitry for resetting the input common mode levels with bipolar transistors that are controlled with a separate input signal. This is the technique used to bias the instrumentation amplier in [5]. The footprints were included on the PCB to make it possible to investigate this method further, but due to time limitations and lack of information, this option was not pursued. Moreover, the bias resistor of the negative amplier input was found unnecessary the bias current has a path to the output of the amplier through the feedback resistor and was thus not used.

3.2.3

Layout

The layout consists of a 25x25 mm, four layer PCB. The top layer houses the components and traces; the second layer contains additional traces; the third layer is the metal shield layer; and the bottom layer is the sensor plate. The rst two layers are shown in Figure 3.4(a) notice the guard rings on the right side of the instrumentation amplier. Figure 3.4(b) shows a photo-realistic rendering of how the nal fabricated PCB looks. One problem due to limitations with the software is that all vias go through all layers. This means that both the sensor layer and shield are perforated with a number of vias, and this quite possibly contributes to interference on the sensor. Ideally, all vias except the one to the bottom layer would be blind vias, i.e. end inside the card. Unfortunately this was not possible with this PCB design software. All components on this board are surface mount components. The dierent components are listed in Table 3.1 together with their values, tolerances and packages. Unused components are also marked in Table 3.1. As will be seen in the measurements later, two dierent biasing congurations were measured; one with a 10 M resistor and one with a 10 G resistor. The

3.3 Signal Conditioning Board

27

(a) The top two layers of the board shows the signal routing.

(b) Photo-realistic rendering of the complete PCB seen from the top.

Figure 3.4. Instrumentation amplier and sensor PCB in scale 2:1. Shield and sensor metal layers are not shown in (a) to better show the signal traces.

10 M resistor is of the size 1206 with a tolerance of 1 %, whereas the 10 G resistor is of size 0805 with a tolerance of 30 %.
Name R101 R102 R103 R104 R105 R106 C101 Value 510 k 1 k 60 k 20 k 10 M 10 M 10 F Tol. 1% 0.1 % Pkg. 0805 0805 0805 0805 1206 1206 0805 Note Name C102 C103 C104 C105 U101 Q101 Q102 Value 1 1 1 1 nF F nF F Tol. 5 10 5 10 % % % % Pkg. 0603 0805 0603 0805 SO16W SOT23 SOT23 Note

Unused Unused Unused

1% 10 %

INA116 Unused Unused

Table 3.1. Components used on the sensor PCB including values, tolerances and packages.

3.3

Signal Conditioning Board

The second board contains a signal conditioning circuit and additional amplication. This is a two-layer board where the bottom layer is completely covered by a ground plane, and the top layer contains components and traces. Since the signal has already received substantial amplication by the rst stage, the requirements on low noise are relaxed for this stage. The schematic for this PCB is shown in Figure 3.5 and includes component values and supply decoupling for the operational amplier. This stage uses the LT6010 operational amplier in a band-pass conguration running at a 3 V single-ended supply voltage. Since the rst stage runs at a dual 5 V supply, the input needs to be shifted up to half of the supply voltage (1.5 V) which is done with the REF input. The LT6010 also has a shutdown pin that, when pulled up, eectively shuts o parts of the circuit to minimize its current

28
Vcc
3

Printed Circuit Board Layout

C201 OPAMP_IN 10 C202 10 R202 20k REF

U201
6 5

R204 OPAMP_OUT 10.5k C204 150n

SHDN 4

R201 20k

R203 390k C203 3.9n C205 1n C206 1 GND Vcc +3V

Figure 3.5. Schematic for second amplication stage including component values and supply decoupling. Pin numbers are shown for the operational amplier package.

consumption [12]. However, this application is time-continuous so it was tied to the negative supply, i.e. ground.

3.3.1

Layout

The layout consists of a 21x21 mm board with two layers. The top layer holds all the components, signal traces and ground, while the bottom layer is completely covered with a ground plane. Figure 3.6(a) shows a screenshot from the PCB design tool of the top layer of the board; the bottom layer is not shown as it is just lled with metal. A photo-realistic rendering of the fabricated PCB is shown in Figure 3.6(b).

(a) The top layer of the board shows the component placement and signal routing.

(b) Photo-realistic rendering of the complete PCB seen from the top.

Figure 3.6. Signal conditioning PCB in scale 2:1. The bottom layer is not shown in (a) since it is only a metal ground plane.

3.4 Notch Filters on Stripboard

29

All components used are surface mounted components. The dierent components are listed in Table 3.2 together with their values, tolerances and packages.

Name R201 R202 R203 R204 C201 C202

Value 20 20 390 10.5 10 10 k k k k F F

Tol. 1 1 1 0.1 10 10 % % % % % %

Pkg. 0805 0805 0805 0805 0805 0805

Note

Name C203 C204 C205 C206 U201

Value 3.9 150 1 1 nF nF nF F

Tol. 10 10 5 10 % % % %

Pkg. 0805 0805 0603 0805 SO8

Note

LT6010

Table 3.2. Components used on the second stage PCB including values, tolerances and packages.

3.4

Notch Filters on Stripboard

Because the need for notch lters in the system was discovered after initial measurements, these circuits were not included on the original PCBs. Instead, they were designed afterwards and point-to-point soldered with through-hole components on a stripboard. This board was then connected in between the other two PCBs to complete the circuit. The schematic used for the design is shown in Figure 3.7. The gure also includes component values as well as supply decoupling. Resistor values are for both the 50 Hz notch and the 150 Hz notch (the latter within parentheses).
Vee 680k (226k) 680k (226k) in 4.7n 4.7n Vee 4.7n 4.7n Vee 680k (226k) 680k (226k)

out

+
Vcc

Vcc +5 V

Figure 3.7. Schematic for notch lter including component values for a 50 Hz notch and supply decoupling. Values in parentheses are for a 150 Hz notch.

The operational ampliers were both the OPA27 from Texas Instruments running from a 5 V supply. Both supply rails were decoupled to ground with a 10 F electrolytic and a 100 nF ceramic capacitor. The twin-T connection was made with 4.7 nF polypropylene capacitors with a tolerance of 2.5 %; and metal

10k

0.1 0.1

10 gnd 10 -5 V

30

Printed Circuit Board Layout

lm resistors of 680 k (for the 50 Hz lter) and 226 k (for the 150 Hz lter) with a tolerance of 1 %. The Q of the lter was adjusted with a 10 k, 12-turn cermet potentiometer.

Figure 3.8. Stripboard complete with the two notch lters. Circuit Qs can be adjusted with the potentiometers.

Figure 3.8 shows the assembled stripboard with both notch lters placed sideby-side. Looking at one of the lters; the bottom part of the circuit is the twin-T connection; above that are the two operational ampliers with the potentiometer in between; and at the top the electrolytic and ceramic supply decoupling capacitors are seen.

Chapter 4

Measurement
Measurement of the designed circuit was done in a regular electrical engineering lab. No special measures were taken to try to reduce the amount of electronic waves in the room. Because of diculties estimating the input capacitance of the circuit board and thus the cut o frequency of the high pass lter it creates together with the input bias resistance two dierent versions of the circuit was measured; one with a 10 M bias resistor at the input of the instrumentation amplier; and one with a 10 G resistor as bias.

Figure 4.1. This photograph shows both PCBs connected together and with a Swedish one krona coin for scale. The right-most board is the sensor board, it is a bit larger than the signal conditioning board to the left of it.

Figure 4.1 shows the two PCBs connected together, ready to be measured. To get a feeling of the sizes of the two boards, the photograph was taken together 31

32

Measurement

with a Swedish one krona coin. The larger of the two boards is 24x24 mm and the smaller is 21x21 mm.

4.1

Measurement Setup

For the circuit to function properly, there was a need to generate four dierent DC voltages and one single ended sine wave input signal. Measuring of the output signals were done on a real time digital oscilloscope. The following equipment was used for the measurement: Agilent InniiVision MSO7104A Mixed Signal Oscilloscope Agilent U8002A Single Output DC Power Supply Hewlett Packard 66312A Dynamic Measurement DC Source Thurlby Thandar Instruments TG120 20 MHz Function Generator In order to have a deterministic input signal to the system for these measurements, two copies of the sensor board was used; one as the sensor and the other connected to the signal source. These two boards were then xed to each other back to back with tape to create a capacitor. Care was taken so that there would be no overlap of the vias on the two boards in order to eliminate the risk for conductive coupling between them. Figure 4.2 shows how the two PCBs were attached to each other.

Figure 4.2. This photograph shows how the PCBs were xed to each other to create the capacitor from the metal layers on each side of the boards.

The input signal board was connected directly to the function generator when large input signals were needed, and through an attenuator circuit, when low

4.1 Measurement Setup

33

input signals were needed. The sensor side board was populated with its intended components and connected to the second stage board. All the necessary power supply was connected to these two boards as well as the output of the second stage to the oscilloscope. All grounds from the circuit boards and the equipment were connected together in a star grounding scheme.

4.1.1

Oscilloscope Resolution

The Agilent MSO7104A oscilloscope was the most suitable oscilloscope available for these measurements. Since the measured signals are of very low amplitude, the resolution of the oscilloscope needs to be very high in order to accurately sample the signals. This oscilloscope has an 8-bit analog-to-digital converter (ADC). 8 bits means that there are 256 dierent voltage levels available; with the highest vertical resolution setting of 2 mV/div (full range of 20 mV), this translates into a least signicant bit (LSB) of 78.125 V. The quantization noise contributed to LSB 22.55 V1 . When comparing this value to the signal would then be 1 12 the noise of the instrumentation amplier (28 nV/ Hz [10]), it is clear that this resolution is too low to be able to characterize the circuit to a satisfactory degree. However, the oscilloscope specication [15] states that it has a high resolution mode, in which the sequential signal data points are serially ltered before being mapped to the screen. Supposedly, this will allow for 12 bits of resolution when a time scale of > 10 s/div is used. A 12-bit conversion with the same vertical resolution would result in an LSB of 4.883 V. This translates to 1.41 V of quantization noise. While this is still not a very low number, it is considerably better.

4.1.2

Function Generator Signal Level

The function generator was only able to generate voltages with amplitudes down to 2 mV. This was not low enough to measure the circuits response to really low signals. Therefore for most measurements the output of the function generator was divided down by a simple voltage divider. The voltage divider was designed to match the signal source output impedance at 50 and to produce a 100 (40 dB) reduction of the signal. However, due to component tolerances the actual measured loss of the divider was 71.94 (37.14 dB). Because of the limit on the smallest possible measurable signal amplitude of the oscilloscope, when signals smaller than this were to be measured, they were taken directly from the function generator output. The real input signal to the circuit was then computed with the help of this value of the divider loss.

4.1.3

Measurement Methodology

Measurements were made by rst setting up the circuit correctly for that particular measurement. The functionality of the circuit was then investigated by turning
quantization noise is a random variable with a uniform distribution and its power is where is the smallest quantization step [14].
1 The 2 , 12

34

Measurement

on all supply voltages and then observing the output signals from each stage and conrming that they appeared reasonable. To get precise values on the readings required for a measurement, the needed signals were sampled by the oscilloscope, saved to disk and then further processed in MATLAB R ; for example to generate the frequency spectrum. For the transfer function measurements, both the input and output signals were saved at dierent input frequencies. For each frequency point, the fast Fourier transform (FFT) was generated for both the input after subtracting the attenuator loss if necessary and the output. Then the frequency and root mean square (RMS) value of the input signal was identied in its frequency spectrum. Using this frequency, the RMS value of the output signal was found in the same way. With both RMS values found, the gain of the circuit at this frequency was easily computed by dividing them both. The gain was then plotted at each of these frequency points to create the transfer function.

4.2

Problem with Main Power Line Noise

Upon connection of the instruments and start up of the circuit, it was rather quickly realized that the capacitor plate created by the PCB picked up relatively high levels of noise from the ambient air. When inspecting this noise closer (see Figure 4.3), it seem to not be simple random noise, but rather a very regular pattern.
4 3 2 Voltage (mV) 1 0 1 2 3 4 0 10 20 30 40 50 60 Time (ms) 70 80 90 100

Figure 4.3. Plot of the noise present at the input of the instrumentation amplier. This clearly shows large amounts of 50 Hz noise.

Performing an FFT (Figure 4.4) on the noise revealed that it was indeed high level noise at 50 Hz and additional noise at 150 Hz. The 50 Hz noise is quite obvious that it stems from the main power lines where large currents drawn by the many university electrical devices ow. The 150 Hz noise was more unexpected, but most likely it is the third harmonic of the 50 Hz signal on the mains. Interestingly, the level of this third harmonic is quite high compared to its fun-

4.2 Problem with Main Power Line Noise

35

damental (approximately 10 dB lower) a characteristic of a square wave2 . My own speculation is that this might be attributed to the fact that most electrical equipment, e.g. computers, operate on switched power supplies, drawing more non-linear currents.
50 60 RMS Voltage (dBV) 70 80 90 100 110 120 10 Hz 9.55 dB

100 Hz Frequency

1 kHz

Figure 4.4. The Fourier transform of the noise at the input. The dierence in voltage between the 50 Hz fundamental and the 150 Hz harmonic is 9.55 dB.

Regardless of the sources of these noise components, they lie in band (or slightly outside in the case of the 150 Hz noise) with the signals intended to be measured, and with their amplitude they would ruin the output signal and even overload the last amplication stage. Thus, they need to be ltered out as much as possible at least to a degree that will allow the nal operational amplier to operate without saturating its output. As a solution to this, two notch lters were inserted between the rst and second stage of the circuit; one to lter out the 50 Hz noise and one to lter out the noise at 150 Hz.

4.2.1

Notch Filters

The notch lters were of the active twin-T type with adjustable Q as was analyzed in section 2.2.5, and were put in series between the instrumentation amplier and the intermediate high pass lter. Since there was no time to manufacture a separate PCB for these lters, they were built with through-hole components on an experimental board. Four operational ampliers were required for the two lters; they were all the OPA27 low noise operational amplier from Texas Instruments. This ltering was enough to get an output signal that did not saturate the outputs of the last stage. However, noise was still very much present on the output signal, particularly at low input amplitudes, so additional ltering was needed in order to get a working signal.
2 The

Fourier series expansion of a square wave xsq (t) =


1 3

sin(t) +

1 3

sin(3t) +

shows

that the third harmonic is

(i.e. -9.54 dB) that of the fundamental.

36

Measurement

4.2.2

Filtering in MATLAB R

While the analog notch lters removed enough noise to keep the signal from saturating the operational amplier outputs, mismatches in component values reduce the depth and width of the notches so that they are far from ideal, and thereby passing some of the noise anyway. At low amplitudes the wanted signal can still be hidden by these noise components, as will be seen later. The signal is meant to be digitized by an A/D converter, which means that digital ltering becomes available and that makes it easier to lter out the remaining noise. MATLAB R was used to emulate this digital ltering and steep notch lters for 50 and 150 Hz as well as a steeper low pass lter at 100 Hz was created to suppress higher frequency noise. The code to generate these lters are listed in Appendix A.

4.3

Measurements with a 10 M Bias Resistor

The rst set of measurements of the circuit was made with a high impedance 10 M resistor for input biasing. Three measurements were made; one at the input of the instrumentation amplier in order to characterize the transfer function of the input lter created by the bias resistor and the sensor capacitor; the second was a measurement of the whole system transfer function; and nally a measurement with a low level input signal at 10 Hz.

4.3.1

Input Filter

For this measurement, the input signal was connected directly to one of the capacitor plates, without connecting the intermediate attenuator. This was done to have an input signal large enough not to be signicantly aected by the 50 Hz noise. The output signal was measured from the guard pin of the instrumentation amplier. The oscilloscope probe only had a impedance of 1 M, but since this pin outputs a buered version of the input signal, it was possible to measure it without loading the high impedance input node, which would have destroyed the input signal. Figure 4.5 shows the measured transfer function at the input of the instrumentation amplier. The dashed line indicates the -3 dB frequency of the lter as 127.79 Hz, which is very high. Seeing as the signals this circuit aims to measure are normally well below 100 Hz, this is indeed unsatisfactory. The constant loss at the pass band is most likely produced by voltage division between the sensor capacitance and the input capacitance of the instrumentation amplier; and possibly leakage currents through the resistor. Another result of this measurement is the possibility to put an estimate on the capacitance made up by the two PCBs connected together. The pole of a rst order RC high pass lter is the same as the -3 dB frequency of the transfer 1 . With a resistor tolerance of 1 %, this means that the function: f3dB = 2RC capacitance is between 123-126 pF, depending on the exact value of the resistor.

4.3 Measurements with a 10 M Bias Resistor


0

37

Gain (dB)

10

15

20

25 10 Hz

100 Hz 127.79 Hz

1 kHz Frequency

10 kHz

Figure 4.5. Measured transfer function of the input lter with a 10 M bias resistor. The dashed line shows the -3 dB point at an input frequency of 128 Hz.

4.3.2

Transfer Characteristic

This measurement was done to try to generate the transfer function for the entire system, from the capacitively coupled sensor input to the lter at the output of the second stage operational amplier. The measurement was made with a large amplitude input signal, but small enough not to saturate the output of any of the ampliers. An important part of this measurement was the notch lters work correctly. Without them, the output signal would not have been possible to measure satisfactorily, because the output of the second stage amplier would simply swing between its minimum and maximum output voltage at 50 Hz.
50 40 30 Gain (dB) 20 10 31.47 Hz 0 10 1 Hz 115.17 Hz

10 Hz

100 Hz Frequency

1 kHz

10 kHz

Figure 4.6. Transfer function of the complete circuit with a 10 M bias resistor. The -3 dB cut o frequencies are shown by the dashed lines. The maximum passband gain is 49.3 dB.

38

Measurement

Figure 4.6 shows the measured transfer function of the whole circuit. Maximum gain of the circuit is around 50 dB which is signicantly lower than the 60 dB it was designed to produce. This is due to the high cut o frequency of the input lter that suppresses these low frequency signals. Signals at 10 Hz are only amplied about 36 dB, and at 1 Hz, signals are not even amplied, but suppressed with over 10 dB. A more positive observation is that the notch lters are working as expected. They are correct in frequency and they have quite deep and narrow notches. Exact measurement of the depths of the notches was not possible because of the very limited ability to ne tune the frequency of the function generator, particularly around lower frequencies, e.g. 50 Hz.

4.3.3

Low Level Signal Response

One important ability of the circuit is to amplify low amplitude signals at low frequencies. This measurement shows how the circuit handles an input signal at 10 Hz with an amplitude of 25 V, the smallest signal possible to generate with the function generator and the attenuator.
20 0.02 40 0.01 Voltage (V) RMS Voltage (dBV)

60

80

0.01

100 0.02 0 0.1 0.2 0.3 Time (s) 0.4 0.5 120 1 Hz 10 Hz 100 Hz Frequency

(a) Signal as output by the circuit.

(b) Frequency spectrum of the output signal.

Figure 4.7. Output of the circuit when a low level input signal is present.

As would be expected with regards to the input lter measurement, Figure 4.7(a) shows virtually no sign of the 10 Hz input signal. What is visible is instead a 50 Hz square wave. The FFT in Figure 4.7(b) shows a weak spur at 10 Hz, but compared to the rst and third harmonics of the 50 Hz noise, it is unnoticeable. Other odd harmonics although suppressed by circuit ltering is also clearly visible in the FFT, indicating a square-like waveform at the output. Not even the additional ltering in MATLAB R gives any usable signal. The result of the additional ltering is shown in Figure 4.8. Despite the FFT in Figure 4.8(b) showing that the 50 Hz and 150 Hz tones have properly been ltered out,

4.3 Measurements with a 10 M Bias Resistor


0.01 20

39

40 RMS Voltage (dBV) 0.005 Voltage (V)

60

80

0.005 100

0.01 0

0.1

0.2 0.3 Time (s)

0.4

0.5

120 1 Hz

10 Hz 100 Hz Frequency

(a) Signal after digital ltering.

(b) Fourier transform after digital ltering.

Figure 4.8. Output of low level signal after digital ltering in MATLAB R .

it is not possible not even with a wild imagination to nd the 10 Hz signal in the time domain plot shown in Figure 4.8(a). The power consumption for this measurement is summarized for the dierent circuit parts in Table 4.1. The table shows that the largest current consumers are the notch lters. Because they were not included on any PCB and were instead designed afterwards with through-hole components, they were not designed to minimize power consumption. Moreover, the two lters consists of two operational ampliers each, for a total of four ampliers. Assuming they consume a roughly equal amount of current, this means that each operational amplier consumes approximately 26 mW of power. Contrasting this with the other amplier (the LT6010 on the signal conditioning board) that consumes 0.38 mW, there is denitely room for future improvement here.

Circuit part Instrumentation amplier Notch lters Operational amplier Total

Voltage 10 V 10 V 3.145 V

Current 1.10 mA 10.524 mA 0.123 mA

Power 11 mW 105.24 mW 0.38 mW 116.62 mW

Table 4.1. Supply voltage, current and power consumption of the dierent parts of the sensor readout circuit with a 10 M resistor. The notch lters entry here includes both lters and thus four operational ampliers, which is why the number is so large.

40

Measurement

4.4

Measurements with a 10 G Bias Resistor

In the second set of measurements, the 10 M biasing resistor at the input of the instrumentation amplier was substituted for a higher resistance 10 G resistor. This was done to try to lower the pole in the rst high pass lter generated by the sensor capacitance and this input bias resistance. Two implications of using resistors with resistances this high are: 1. High thermal noise voltage, as given by the resistor thermal voltage noise 2 equation: vnoise = 4kT f R, 2. Even a very small current generates a signicant voltage drop over the resistor. The second point does not have any eect in this circuit because the DC oset is ltered in the feedback loop of the amplier, and because of the low input bias currents of the amplier nominally at 3 fA [10] the oset is still low enough to keep inside the common mode input range of the amplier. The rst point, however, may limit the dynamic range of the sensor. The the oretical thermal noise of a 10 G resistor at room temperature is 12.65 uV/ Hz, which is very high considering that the input referred voltage noise of the instru mentation amplier is 28 nV/ Hz [10].

4.4.1

Input Filter

To characterize the input lter, the same setup was used as in the measurement with the 10 M input resistor in section 4.3.1. The output was measured at the instrumentation amplier guard pin and then used to compute and plot the transfer function.
0 0.5 1 Gain (dB) 1.5 2 2.5 3 0.1 Hz

1 Hz

10 Hz Frequency

100 Hz

1 kHz

Figure 4.9. Transfer function of the high pass lter at the input of the instrumentation amplier. This shows a -3 dB cut o frequency around 0.1 Hz.

The measured transfer function is shown in Figure 4.9. It was dicult to measure the signal at very low frequencies; because of the time needed for sampling

4.4 Measurements with a 10 G Bias Resistor

41

the signal as well as the function generator not being able to generate low frequency signals. Despite this, through simple extrapolation, one can conclude from the gure that the -3 dB frequency of the lter is around 0.1 Hz. This cut o frequency is low enough to let through the signal we are interested in. Also noticeable in Figure 4.9 is a constant loss of about 0.4 dB ( 4 % of the original signal). However, this is not a signicant amount, and is most likely due to voltage division between the sensor capacitance and the input capacitance of the instrumentation amplier. An attempt to estimate the input capacitance in the same way as in the 10 M measurement is dicult; mainly because the tolerance of the 10 G resistor was 30 %. Assuming a cut o frequency of 0.1 Hz, the capacitance would then be somewhere in the range of 122-227 pF. The lower part of this range ts well with the value computed in section 4.3.1; thus it is fairly safe to say that the capacitance lies in that area.

4.4.2

Transfer Characteristic

The setup for this measurement was the same as for the one in section 4.3.2. The transfer function resulting from the measurement is seen in Figure 4.10. An immediate dierence when compared to Figure 4.6 is the depth of the notch at 50 Hz. This is just a result of it being dicult to adjust the input signal to an exact frequency, the notch lter circuit is the same, and as such; the actual depth of the notch should be the same for both measurements.
60 50 40 Gain (dB) 30 20 10 3.10 Hz 0 10 0.1 Hz 42.64 Hz

1 Hz

10 Hz 100 Hz Frequency

1 kHz

10 kHz

Figure 4.10. Transfer function of the complete circuit with a 10 G bias resistor. The -3 dB cut o frequencies are shown by the dashed lines. The maximum passband gain is 58.3 dB.

In Figure 4.10 the dashed line represents the cut o frequency of the circuit. The cut-o frequency is at 3.1 Hz, ten times lower than for the one with the 10 M bias resistor, however, that circuit did not reach the same gain at that frequency. Moreover, the gure shows that the mid-band gain reaches almost up to the 60 dB that the circuit is congured to produce. With amplication of

42

Measurement

over 40 dB at 1 Hz, this circuit conguration shows promise for usefulness the previous circuit had an amplication of -10 dB at this frequency.

4.4.3

Low Level Signal Response

In the same manner as the measurement in section 4.3.3, a low level input signal measurement was made with this circuit conguration as well. To be able to better compare the two circuits, the same input signal was used 25 V at 10 Hz, the lowest amplitude possible to generate with the function generator and attenuator connected together.
0.15 0.1 0.05 Voltage (V) 0 0.05 0.1 RMS Voltage (dBV) 20

40

60

80

100

0.1

0.2 0.3 Time (s)

0.4

0.5

120 1 Hz

10 Hz 100 Hz Frequency

(a) Signal as output by the circuit.

(b) Frequency spectrum of the output signal.

Figure 4.11. Output when a low level input signal is present.

Figure 4.11 shows the signal as it was output by the circuit, Figure 4.11(a), and its frequency spectrum, Figure 4.11(b). The wanted signal is almost completely covered in the 50 Hz noise as can be seen in the frequency spectrum, the 50 Hz spur is signicantly higher than the 10 Hz one and is quite unusable in this state. In the time domain it is possible to distinguish the wanted signal as amplitude modulated onto the 50 Hz signal. While in the frequency domain, the signal is clearly visible, the visual time domain analysis needs a better signal. After digital ltering, the 50 Hz and 150 Hz noise is removed and the results are shown in Figure 4.12. Comparing the frequency spectrum in Figure 4.12(b) with the one in Figure 4.8(b) shows that the amplitude of the output signal is now approximately 20 dB higher. This gain in amplitude makes the 10 Hz signal clearly visible in Figure 4.12(a). Despite this, there is however still a signicant amount of noise left that distorts the sinusoidal signal. The signal-to-noise ratio (SNR) of the signal was computed to 9.7 dB. The power consumption for this measurement is shown in Table 4.2. The same thing applies here as for the previous measurement: there is a large room for improvement in consumed power by redesigning the notch lters to utilize lower

4.5 Conclusions
0.03 0.02 0.01 Voltage (V) 0 0.01 0.02 0.03 0 RMS Voltage (dBV) 20

43

40

60

80

100

0.1

0.2 0.3 Time (s)

0.4

0.5

120 0 Hz

10 Hz 100 Hz Frequency

(a) Signal after digital ltering.

(b) Fourier transform after digital ltering.

Figure 4.12. Output of low level signal after digital ltering in MATLAB R .

Circuit part Instrumentation amplier Notch lters Operational amplier Total

Voltage 10 V 10 V 3.145 V

Current 1.02 mA 10.524 mA 0.125 mA

Power 10.3 mW 105.24 mW 0.39 mW 115.83 mW

Table 4.2. Supply voltage, current and power consumption of the dierent parts of the sensor readout circuit with a 10 G resistor. The notch lters entry here includes both lters and thus four operational ampliers, which is why the number is so large.

power operational ampliers as well as using ampliers that can run on lower supply voltage.

4.5

Conclusions

From these measurements, a few conclusions can be made. First of all, a very high input impedance of the circuit is necessary. Without this, low frequency signals will be suppressed to a point at which they can not be detected in the output. This impedance needs to be at least 10 G; while the 10 G impedance worked out quite well in this measurement, one has to remember that this was with two capacitor plates taped together, separated only by their two layers of solder mask. In an application, the distance between the plates may be greater and the dielectric coecient of the isolating material(s) may dier. Taking this into account, the cut-o frequency at the input will most likely rise. Secondly, the size of the capacitance made up by the two PCBs is estimated to be around 125 pF. Increasing the input impedance further would mean that this capacitance could be lowered and still be able to pick up frequencies low enough

44

Measurement

for the application. Being able to have a lower capacitance means that the area of the capacitor plate could be made smaller a signicant advantage especially for ECG where high spatial resolution is desirable. After digital ltering, the circuit achieves an SNR of 9.7 dB at an input amplitude of 25 V. However, the noise here consists of not only the circuit noise; but also the noise produced by the oscilloscope, the quantization noise as well as any aliased noise from the analog-to-digital conversion. Therefore, the SNR could be improved by including a high resolution ADC directly on the PCB as well as a more aggressive anti-aliasing lter before it. The power consumption for both circuits is very high because of the urgently needed design of notch lters to remove unexpected interference. Including the notch lters on one of the PCBs as well as designing them for low power with the use of dierent operational ampliers, would surely reduce the power consumption signicantly.

Chapter 5

Summary
The goal of this thesis was to design and evaluate a capacitively coupled sensor and readout circuit that could be used to measure very low-frequency, low-level signals as required by electrocardiography (ECG) and electroencephalography (EEG) measurements without needing direct contact to the skin. The properties of these signals, that put the requirements on the circuit are listed in Table 5.1. These numbers show that measuring such signals requires a very low noise circuit, and at those frequencies, it is a great design challenge. Characteristic Bandwidth Signal level ECG 030 Hz 0.051.5 mV EEG 040 Hz from 10 V

Table 5.1. Signal levels and bandwidths of ECG and EEG signals.

To measure these signals, two main components had to be designed; one sensor that senses the signals; and a readout circuit that amplies and conditions the signals. A sensor was created by using the bottom layer of a printed circuit board (PCB) as a capacitor plate and placing it against the signal source, which acts as the opposite capacitor plate. The solder mask of the PCB and the air between the two acts as an insulator and completes the capacitive sensor. The readout circuitry was placed on the other side of this PCB as well as on another PCB due to the size of the circuit. This created a compact sensor with the area of 25x25mm. The readout circuit consisted of two dierent stages. The rst stage provided 50 times amplication, and was realized with an instrumentation amplier. Due to the capacitance at the input created by the sensor capacitor, the input bias resistor of the instrumentation amplier had to be very high in order not to suppress the low frequency signals sought to be measured. The second stage provided 20 times gain and band-pass ltering of the signal, limiting it to the interesting bandwidth. Later, during measurement, it was discovered that additional ltering was 45

46

Summary

needed in order to suppress interfering noise at specic frequencies. These were designed on provisional stripboards and were inserted in between the two PCBs. Measurements were made with two dierent circuit congurations. The dierence between these congurations was the size of the bias resistor at the input of the rst stage instrumentation amplier; sizes 10 M and 10 G were used for this purpose. During initial measurements, high-level noise in the air at 50 Hz and 150 Hz originating from the main power lines was observed. This noise was in band and saturated the readout circuit output, and was therefore removed by notch ltering at these specic frequencies on a separate circuit board as mentioned above. Moreover, further ltering at these frequencies and additional low-pass ltering to reduce high frequency noise was made digitally with a computer after the collection of measurement data. The results from the measurements are summarized in Table 5.2. Metric Input lter -3 dB cuto System bandwidth (-3 dB) System passband gain SNR at 10 Hz and 25 V input Power consumption 10 M bias 128 Hz 31115 Hz 49 dB 117 mW 10 G bias 0.1 Hz 3.143 Hz 58 dB 9.7 dB 116 mW

Table 5.2. Measurement results and performance of the circuit.

As can be seen from the results, with 10 M biasing resistance the circuit transfer function is not satisfactory. The lower end of the bandwidth is 31 Hz, which is above the highest frequencies of the wanted signals. This of course means that these signals will not be amplied enough and that the dierence in amplication will be very large between dierent frequency components in these signals. Furthermore, the maximum gain is signicantly lower than the gain that the circuit was designed for, 49 dB instead of 60 dB, and the peak gain is at 7080 Hz well above the desired signal bandwidth. On the other hand, with a 10 G biasing resistor, the circuit performance is greatly increased. With a bandwidth of approximately 340 Hz, it will certainly be able to amplify both ECG and EEG signals (compare with Table 5.1). The gain also reaches a value of 58 dB, which is very close to the 60 dB the circuit was designed for. For a low-level, low-frequency input signal at 25 V and 10 Hz, the circuit achieved a signal-to-noise ratio (SNR) of almost 10 dB after digital ltering. This number could possibly be increased with better a/d-conversion and more aggressive anti-alias ltering. The conclusion of this investigative thesis is that it is possible to measure the low-level, low-frequency signals required for non-contact ECG and EEG monitoring capacitively with a simple PCB sensor construction. However, it is not without its problems. The two most signicant issues of the techniques used in this thesis are, 1) that the input resistor of the readout circuit needs to be very high to be able to sense low frequency signals; and 2) that large amounts of noise from the

5.1 Future Work main power lines are picked up by the sensor and amplied by the circuit.

47

5.1

Future Work

This section lists things that the author feels could benet from further investigation to improve the performance of the circuit. On-board a/d-conversion. Because of the limited resolution of the oscilloscope used for measurement, a signicant amount of quantization noise is introduced into the output signal. With an on-board, high resolution a/d-converter, this noise could be reduced, producing an output signal with higher SNRs. Blind/buried vias on the PCB. Because of limitations in the PCB layout software, all vias of the sensor PCB punched holes through all the layers of the board, eectively perforating the sensor metal layer as well as the shield layer. These might cause extra interference on the sensor plate and the signal could be improved by stopping unnecessary vias from going through all layers. On-board notch lters. Since the need for the two notch lters was realized after the manufacturing of the printed circuit boards, they were not included on them and had to be built on a separate prototyping stripboard. This made the whole system, very bulky and makes it dicult to properly x the sensor to the body in the case of an ECG or EEG measurement. With a redesign of the circuit, this should be taken into account, and the notch lters should be included on one of the PCBs as a suggestion, on the back side of the second board. Other input biasing techniques. As have been seen in the measurements, the higher the input impedance of the instrumentation amplier the better the circuit works. Raising the impedance further would create opportunities to reduce the area of the capacitive sensor while maintaining signal quality. However, simply using a higher value resistor might not be preferable since it increases the thermal noise of the resistor. Instead, other techniques for high impedance biasing, such as that in [5], should be investigated. Substitute the instrumentation amplier for an operational amplier. Instrumentation ampliers are designed to amplify dierential signals. In this case it is used with a single ended signal and the negative input is connected to the output through a low-pass lter, making it track the positive input. Since the instrumentation amplier is built up of three operational ampliers and two buers and the same functionality could be implemented with a single operational amplier, it is reasonable to believe that such an arrangement would reduce the amount of noise contributed by this rst stage.

References
[1] J.-C. Chiou, L.-W. Ko, C.-T. Lin, C.-T. Hong, T.-P. Jung, S.-F. Liang, and J.L. Jeng, Using novel mems eeg sensors in detecting drowsiness application, in Biomedical Circuits and Systems Conference, 2006. BioCAS 2006. IEEE, pp. 33 36, 29 2006-Dec. 1 2006. [2] C.-T. Lin, L.-W. Ko, J.-C. Chiou, J.-R. Duann, R.-S. Huang, S.-F. Liang, T.W. Chiu, and T.-P. Jung, Noninvasive neural prostheses using mobile and wireless eeg, Proceedings of the IEEE, vol. 96, pp. 1167 1183, July 2008. [3] J. Malmivuo and R. Plonsey, Bioelectromagnetism Principles and Applications of Bioelectric and Biomagnetic Fields. Oxford University Press, 1995. [4] V. K. Murthy, T. M. Grove, G. A. Harvey, and L. J. Haywood, Clinical usefulness of ecg frequency spectrum analysis, in Computer Application in Medical Care, 1978. AMIA Annual Symposium on, pp. 610612, November 1978. [5] T. J. Sullivan, S. R. Deiss, and G. Cauwenberghs, A low-noise, non-contact eeg/ecg sensor, in Biomedical Circuits and Systems Conference, 2007. BIOCAS 2007. IEEE, pp. 154157, Nov. 2007. [6] T. J. Sullivan, S. R. Deiss, T.-P. Jung, and G. Cauwenberghs, A brainmachine interface using dry-contact, low-noise eeg sensors, in Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on, pp. 1986 1989, May 2008. [7] C. J. Harland, T. D. Clark, and R. J. Prance, Remote detection of human electroencephalograms using ultrahigh input impedance electric potential sensors, Applied Physics Letters, vol. 81, pp. 3284 3286, Oct 2002. [8] O. Ryynanen, J. Hyttinen, and J. Malmivuo, Study on the spatial resolution of eeg - eect of electrode density and measurement noise, in Engineering in Medicine and Biology Society, 2004. IEMBS 04. 26th Annual International Conference of the IEEE, vol. 2, pp. 4409 4412, sept. 2004. [9] D. de Wolf, Essentials of Electromagnetics for Engineering. Cambridge University Press, 2001. 49

50

References

[10] Texas Instruments, INA116 Ultra Low Input Bias Current Instrumentation Amplier Datasheet. [11] Texas Instruments, OPA27 Ultra-Low Noise Precision Operational Amplier Datasheet. [12] Linear Technology, LT6010 Rail-to-Rail Output Precision Op Amp with Shutdown Datasheet. [13] W. Jung, Op Amp Applications Handbook. Newnes, 2006. [14] B. Razavi, Principles of Data Conversion System Design. IEEE Press, 1995. [15] Agilent Technologies, Agilent Technologies InniiVision 7000 Series Oscilloscopes Datasheet.

Appendix A

MATLAB R Code Listings


A.1
1

Notch Filter
object .

f u n c t i o n Hd = notchfilter ( sampleFreq , f0 ) % NOTCHFILTER Returns a d i s c r e t e time f i l t e r % % % % % %

M F i l e g e n e r a t e d by MATLAB(R) 7 . 7 and t h e S i g n a l P r o c e s s i n g Toolbox 6 . 1 0 . M o d i f i e d t o s u p p o r t i n p u t arguments f o r v a r i a b l e notch f r e q u e n c i e s . Generated on : 14 Jan 2010 1 0 : 4 8 : 2 2

10 % B u t t e r w o r t h Bandstop f i l t e r d e s i g n e d u s i n g t h e BUTTER f u n c t i o n . % A l l f r e q u e n c y v a l u e s a r e i n Hz . Fs = sampleFreq ; % Sampling Frequency 15 Fpass1 Fstop1 Fstop2 Fpass2 Apass1 Astop Apass2 = = = = = = = f0 f0 f0 + f0 + 0.5; 30; 1; 10; 1; 1; 10; % % % % % % % F i r s t Passband Frequency F i r s t Stopband Frequency Second Stopband Frequency Second Passband Frequency F i r s t Passband R i p p l e (dB) Stopband A t t e n u a t i o n (dB) Second Passband R i p p l e (dB)

20

25

% C a l c u l a t e t h e o r d e r from t h e p a r a m e t e r s u s i n g BUTTORD. [N , Fc ] = buttord ([ Fpass1 Fpass2 ]/( Fs /2) , [ Fstop1 Fstop2 ]/( Fs /2) , ... min ( Apass1 , Apass2 ) , Astop ); % C a l c u l a t e t h e zpk v a l u e s u s i n g t h e BUTTER f u n c t i o n . [z ,p , k ] = butter (N , Fc , stop );

30 % To a v o i d round o f f e r r o r s , do not u s e t h e t r a n s f e r f u n c t i o n . % I n s t e a d g e t t h e zpk r e p r e s e n t a t i o n and c o n v e r t i t t o % second o r d e r s e c t i o n s . [ sos_var , g ] = zp2sos (z , p , k ); Hd = dfilt . df2sos ( sos_var , g ); % [EOF]

35

51

52

MATLAB R Code Listings

A.2
1

Low Pass Filter


object .

f u n c t i o n Hd = lpfilter ( sampleFreq ) % LPFILTER Returns a d i s c r e t e time f i l t e r % % % % % % %

M F i l e g e n e r a t e d by MATLAB(R) 7 . 7 and t h e S i g n a l P r o c e s s i n g Toolbox 6 . 1 0 . Modified to support v a r i a b l e sampling f r e q u e n c i e s . Generated on : 14 Jan 2010 1 1 : 0 8 : 3 1

10

% B u t t e r w o r t h Lowpass f i l t e r d e s i g n e d u s i n g t h e BUTTER f u n c t i o n . % A l l f r e q u e n c y v a l u e s a r e i n Hz . Fs = sampleFreq ; % Sampling Frequency Fpass Fstop Apass Astop = = = = 100; 400; 1; 60; % % % % Passband Stopband Passband Stopband Frequency Frequency R i p p l e (dB) A t t e n u a t i o n (dB)

15

20

% C a l c u l a t e t h e o r d e r from t h e p a r a m e t e r s u s i n g BUTTORD. [N , Fc ] = buttord ( Fpass /( Fs /2) , Fstop /( Fs /2) , Apass , Astop ); 25 % C a l c u l a t e t h e zpk v a l u e s u s i n g t h e BUTTER f u n c t i o n . [z ,p , k ] = butter (N , Fc ); % To a v o i d round o f f e r r o r s , do not u s e t h e t r a n s f e r f u n c t i o n . % I n s t e a d g e t t h e zpk r e p r e s e n t a t i o n and c o n v e r t i t t o % second o r d e r s e c t i o n s . [ sos_var , g ] = zp2sos (z , p , k ); Hd = dfilt . df2sos ( sos_var , g ); % [EOF]

30

Appendix B

Schematics
This appendix shows the schematics created with the schematic capture software gschem to create the PCBs.

53

54

B.1

C101 10u R101

510k

G1

U101

Rg INAMP_OUT
11

Antenna R102 1k Ref


16

Schematics

Shield

INA116
Rg
9

G+
5

Sensor
R103
3

60k RESET
1

Q101
1

Q102 R105 10M


2

R106 10M

MMBT5089 R104 20k RESET_REF

MMBT5089

VCC

13

U101 C103 1u GND

C102

V+

1n

INA116
C105 1u VEE
TITLE FILE: PAGE

C104

V-

1n

Sensor and Instrumentation Amplifier Board


REVISION:

Schematics

OF

DRAWN BY:

0.1 Daniel Svrd

B.1 Schematics

OPAMP_IN LT6010
3 6

C201 R204 OPAMP_OUT

10u 10.5k
2

U201 C202 R203 R201 C204 390k C203 R202 20k 3.9n REF 150n 20k 10u

+3V

U201

V+

LT6010 1n 1u

C205

C206

SHDN V-

GND
TITLE FILE: PAGE

Signal Conditioning Board


REVISION:

55

OF

DRAWN BY:

0.1 Daniel Svrd

Appendix C

PCBs
This appendix shows masks for the dierent PCB layers at scale 1:1. Only masks with relevant information are shown; empty masks such as the back layer solder mask and silkscreen have been left out since they are empty and full, respectively.

57

58

PCBs

C.1
C.1.1

PCB Layers
Sensor PCB

Front Layer

Metal

Silkscreen

Solder mask

Buried Layers

Layer 2 metal

Layer 3 metal

Back Layer

Metal

Plated drill

C.1 PCB Layers

59

C.1.2

Signal Conditioning PCB

Front Layer

Metal

Silkscreen

Solder mask

Back Layer

Metal

Plated drill

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