Smps
Smps
By Luca Difalco, New Products Business Manager, STMicroelectronics, Catania, Italy A quasi-resonant yback converter uses highvoltage emitter-switched bipolar transistors to achieve the wide input-voltage range needed to power digital electric-energy meters in both residential and industrial applications.
ower-supply requirements for three-phase electric-energy meters used in industrial applications have grown quickly in recent years. For example, distributed factory automation requirements for monitoring power consumption have driven the adoption of wireless communications in high-end electricenergy meters. In such meters, the power supply may need to deliver up to 20 W of regulated low-voltage dc output, while operating from mains voltages as high as 690 Vac. The electric-energy meter manufacturer typically would like to implement such power supplies as inexpensively and exibly as possible. Furthermore, the manufacturer may wish to reuse the same approach, topology and semiconductors it employs in single-phase electric-energy meters, which
operate at much lower ac line voltages. A quasi-resonant yback converter design that incorporates high-voltage bipolar transistors can meet these seemingly conicting requirements.
Fig. 1. The STC03DE220HP emitter-switched bipolar transistor is housed in a special TO-247 four-pin package (a) that complies with the IEC 664-1 standard for creepage (b), to attain a maximum working voltage of 2300 V. Power Electronics Technology October 2007
Fig. 2. In a valley switching or quasi-resonant topology, the power transistor is turned on after leakage-inductance demagnetization, when circuit resonance causes a dip in the voltage across the transistor.
Fig. 3. In ESBT technology, a bipolar transistor and MOSFET are effectively connected in a cascode arrangement in a monolithic silicon device.
the meters power requirements by up to 10 times, pushing consumption of the meters electronics as high as 20 W. As mentioned previously, electric-energy metering systems are supposed to be plugged into the same voltage
mains, so the house/utility power consumption should be measured as plugged in. Implementations of electric-energy metering must take into account standard domestic and commercial use worldwide for voltage mains going from 100 Vac up to 575 Vac, either single phase or three phase. For example, the latest
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SMPS DESIGN
Fig. 4. A 5-W reference design implementing quasi-resonant yback single-switch topology and ESBT technology (Q1) can be easily scaled to higher power levels. The output rectier and feedback circuitry appear in Fig. 5.
environmental requirements for the automotive and factory automation industries have led manufacturers to monitor the power consumption of all of a factorys equipment, with the aim of optimizing overall consumption, avoiding network-disturbing power peaks and saving money. With each piece of equipment being monitored, the upper limit of mains voltage moves further up. New motors and robots consuming 1 MW and higher do not operate off the existing 575-Vac standard, but rather off the new standard of 690 Vac. This increase in operating voltage reduces the currents both in the power distribution circuit and in the motor itself.
switch-mode power supplies (SMPS; either isolated or nonisolated), and likely using the inexpensive and easy-to-design yback topology. Although this implementation is feasible and even simple when the mains voltage remains below 264 Vac, it begins to get complicated when the ac line voltage rises above this value, boosting the dc link to more than 600 V. In the case of 690-Vac line voltage (plus the usual margin designers must take into account), the dc link reaches values up to 1250 Vdc. When designing a standard yback converter, the voltage capability of the switch must follow the basic formula below, which takes into account the dc link, the reverted voltage design, the leakage-inductance effect and an appropriate margin: VSWITCH VINDC(MAX) +VFLYBACK +VSPIKE +margin. DC(MAX) It is easy to calculate that when 1250 Vdc applies, the formula becomes: VSWITCH 1250 V + 500 V (duty-cycle issue) + 250 V (typical leakage) + 250 2200 V. 22
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SMPS DESIGN
Symbol
Description Rectied minimum input voltage Rectied maximum input voltage Output voltage 1 Output voltage 2 Output voltage 3 Maximum output 1 power Maximum output 2 power Maximum output 3 power Maximum total output power Minimum output power Minimum switching frequency Reected yback voltage Converter efciency at 200 Vdc Converter efciency at 564 Vdc Converter efciency at 1070 Vdc
Value 200 V 1200 V 15 V/66 mA isolated 5 V/0.6 A nonisolated 15 V/66 mA isolated 0.99 W 3W 0.99 W 5W 30 kHz 300 V 80% 70% 60%
VINMIN
DC
VINMAX VOUT1
DC
VOUT2 VOUT3
POUT1MAX
Fig. 5. Output stage for quasi-resonant yback converter. One of the PwrElec-Ventronics DigiPwr 1/4p 5/9/07 1:13 PM converters two isolated outputs is depicted here.
at 1070 Vdc
ESBT Technology
Based on an emitter-switching concept, emitter-switched bipolar transistor (ESBT) technology was specically developed to cope with stringent industrial requirements, with the advantage of maintaining a simple and inexpensive flyback single-switch topology at higher voltages. This technology has been used to create a 3-A, 2200-V switch, the STC03DE220HP from STMicroelectronics (Fig. 1). This transistor is housed in a special TO-247-4LHP, which is a fully isolated package that complies with IEC norms for creepage to achieve its high-voltage rating. Furthermore, the device allows designers to operate the power converter at switching frequencies up to 150 kHz, enabling the SMPS to achieve small size through the use of low-value passives and magnetic components. Another point to consider when designing an SMPS for electric-energy metering is efciency. The meter itself is not meant to consume any power, just to monitor it. Any losses introduced by the SMPS result in added consumption at the system level. In designing the SMPS, the two main losses that must be taken into account are switching losses and conduction losses. Since ESBT technology is bipolar based and employs minority carriers, it offers lower conduction losses than would be possible with MOSFETs. As for switching losses, 24
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SMPS DESIGN
the main advantage of an ESBT is its turn-on losses, which are roughly based on the following formula: the breakdown voltage capability to 2200 V and keeping both the switching and conduction losses very low. PON = C V2. These benets are thanks to the fast switching characWhen the dc link goes as high as 1250 Vdc, this loss is teristic of the ESBT technology and its intrinsically low predominant when compared with conduction losses and saturation voltage, which is typical of any minority-carrierturn-off losses. based technology. Electric-energy metering applications can ESBT technology offers the possibility of implementing benet from the combination of ESBT technology with a a quasi-resonant topology, also known as a valley-switching quasi-resonant topology, achieving more than 80% efciency topology where the device is turned on after leakage-inin ultrasmall, cool-running and reliable power supplies for ductance demagnetization, when the rst valley appears as demanding environments. PETech a result of the intrinsic circuit resonance. Fig. 2 illustrates how this smart control method can help to improve efciency in any SMPS, but becomes especially valuable when applied to a very-high-voltage bus. As shown in Fig. 3, ESBTs are fourpin rather than the standard three-pin devices because of the cascode construction of the monolithic switch. Although this is not the standard switch construction, there is much literature and many reference designs available to support applications using ESBT technology.
Reference Design
A power-supply reference design for a single-switch quasi-resonant yback converter meets the requirements listed in the table. Although this reference design was conceived to deliver 5 W, with very small modications its output power can be increased up to 20 W. Fig. 4 portrays the full circuit implementation of the reference design, where special attention must be paid to the ESBT base biasing design and the proper design of the quasiresonant topology in order to achieve the best performance in a high-voltage environment. Obviously, 20 W represents a modest amount of power for such a smart topology/technology mix. The reference design can deliver more than 360 W while still using a single-switch topology if transistors with higher current ratings are used.
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