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Multilevel Inverter Simulation Using Psim

This document discusses multilevel inverters and simulates a three-level diode-clamped inverter and cascaded H-bridge inverter using PSIM. It introduces multilevel inverters and their advantages over traditional two-level inverters. The main multilevel inverter topologies are described including diode-clamped, cascaded H-bridge, and flying capacitor. Simulation results are shown for the output voltage waveforms of the three-level diode-clamped and cascaded H-bridge inverters operating with sinusoidal pulse width modulation.

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924 views

Multilevel Inverter Simulation Using Psim

This document discusses multilevel inverters and simulates a three-level diode-clamped inverter and cascaded H-bridge inverter using PSIM. It introduces multilevel inverters and their advantages over traditional two-level inverters. The main multilevel inverter topologies are described including diode-clamped, cascaded H-bridge, and flying capacitor. Simulation results are shown for the output voltage waveforms of the three-level diode-clamped and cascaded H-bridge inverters operating with sinusoidal pulse width modulation.

Uploaded by

thienvuong90
Copyright
© Attribution Non-Commercial (BY-NC)
Available Formats
Download as PDF, TXT or read online on Scribd
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Simulation of Multilevel Inverter Using PSIM

Darshan.S.Patel
M.Tech (Power Electronics & Drives) Assistant Professor Department of Electrical Engineering Sankalchand Patel College of Engineerig-Visnagar E-mail:[email protected] URL:www.darshanspatel.weebly.com

Why Multilevel Inverter?


The Voltage source Inverters Produce an output voltage or a current with level either 0 or Vdc,known as two level inverter. Two obtain a quality output voltage waveform with minimum amount of ripple content, they require high switching frequency along with various PWM Techniques.

This two level inverters have some limitations in operating at high frequency mainly due to switching losses and constraints of device ratings. Multilevel inverter present a new set of features that are well suited for use in reactive power compensation. It is east to produce high power, high voltage with the multilevel structure.

Two Level

Three Level

Multilevel Inverter Topologies

Neutral point clamped or Diode clamped topology. Cascaded H-Bridge topology. Flying capacitor or Capacitor clamped topology.

Diode Clamped Inverter

m-level inverter consists of

For Single Phase: (m-1) capacitors 2(m-1) Switching devices (m-1)(m-2) clamping diodes

Three Phase Three Level Diode Clamped Inverter

Simulation of Diode Clamped Inverter

Tool Box /

Components
Library browser Input Voltage Power Switch Sinusoidal Wave 1/2/3 Elements /Sources/Voltage Elements Power/Switches

Block
DC voltage source IGBT

Parameters
Amplitude =100 Default

Elements /Sources/Voltage

Sine

Peak Amplitude = 0.8 Frequency = 50 Phase angle = 0,-120,-240 DC offset = 1


V peak to peak = 1 Frequency = 2000 Duty cycle = 0.5 DC offset = 1 Phase Delay = 0 V peak to peak = 1 Frequency = 2000 Duty cycle = 0.5 DC offset = 0 Phase Delay = 0 Resistance(Ohm) =20k

Triangular Wave 1,3,5

Elements /Sources/Voltage

Triangular

Triangular Wave 2,4,6

Elements /Sources/Voltage

Triangular

Load

Elements/ Power/RLC Branches

Resistor

Inverter On control
Comparator

Elements /Controls/Logic Elements


Elements/Others/ Switch controllers Elements /Controls/Comparator

NOT Gate ON OFF Controller


Comp

Default Default
Default

Full Bridge Inverter

SPWM

Cascaded H Bridge Inverter

Each H-bridge must have an isolated DC supply -usually derived from an isolated AC supply via a diode bridge Each bridge can produce +Vdc, 0, -Vdc independently

Three Phase Three Level Inverter

One phase of cascaded H bridge inverter consists of 3-1/2 = 2/2 = 1 Identical H Bridges

Phase-A

17

Three-level inverter needs both a carrier and a reference. In this case the number of triangular carriers is equal to m-1, where m is the number of voltage levels. For a three-phase three-level inverter this means that two triangular carriers and one sinusoidal reference are needed. Phase shifting on any two adjacent carrier waves is given by

cr = 360/(m 1) = 360/(3-1) = 360/2 = 180


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Simulation of Three Phase Three Level CHB Inverter


Cascaded H bridge Inverter

Load

PWM Controller

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Components

Tool Box / Library browser Elements /Sources/Voltage

Block

Parameters

Sinusoidal Wave a/b/c

Sine

Peak Amplitude = 0.8 Frequency = 50 Phase angle = 0/120/240 DC offset = 0

Triangular Wave 1/2

Elements /Sources/Voltage

Triangular

V peak to peak = 1 Frequency = 2000 Duty cycle = 0.5 DC offset = -1/0 Phase Delay = 0/180

Triangular Wave 3/4

Elements /Sources/Voltage

Triangular

V peak to peak = 1 Frequency = 2000 Duty cycle = 0.5 DC offset = -1/0 Phase Delay = 120/300

Triangular Wave 5/6

Elements /Sources/Voltage

Triangular

V peak to peak = 1 Frequency = 2000 Duty cycle = 0.5 DC offset = -1/0 Phase Delay = 240/60

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Gate Pulses

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Carrier Based PWM Schemes


It classified into two categories 1.Phase Shifted Carrier PWM method (PSPWM) 2. Level Shifted PWM methods In Phase Disposition (IPD) Alternative Phase Opposition Disposition (APOD) Phase Opposition Disposition (POD)

Phase Shifted Modulation


Triangular carriers required

m-1=6 where m= voltage level


All the triangular carriers have
the same frequency and the same peak to peak amplitude. There is a phase shift between any two adjacent carrier waves, given by

cr = 360/(m 1)
Here cr = 360/6 = 60
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26

27

Gate Pulses for Upper Switches

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29

Line to neutral Voltage waveform(Van)


3E 2E

E 0

-E -2E

-3E

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Level Shifted Modulation (A) In Phase Disposition (IPD)

31

32

Line to neutral Voltage waveform(Van)

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(B) Phase Opposition Disposition (POD)

34

35

Line to neutral Voltage waveform(Van)

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(C) Alternate Phase Opposition Disposition

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Line to neutral Voltage waveform(Van)

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1.Jos Rodrguez, Jih-Sheng Lai, and Fang Zheng Peng, Multilevel Inverters: A Survey of Topologies, Controls, and Applications, IEEE Transactions on Industrial Electronics, Vol. 49, No. 4, August 2002, pp.724-738.
2.Darshan Patel ,Dr. R Saravanakumar, Dr K.K.Ray, R.Ramesh A Review of Various Carrier Based PWM Methods for Multilevel Inverter , IICPE 2010,India International conference on Power Electronics .January 28-30,2011,at Netaji Subhas Institute of Technology-New Delhi by IEEE Power Electronics Society and this Paper Published in IEEE Explore Digital Library INSPEC Accession Number: 11873778, Digital Object Identifier: 10.1109/IICPE.2011.5728059 3.Darshan Patel, Dr. R Saravanakumar, Dr K.K.Ray, R.Ramesh Design and Implementation of three Level CHB inverter with phase shifted SPWM using TMS320F24PQ, IICPE 2010, India International conference on Power Electronics. January 28-30,2011,at Netaji Subhas Institute of Technology-New Delhi by IEEE Power Electronics Society and this Paper Published in IEEE Explore Digital Library INSPEC Accession Number: 11873860, Digital Object Identifier: 10.1109/IICPE.2011.5728

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