SECTION : I

1. Pin no. 1 & 5 of 8 pin IC741 is used for___

2. Input offset voltage of IC741 is____
3. The change in op-amps input offset voltage caused by variations in supply
voltage is called as____
4. Open loop bandwidth of IC 741 is approximately___
5. Vocm/Vcm represents___
6. Power consumption of typical op-amp is____
7. Op-amp has application with___
a) Open loop b) closed loop c) none of a & b d) both
8. For voltage follower which of the below is true____
a) NI ampl with f/b b)o/p= i/p c) gain=1 d) all
9. For IC 741C SVRR is
a) 100 dB b) 104 dB c) infinite d) 0
10. +Vsat/ (1+ A) is total output offset voltage for
a) NI ampl b) IN ampl c) both a & b d) none
11. The gain of actual op-amp is around___
a) 1 lac b) 1000 c) 100 d) 10,000
12. A summing amplifier can be realized with
a) Inv ampl b) NI amplifier c) Differential amplifier d) all above
13. For integrator fb=___
14. Typical output resistance of 741C is
15. A= Vo/Vid represents
a) Close loop gain b) open loop gain c) CMRR d) none of these
16. A(R1+ Rf)/(R1+Rf+ AR1) represents
a) Exact vtg gain of NI ampl c) ideal vtg gain of NI ampl
b) Exact vtg gain of IN ampl d) ideal vtg gain of IN ampl
17. Output offset voltage is caused by
a) Input bias current b) input offset voltage c)both a & b d) none
18. Gain bandwidth product of open loop op-amp is equal to closed loop op-
amp and is equal to___
19. Slew rate of op-amp is considered for___
a) Ac application b) dc application c) both d) none
20. dVo/dt is called as
a) Voltage ratio b) voltage rate c) slew rate d) transient response
21. Rif= Ri(1+ A) represents
a) i/p resistance of NI ampl c) i/p resistance of op-amp with open loop
b) i/p resistance of IN ampl d) none

22. The introduction of negative feedback makes
a) Gain infinite b)bandwidth infinite c) stabilizes gain d) none
23. Which amplifier offers best immunity to induced noise
a) IN b) NI c) voltage follower d) instrumentation
24. UGB stands for____
25. Gain of non-inverting amplifier is always greater than 1.
a) True b) false c) neither a & b
26. IC 741 is.pin IC.
a) 6 b) 12 c)8 d) 10
27. Typical value of CMRR for 741 is.dB
a) 90 b) 120 c) -20 d) 20
28. Scaling amplifier is also known as.amplifier.
a) Summing b) averaging c) weighted d) none
29. Slew rate is usually specified atgain.
a) High b) zero c) unity d) none
30. Inverting amplifier has. Feedback.
31. Bandwidth of opamp in open loop is.
32. Requirement of instrumentation amplifier are.
a) High i/p impedance c) low o/p impedance
b) High CMRR d) all
33. .. circuit is used as level shifter.
34. Non-inverting amplifier has.feedback.
35. Differential amplifier hasinputs.
36. With zero volts on both inputs an opamp ideally should have an output
equal to
a) The positive supply voltage
b) The negative supply voltage
c) Zero
d) The CMRR
37. In the common mode
a) Both inputs are grounded
b) The outputs are connected together
c) An identical signal appears on both inputs
d) The output signals are in phase
38. Negative feedback
a) Increases the input & output impedance
b) Increases the input impedance & the bandwidth
c) Decrease the output impedance & the bandwidth
d) Does not affect impedances or bandwidth
39. When negative feedback is used, the gain bandwidth product of an op-
ammp
a) Increases
b) Decreases
c) Stays the same
d) Fluctuates
40. Total output offset voltage for opamp is
41. The purpose of offset nulling is to
42. Square wave is generated when an opamp is forced to operate in.
a) Linear region b) when i/ps are grounded c) when operated in saturation
region
43. For step input, output of an integrator is.
44. Instrumentation amplifier isamplifier.
a) Inv ampl b) NI ampl c) differential ampl
45. Phase shift through an op-amp is caused by
a) Negative feedback b) positive feedback

SECTION :II
1. Flip flop is a .. element.
a. memory b.register c.counter d.display
3. A tabulation specifying inputs required for a flip-flop to change from a present state to a
specified next state is known as table.
a. truth b. state c. excitation d. observation
4. The count of a 4 bit binary DOWN counter is 0000. When a clock pulse is applied its count
will be..
a. 0001 b. 1111 c.0000 d.1110
5. A.shift register can be used for SISO, SIPO, PIPO, PISO of data.
a. formal b. global c. universal d. optimum
6. In general asynchronous sequential circuits are .than synchronous sequential circuits.
a. slower b. faster c. active d. deactive
7. Flip-flop is .multivibrator.
a. astable b. monostable c. bistable d. none
8. The binary number designations of rows and columns of k-map are in .
a. binary code b. BCD code c. gray code d. XS-3
9. How many select lines are required in a multiplexer with 1024 inputs and one output?
a. 512 b. 258 c. 64 d. 10
10. Race around condition occurs in a J-K flip flop when X and Y inputs are .
a. X=0, Y=0 b. X=1, Y=0 c. X=0, Y=1 d. X=1, Y=1
11. If a counter having 10 F.Fs is initially at 0, what count will if hold after 2060 pulses
a. 000 000 1100 b. 000 001 1100 c. 000 001 1000 d. 000 0001100
12. Which of the following 'flip flop is used as a latch
a. JK flip flop b. RS flip flop c. T flip-flop d. D flip-flop.

13. Asynchronous decade counter is..
a. 74138 b. 7400 c. 7490 d. 7404
14. The characteristics equation of T -FF is given by
a. Q+ = TQ + TQ b. Q+ =TQ+QT c. Q+ = TQ d. Q+ = TQ

15. The Q output of J-K flip flop is '1'. The output does not change when a clock pulse is applied.
The inputs J and K will respectively.
a. 0 and X b. x and 0 c. 1 and 0 d. 0 and 1

16. The figure of merit of a logic family is given by
a. gain bandwidth product b. (propagation delay time) x (power dissipation)
c. (fanout) x (propagation delay time)
d. (noise margin) x (power dissipation)

17. The output F of the multiplexer circuit in figure can be represented as


18. The simplified Boolean expression associated with Karnaugh map shown in Fig.



19. With initial count of 010, the output sequence produced by circuit shown after two
clock pulses is

a. 001 b. 000 c. 011 d. 110

20. The number of flip-flops required to design synchronous mod-5 counter are
a.5 b.4 c.6 d.3
21. Which of the following flip-flop is used to introduce delay in the circuit?
a. T b. D c. JK d. SR
22. The sequential circuits whose operation is synchronized with the application of clock pulses,
between which no changes of state occur is ____ sequential circuit.
a) asynchronous b) clocked . c) edge triggered d) toggling
23. A flip-flop with active low 'preset' input will have, Q = __,when preset is connected to low.
a) 0 b) 1 c) nochange d) none
24. A modulo-l 0 counter with count sequence from 0000 to 1001 is known as counter.
a) Binaty b) BCD c) Ripple d) Johnson
25. The minimum number offlip-flops required for a decade counter is ____
a) 1 0 b) 16 c) 4 d) 5
26. A multiplexer with four select bits is a
a) 4 : 1 multiplexer b) 8: 1 multiplexer c) 16: 1 multiplexer d) 32: 1 multiplexer
27. A combinational logic circuit which is used to send data from a single source to two or more
separate destinations is called
a) a decoder b) an encoder c) multiplexer d) demultiplexer
29. A divide-by 10 counter is realised by using
a) 5 numbers of divide by 5 circuit b) 5 numbers of divide by 2 circuit c) divide by 5 followed by
divide by 2 circuit d) none of these
30. Which of the following is used as toggle flip-flop?
a) J-K flip-flop b) Master slave J-K flip-flop c) T flip-flop d) All of these