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Boolean Equation To CMOS Circuit

1) The document discusses implementations of Boolean functions using NAND and NOR gates. It provides both algebraic and graphical methods for converting Boolean expressions into NAND and NOR gate logic diagrams. 2) For NAND implementations, the Boolean expression is first converted to a sum-of-products form using De Morgan's theorem, then implemented with NAND gates. For NOR implementations, the expression is converted to a product-of-sums form before implementing with NOR gates. 3) An example applies these methods to implement the function F = xy + xy + z using NAND gates. It first converts the expression to [(xy)*(xy)*z] then draws the corresponding NAND gate logic diagram.

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809 views3 pages

Boolean Equation To CMOS Circuit

1) The document discusses implementations of Boolean functions using NAND and NOR gates. It provides both algebraic and graphical methods for converting Boolean expressions into NAND and NOR gate logic diagrams. 2) For NAND implementations, the Boolean expression is first converted to a sum-of-products form using De Morgan's theorem, then implemented with NAND gates. For NOR implementations, the expression is converted to a product-of-sums form before implementing with NOR gates. 3) An example applies these methods to implement the function F = xy + xy + z using NAND gates. It first converts the expression to [(xy)*(xy)*z] then draws the corresponding NAND gate logic diagram.

Uploaded by

azmaloney7
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Issue 3

1/3

NAND and NOR Implementations
(Gncellenme Tarihi: 24.10.2013)

NAND Implementation
Algebraic Method
1. Obtain the Boolean function F in the sum-of-products form.
2. Take its complement by applying DeMorgans theorem to obtain F in the form of product of
complemented products.
3. Take the whole expression into a primed parenthesis to obtain F. Hence, the function becomes
suitable for the NAND implementation.
Example 1: Implement the Boolean function F = xy + xy + z with NAND gates.
Step 1: The Boolean function F = xy + xy + z is given in the sum-of-products form.
Step 2: F = (xy + xy + z) = (xy).(xy).z
Step 3: F = [(xy).(xy).z]






Note: A three-input NAND gate can be implemented with two-input NAND gates as follows:




Graphical Method
1. Group 1s on the Karnough map.
2. Obtain the simplified Boolean function in the sum-of-products form.
3. Draw the logic diagram with AND and OR gates.
4. Insert a bubble at the output of each AND gate and at each input of the OR gates.
5. Replace INVERT-OR gates with NAND gates.




6. Check all bubbles in the logic diagram. For every bubble that is not compensated by another bubble
along the same line, insert an inverter (a one-input NAND gate) or complement the input literal.

Example 2: Implement the Boolean function F = xy + xy + z with NAND gates.





INVERT-OR gate NAND gate
AND-OR implementation INVERT-OR implementation NAND implementation
x
y
F x
y
z
x
y
F x
y
z
x
y
F
(xy)
x
y
z
(xy)
x
y
F
(xy)
x
y
z
(xy)
x
y
(xy)
x
y
z
(xy)
F = [(xy).(xy).z]
(xy).(xy)
[(xy).(xy)]
z
(x.y.z)
x
y
(x.y) (x.y)
x
y
z

(x.y.z)
x + y
x
y

x
y
(xy) = x + y
Issue 3
2/3

NOR Implementation
Algebraic Method:
1. Obtain the Boolean function F in the product-of-sums form.
2. Take its complement by applying DeMorgans theorem to obtain F in the form of sum of
complemented sums.
3. Take the whole expression into a primed parenthesis to obtain F. Hence, the function becomes
suitable for the NOR implementation.

Example 3: Implement the Boolean function F = (x + y).(y + z) with NOR gates.
Step 1: The Boolean function F = (x + y).( y + z) is given in the product-of-sums form.
Step 2: F =[(x + y).( y + z)]= (x + y) + (y + z)
Step 3: F = [(x + y) + (y + z)]




Note: A three-input NOR gate can be implemented with two-input NOR gates as follows:



Graphical Method:
1. Group 0s on the Karnough map.
2. Obtain the simplified Boolean function in the product-of-sums form.
3. Draw the logic diagram with AND and OR gates.
4. Insert a bubble at each input of the AND gates and at the output of each OR gate.
5. Replace INVERT-AND gates with NOR gates.




6. Check all bubbles in the logic diagram. For every bubble that is not compensated by another bubble
along the same line, insert an inverter (a one-input NOR gate) or complement the input literal.

Example 4:
Implement the Boolean function F = (x + y).( y + z) with NOR gates.









(x+y+z)
x
y
(x+y) (x+y)
(x+y+z)

x
y
z
z

x
y
(x+y)
y
z
(y+z)
F
x
y
y
z
F
x
y
y
z
F
x
y
y
z
F
AND-OR implementation NOR-INVERT AND
implementation
NOR implementation
x
y
x
y
xy

INVERT-AND gate NOR gate
(x + y) = xy

Issue 3
3/3

Example 5:
The carrying capacity of a conveyor is 100 kg. Three objects are randomly loaded on the conveyor. The
weights of the objects x, y and z are 25 kg, 70 kg, and 85 kg respectively. Design a logic circuit that can
activate an alarm circuit when the total weight exceeds 100 kg. Implement the logic diagram with
NAND gates.

Solution:
In order to consider all possibilities lets construct a truth table satisfying the given conditions.
The output of the logic circuit should be 1 for (x + y + z) > 100 kg

F (x, y, z) = (1, 3, 5, 7)



The simplified function:

F = xz + yz



F = [(xz + yz)']' = [(xy)'.(yz)']'

The output (F) takes the logical value of 1 which activates the alarm circuit.

x y z F Minterms
0 0 0 0 m
0
0 0 1 0 m
1

0 1 0 0 m
2

0 1 1 1 m
3

1 0 0 0 m
4

1 0 1 1 m
5

1 1 0 0 m
6

1 1 1 1 m
7

0

1

1

1

0

0

0

0


00 01 11 10
0
1

z
y
x
yz
x
m
o
m
1
m
3
m
2
m
4
m
5
m
7
m
6
x
y
F
(xy)
y
z
(xy)

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