RFIC Design and Testing For Wireless Communications
This document provides an overview of an RFIC design and testing course for wireless communications. The course covers topics related to RF circuit design including linearity, noise figure, frequency synthesis, and wireless communication system concepts. It discusses challenges in analog IC design and outlines the typical design flow process. Key wireless standards and transceiver architectures are also summarized.
RFIC Design and Testing For Wireless Communications
This document provides an overview of an RFIC design and testing course for wireless communications. The course covers topics related to RF circuit design including linearity, noise figure, frequency synthesis, and wireless communication system concepts. It discusses challenges in analog IC design and outlines the typical design flow process. Key wireless standards and transceiver architectures are also summarized.
RFI C Desi gn and Test i ng f or Wi r el ess Communi c at i ons
A PragaTI (TI India Technical University) Course
July 18, 21, 22, 2008 Lecture 10: RFIC design for wireless communications BBy Vishwani D. Agrawal Fa Foster Dai Fa Foster Dai 200 Broun Hall, Auburn University 200 Broun Hall, Auburn University Auburn, AL 36849-5201, USA 1 RFI C Desi gn and Test i ng f or Wi r el ess Communi c at i ons Topi c s Monday, July 21, 2008 9:00 10:30 I nt r oduc t i on Semi c onduc t or hi st or y, RF c har ac t er i st i c s 11:00 12:30 Basi c Conc ept s Li near i t y, noi se f i gur e, dynami c r ange 11:00 12:30 Basi c Conc ept s Li near i t y, noi se f i gur e, dynami c r ange 2:00 3:30 RF f r ont -end desi gn LNA, mi x er 4:00 5:30 Fr equenc y synt hesi zer desi gn I (PLL) Tuesday, July 22, 2008 9:00 10:30 Fr equenc y synt hesi zer desi gn I I (VCO) 11:00 12:30 RFI C desi gn f or w i r el ess c ommuni c at i ons 2:00 3:30 Anal og and mi x ed si gnal t est i ng RFIC design for wireless communications, FDAI, 2008 2 Sur vi val k i t f or a good I C desi gner Sur vi val k i t f or a good I C desi gner Strong background in analog circuit analysis and designs Strong background in digital logic analysis and designs Familiarity with EDA tools such as Cadence, Mentor Graphics, Synopsys and ADS IC design tools Understanding of device physics Knowledge in communication, microwave, DSP and control theories RFIC design for wireless communications, FDAI, 2008 3 Anal og I C desi gn -- a c hal l engi ng t ask Analog IC designs deal with multi-dimensional tradeoff of speed, power, gain, linearity, precision, l i t t supply, noise, cost, etc. Analog circuits are much more sensitive to noise, crosstalk variation mismatchandparasitics dueto crosstalk, variation, mismatch and parasitics, due to high speed and precision requirements. Modeling and simulation of analog circuits are still problematic and not always accurate. Many hidden problems cannot be discovered in simulation. AnalogIC designcanrarelybeautomatedat high Analog IC design can rarely be automated at high speed. It requires hand-crafted design and layout. Thus, the designers experience is critical. RFIC design for wireless communications, FDAI, 2008 4 Communi c at i on Syst em Conc ept s Noise Analysis Noise Types, Noise Figure; d hi 0Oh Impedance Matching to 50 Ohm; Linearity Analysis Intermodulation, Harmonic Di t ti G i C i S f D i Distortion, Gain Compression, Spur-free Dynamic Range; FrequencyConversion SpuriousResponse; Frequency Conversion Spurious Response; Receiver/Transmitter Architectures Homodyne, Heterodyne ImageReject Receiver; Heterodyne, Image Reject Receiver; Modulation/Demodulation Schemes AM, FM, BPSK QPSK MSK GMSK etc RFIC design for wireless communications, FDAI, 2008 5 BPSK, QPSK, MSK, GMSK, etc. Communi c at i on Ci r c ui t Desi gns Device Modeling BJ T (RF Device Model, RF Noise Model), MOS (RF Device Model, RF Noise Model), Passive Elements (Res., Cap. & Ind.) ( , p ) LNA Design, VGA Design Mixer Design, Image Rejection Mixer IQ Modulator Designs, quadrature generation RF Circuit Biasing Bandgap Voltage References, Current References References Voltage Controlled Oscillators (VCO) Phase Locked Loops Integer PLLs, Fractional-N PLLs, p g Sigma-delta Modulator, Phase detector, charge pump, MMD Integrated filters, Polyphase filters Po er Amplifiers Matching Biasing ClassA B C RFIC design for wireless communications, FDAI, 2008 6 Power Amplifiers Matching, Biasing, Class A, B, C Anal og I C Design Kickoff Functional Review Foundry & Technology Selection Tool & Library Setup Anal og I C Desi gn Fl ow Circuit Design & Simulation Circuit Design Review L t Layout Parasitic Extraction Full Chip Simulation with Parasitics Sim Fail Sim Pass Design Review Final Sign-off Spec Update Test board Design Foundry Fabrication Test Fail Respin Characterization Test System DVT Protoype Approval Test Pass p RFIC design for wireless communications, FDAI, 2008 7 Protoype Approval Design Archived Wi r el ess St andar d: WLAN, WI RELESS DATA STANDARD BlueTooth IEEE 802.11 ETS1/BRAN HiperLAN/2 p 5 GHz 802.11b 2.4 GHz 802.11a 5.3 GHz M bil F 2.402 GHz-2.480 GHz (N. America & Europe 79 Hopping Channel) 2.41 GHz 2.462 GHz (N. America, 12 channels 1000 mW/MHz Power Allowance) 5.150 GHz 5.250 GHz (USA U-NII Lower Band, channels 36, 40, 44, 48 25mW/MHz MaxTransmit Power) 5.150 GHz 5.250 GHz, 2.5 mW/Hz 5.250 GHz 5.350 GHz, 12.5 mW/Hz 5.725 GHz 5.825 GHz, 50 mW/Hz USA U NII Band Mobile Frequency Range 2.5 mW/MHz Max Transmit Power) USA U-NII Band 2.447 GHz 2.473 GHz (Spain) 2.412 GHz 2.472 GHz (Europe, 12 Channels 100mW/MHz power allowance) 5.250 GHz 5.350 GHz (USA U-NII Middle Band, channels 52, 56, 60, 64 12.5 mW/MHz Max Transmit Power) 5.150 GHz 5.350 GHz, 200 mW 5.250 GHz 5.350 GHz, 1000W 5.725 GHz 5.825 GHz, 25 mW Europe HiperLAN and ISM 2.448 GHz 2.482 GHz (France) 2.483 GHz (J apan, 1 cannel 10mW/MHz power allowance) 5.725 GHz 5.825 GHz (USA U-NII Upper Band, channels 149, 153, 157, 161 50 mW/MHz Max Transmit Power) 5.150 GHz 5.250 GHz, 100mW J apan (HiSWANa) 2.473 GHz 2.495 GHz (J apan) M lti l A FrequencyHopping CSMA/CA CSMA/CA TDMA Multiple Access Frequency Hopping CSMA/CA CSMA/CA TDMA Duplex Method TDD TDD TDD TDD Users / Channel 7 active, 200 inactive 127 127 127 1MH FHSS 1MH OFDM 20MH OFDM 20MH Channel Spacing 1 MHz FHSS: 1 MHz DSSS: 25 MHz OFDM: 20MHz OFDM: 20MHz Modulation Shaped Binary FM (0.5 Gaussian Filter) FHSS: GFSX (0.5 Gaussian Filter) DSSS:DBPSK (1 Mb/s) DQPSK (2Mb/s) OFDM: QPSK, QAM (0.5 Gaussian Filter) OFDM: BPSK (5.5 Mb/s) OFDM: 16 QAM (24, 26 Mb/s) OFDM: QPSK, QAM (0.5 Gaussian Filter) OFDM: BPSK (6, 9 Mb/s) OFDM: 16 QAM (24, 36 Mb/s) RFIC design for wireless communications, FDAI, 2008 8 CCK:QPSK (11 Mb/s) OFDM: 64 QAM (54 Mb/s) OFDM: 64 QAM (48, 54 Mb/s) Channel Bit Rate 1 Mb/s Symbol rate 721 kb/s raw data, 56 kb/s return 1, 2, or 11 Mb/s 12 Mb/s Symbol rate 5.5 54 Mb/s 12 Mb/s Symbol rate 6 54 Mb/s I C sol ut i on f or a t ypi c al c ommuni c at i on syst em u p l e x e r D u RFIC design for wireless communications, FDAI, 2008 9 RFI C of Dual -band WLAN Tr ansc ei ver s g a i n g a i n g a i n g a i n RFIC design for wireless communications, FDAI, 2008 10 Wi r el ess RF Tr ansc ei ver Ar c hi t ec t ur es Wi r el ess RF Tr ansc ei ver Ar c hi t ec t ur es Superheterodyne Direction conversion (Zero-IF) Direction conversion (Zero IF) Low IF L IF i h i j i i Low IF with image rejection mixer Superheterodyne with walking IF Direct conversion with F LO =3/2F VCO RFIC design for wireless communications, FDAI, 2008 11 Super het er odyne Radi o Ar c hi t ec t ur e Advantages: -- High performance, low power, avoid DC offset Lo designrisk easier todesignLNA andmi er -- Low design risk, easier to design LNA and mixer Disadvantages: -- High cost, needs two (IF/RF) synthesizers, mixer, filters and S/Hs, t l t h SAWfilt external components such as SAW filter RFIC design for wireless communications, FDAI, 2008 12 Di r ec t Conver si on (Zer o-I F) Ar c hi t ec t ur e Advantages: Low cost, eliminates IF SAW IF PLL and image filter Disadvantages design challenges: On-board PAs tend to injection lock the VCO Difficult to achieve good I/Q quadrature balance at RF frequencies LO self-mixing causes DC offset that is hard to be compensated AM detection require large 2nd order linearity High power consumption, ~10% more than superheterodyne RFIC design for wireless communications, FDAI, 2008 13 Low I F Radi o Ar c hi t ec t ur e Advantages: Low cost, eliminates IF SAW, IF PLL and image filter, no DC offset Disadvantages: On-board PAs tend to injection lock the VCO Difficult to achieve good I/Q quadrature balance at high LO frequencies High power consumption, ~10% more than superheterdyne Requires wider BW lowpass filters and high performance ADC D i g i t a l
F i l t e r RFIC design for wireless communications, FDAI, 2008 14 Low I F w i t h i mage r ej ec t i on mi x er Advantages: Low cost, no DC offset Req iresonl oneLPF & S/H Requires only one LPF & S/H Disadvantages: On-board PAs tend to injection lock the VCO Diffi lt t hi dI/Q d t b l t hi hLOf i Difficult to achieve good I/Q quadrature balance at high LO frequencies No DSP I/Q correction possible, requiring very accurate IQ balance in polyphase filters Highpower consumption 5 10%morethansuperheterodyne Quad Mixers LNA Quad Mixers LNA +45 High power consumption, ~5-10% more than superheterodyne S/H S/H -45 ~ ~ ~ RFIC design for wireless communications, FDAI, 2008 15 RF LO Super het er odyne w i t h w al k i ng I F p y g Advantages: Low cost and high performance, similar risk as superheterodyne, yet save an IF synthesizer Disadvantages: Slightly higher power (~5%) than superheterodyne Wider BW for filters RFIC design for wireless communications, FDAI, 2008 16 Di r ec t Conver si on w i t h F LO =3/2F VCO Advantages: Advantages: Avoid pulling, reduce LO-RF interaction Disadvantages: Unwantedsidebandat /3 54GHz/3=18GHz (cell phoneband) Unwanted sideband at /3, 5.4GHz/3=1.8GHz (cell phone band) ~ ~ ~ 2.4GHz LNA Fixed LPF IOUT1 LPFIO1 LPFII1 RX1 Tunable LPF VGA ~ ~ ~ PA ~ ~ ~ Fixed LPF IOUT1 QOUT1 LPFQI1 TX1 Tunable LPF VGA VGA sin( t)+ sin( t/3) Ref Osc REF LPFQO1 5.25GHz PD ~ ~ ~ VCO 0 0 90 0 ~ ~ ~ MMD %2 cos(2 t/3) cos( t/3) sin( t/3) cos( t)+ ( t/3) sin( t/3) QIN1 IIN1 ~ ~ ~ LNA PA TX2 RX2 ~ ~ ~ LPF ~ ~ LPF Delta-sigma Fractional-N VGA VGA VGA cos( t/3) RFIC design for wireless communications, FDAI, 2008 17 ~