INTRODUCTION TO MICROPROCESSOR BASED SYSTEM

The microprocessor is a semiconductor device (Integrated Circuit) manufactured by the VLSI

(VeryLarge Scale Integration) technique. It includes the ALU, register arrays and
control circuit on asingle chip. To perform a function or useful task we have to form a system
by using microprocessor a s a C P U a n d i n t e r f a c i n g m e m o r y, i n p u t a n d o u t p u t
d e v i c e s t o i t . A s ys t e m d e s i g n e d u s i n g a microprocessor as its CPU is called a
microcomputer.
The Microprocessor based system (single board microcomputer) consists of
microprocessor asCPU, semiconductor memories like EPROM and RAM, input device, output
device and interfacingdevices. The memories, input device, output device and
interfacing devices are called peripherals. T h e p o p u l a r i n p u t d e v i c e s a r e
k e yb o a r d a n d f l o p p y d i s k a n d t h e o u t p u t d e v i c e s a r e p r i n t e r , LED/LCD
displays, CRT monitor, etc.

The above block diagram shows the organization of a microprocessor based system. In this
system,the microprocessor is the master and all other peripherals are slaves. The
master controls all the peripherals and initiates all operations.
The work done by the processor can be classified into the following three groups.
1.Work done internal to the processor
2.Work done external to the pro cessor
3.Operations initiated by the slaves or peripherals.

The work done internal to the processors are addition, subtraction, logical operations, data
transfer o p e r a t i o n s , e t c . T h e w o r k d o n e e x t e r n a l t o t h e p r o c e s s o r a r e
r e a d i n g / w r i t i n g t h e m e m o r y a n d reading/writing the J/O devices or the
peripherals. If the peripheral requires the attention of the master then it can interrupt the
master and initiate an operation.
The microprocessor is the master, which controls all the activities of the system. To
perform aspecific job or task, the microprocessor has to execute a program stored in
memory. The programconsists of a set of instructions. It issues address and control signals
and fetches the instruction anddata from memory. The instruction is executed one by
one internal to the processor and based on the result it takes appropriate action.

BUSES:
The buses are group of lines that carries data, address or control signals.

The CPU Bus has multiplexed lines, i.e., same line is used to carry different signals

.The CPU interface is provided to demultiplex the multiplexed lines, to generate chip
selectsignals and additional control signals.

The system bus has separate lines for each signal

.A l l t h e s l a v e s i n t h e s ys t e m a r e c o n n e c t e d t o t h e s a m e s y s t e m b u s . A t a n y
t i m e i n s t a n t communication takes place between the master and one of the slaves. All the
slaves have tri-s t a t e l o g i c a n d h e n c e n o r m a l l y r e m a i n i n h i g h i m p e d a n c e
s t a t e . O n l y w h e n t h e s l a v e i s selected it comes to the normal logic.
PERIPHERAL DEVICES:

The EPROM memory is used to store permanent programs and data.

The RAM memory is used to store temporary programs and data.
The input device is used to enter the program, data and to operate the system.
The output device is used for examining the results.

Since the speed of I/O devices does not match with the speed of microprocessor, an
interfacedevice is provided between system bus and I/O devices. Generally I/O
devices are slowdevices.

Advantages of Microprocessor based system

1. Computational/processing speed is high.
2. Intelligence has been brought to systems.
3. Automation of industrial processes and office administration.

4. Since the devices are programmable, there is flexibility to alter the system by changing the
softwarealone.
5. Less number of components, compact in size and cost less. Also it is more reliable.
6. Operation and maintenance are easier.

Disadvantages of Microprocessor based System

1. It has limitations on the size of data.
2. The applications are limited by the physical address space.
3. The analog signals cannot be processed directly and digitizing the analog signals introduces
errors.
4. The speed of execution is slow and so real time applications are not possible.
5. Most of the microprocessors do not support floating point operations.

Internal Architecture of 8085 Microprocessor

Control Unit
Generates signals within uP to carry out the instruction, which has been decoded. In reality
causes certain connections between blocks of the uP to be opened or closed, so that data goes
where it is required, and so that ALU operations occur.

Arithmetic Logic Unit

The ALU performs the actual numerical and logic operation such as add, subtract, AND,
OR, etc. Uses data from memory and from Accumulator to perform arithmetic. Always stores
result of operation in Accumulator.

Registers
The 8085/8080A-programming model includes six registers, one accumulator, and one flag
register, as shown in Figure. In addition, it has two 16-bit registers: the stack pointer and the
program counter. They are described briefly as follows. The 8085/8080A has six general-purpose
registers to store 8-bit data; these are identified as B,C,D,E,H, and L as shown in the figure. They
can be combined as register pairs - BC, DE, and HL - to perform some 16-bit operations. The
programmer can use these registers to store or copy data into the registers by using data copy
instructions.

Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This register is
used to store 8-bit data and to perform arithmetic and logical operations. The result of an
operation is stored in the accumulator. The accumulator is also identified as register A.

Flags
The ALU includes five flip-flops, which are set or reset after an operation according to data
conditions of the result in the accumulator and other registers. They are called Zero(Z), Carry
(CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags; they are listed in the Table and their
bit positions in the flag register are shown in the Figure below. The most commonly used flags
are Zero, Carry, and Sign. The microprocessor uses these flags to test data conditions.
For example, after an addition of two numbers, if the sum in the accumulator id larger
than eight bits, the flip-flop uses to indicate a carry -- called the Carry flag (CY) is set to one.
When an arithmetic operation results in zero, the flip-flop called the Zero(Z) flag is set to one.
The first Figure shows an 8-bit register, called the flag register, adjacent to the accumulator.
However, it is not used as a register; five bit positions out of eight are used to store the outputs of
the five flip-flops. The flags are stored in the 8-bit register so that the programmer can examine
these flags (data conditions) by accessing the register through an instruction.
These flags have critical importance in the decision-making process of the microprocessor. The
conditions (set or reset) of the flags are tested through the software instructions. For example, the
instruction JC (Jump on Carry) is implemented to change the sequence of a program when CY
flag is set. The thorough understanding of flag is essential in writing assembly language
programs.

Program Counter (PC)

This 16-bit register deals with sequencing the execution of instructions. This register
is a memory pointer. Memory locations have 16-bit addresses, and that is why this is a
16-bit register.
The microprocessor uses this register to sequence the execution of the instructions. The function
of the program counter is to point to the memory address from which the next byte is to be
fetched. When a byte (machine code) is being fetched, the program counter is incremented by
one to point to the next memory location

Stack Pointer (SP)

The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory
location in R/W memory, called the stack. The beginning of the stack is defined by loading 16bit address in the stack pointer.

Instruction Register/Decoder
Temporary store for the current instruction of a program. Latest instruction sent here from
memory prior to execution. Decoder then takes instruction and decodes or interprets the
instruction. Decoded instruction then passed to next stage.

Memory Address Register

Holds address, received from PC, of next program instruction. Feeds the address bus with
addresses of location of the program under execution.

Control Generator
Generates signals within uP to carry out the instruction which has been decoded. In reality causes
certain connections between blocks of the uP to be opened or closed, so that data goes where it is
required, and so that ALU operations occur.

Register Selector
This block controls the use of the register stack in the example. Just a logic circuit which
switches between different registers in the set will receive instructions from Control Unit.

General Purpose Registers

uP requires extra registers for versatility. Can be used to store additional data during a
program. More complex processors may have a variety of differently named registers.

8085 System Bus

Typical system uses a number of busses, collection of wires, which transmit binary numbers, one
bit per wire. A typical microprocessor communicates with memory and other devices (input and
output) using three busses: Address Bus, Data Bus and Control Bus.

Address Bus
One wire for each bit, therefore 16 bits = 16 wires. Binary number carried alerts memory to
open the designated box. Data (binary) can then be put in or taken out.The Address Bus
consists of 16 wires, therefore 16 bits. Its "width" is 16 bits. A 16 bit binary number allows 216
different numbers, or 32000 different numbers, ie 0000000000000000 up to 1111111111111111.
Because memory consists of boxes, each with a unique address, the size of the address bus
determines the size of memory, which can be used. To communicate with memory the
microprocessor sends an address on the address bus, eg 0000000000000011 (3 in decimal), to the
memory. The memory the selects box number 3 for reading or writing data. Address bus is
unidirectional, ie numbers only sent from microprocessor to memory, not other way.

Data Bus
Data Bus: carries data, in binary form, between P and other external units, such as memory.
Typical size is 8 or 16 bits. Size determined by size of boxes in memory and P size helps
determine performance of P. The Data Bus typically consists of 8 wires. Therefore, 28
combinations of binary digits. Data bus used to transmit "data", ie information, results of
arithmetic, etc, between memory and the microprocessor. Bus is bi-directional. Size of the data
bus determines what arithmetic can be done. If only 8 bits wide then largest number is 11111111
(255 in decimal). Therefore, larger number have to be broken down into chunks of 255. This
slows microprocessor. Data Bus also carries instructions from memory to the microprocessor.
Size of the bus therefore limits the number of possible instructions to 256, each specified by a
separate number.

Control Bus
Control Bus are various lines which have specific functions for coordinating and controlling uP
operations. Eg: Read/NotWrite line, single binary digit. Control whether memory is being
written to (data stored in mem) or read from (data taken out of mem) 1 = Read, 0 = Write. May
also include clock line(s) for timing/synchronising, interrupts, reset etc. Typically P has 10
control lines. Cannot function correctly without these vital control signals.
The Control Bus carries control signals partly unidirectional, partly bi-directional.
Control signals are things like "read or write". This tells memory that we are either reading
from a location, specified on the address bus, or writing to a location specified. Various other
signals to control and coordinate the operation of the system. Modern day microprocessors, like
80386, 80486 have much larger busses. Typically 16 or 32 bit busses, which allow larger number
of instructions, more memory location, and faster arithmetic. Microcontrollers organized along
same lines, except: because microcontrollers have memory etc inside the chip, the busses may all
be internal. In the microprocessor the three busses are external to the chip (except for the internal
data bus). In case of external busses, the chip connects to the busses via buffers, which are
simply an electronic connection between external bus and the internal data bus.

3. 8085 Pin description.

Properties

Single + 5V Supply
4 Vectored Interrupts (One is Non Maskable)
Serial In/Serial Out Port
Decimal, Binary, and Double Precision Arithmetic
Direct Addressing Capability to 64K bytes of memory

The Intel 8085A is a new generation, complete 8 bit parallel central processing unit (CPU). The
8085A uses a multiplexed data bus. The address is split between the 8bit address bus and the 8bit
data bus. Figures are at the end of the document.

Pin Description
The following describes the function of each pin:

A6 - A1s (Output 3 State)

Address Bus; The most significant 8 bits of the memory address or the 8 bits of the I/0 address,3
stated during Hold and Halt modes.

AD0 - 7 (Input/Output 3state)

Multiplexed Address/Data Bus; Lower 8 bits of the memory address (or I/0 address) appear on
the bus during the first clock cycle of a machine state. It then becomes the data bus during the
second and third clock cycles. 3 stated during Hold and Halt modes.

ALE (Output)
Address Latch Enable: It occurs during the first clock cycle of a machine state and enables the
address to get latched into the on chip latch of peripherals. The falling edge of ALE is set to
guarantee setup and hold times for the address information. ALE can also be used to strobe the
status information. ALE is never 3stated.

SO, S1 (Output)
Data Bus Status. Encoded status of the bus cycle:
S1
S0
O
O
HALT
0
1
WRITE
1
0
READ
1
1
FETCH
S1 can be used as an advanced R/W status.

RD (Output 3state)
READ; indicates the selected memory or 1/0 device is to be read and that the Data
Bus is available for the data transfer.

WR (Output 3state)
WRITE; indicates the data on the Data Bus is to be written into the selected memory
or 1/0 location. Data is set up at the trailing edge of WR. 3stated during Hold and Halt
modes.

READY (Input)
If Ready is high during a read or write cycle, it indicates that the memory or peripheral is ready
to send or receive data. If Ready is low, the CPU will wait for Ready to go high before
completing the read or write cycle.

HOLD (Input)
HOLD; indicates that another Master is requesting the use of the Address and Data Buses. The
CPU, upon receiving the Hold request. will relinquish the use of buses as soon as the completion
of the current machine cycle. Internal processing can continue. The processor can regain the
buses only after the Hold is removed. When the Hold is acknowledged, the Address, Data, RD,
WR, and IO/M lines are 3stated.

HLDA (Output)
HOLD ACKNOWLEDGE; indicates that the CPU has received the Hold request and that it will
relinquish the buses in the next clock cycle. HLDA goes low after the Hold request is removed.
The CPU takes the buses one half clock cycle after HLDA goes low.

INTR (Input)
INTERRUPT REQUEST; is used as a general purpose interrupt. It is sampled only during the
next to the last clock cycle of the instruction. If it is active, the Program Counter (PC) will be
inhibited from incrementing and an INTA will be issued. During this cycle a RESTART or
CALL instruction can be inserted to jump to the interrupt service routine. The INTR is enabled
and disabled by software. It is disabled by Reset and immediately after an interrupt is accepted.

INTA (Output)
INTERRUPT ACKNOWLEDGE; is used instead of (and has the same timing as) RD during the
Instruction cycle after an INTR is accepted. It can be used to activate the 8259 Interrupt chip or
some other interrupt port.

RST 5.5
RST 6.5 - (Inputs)
RST 7.5
RESTART INTERRUPTS; These three inputs have the same timing as I NTR except
they cause an internal RESTART to be automatically inserted.
RST 7.5 ~~ Highest Priority
RST 6.5
RST 5.5 o Lowest Priority
The priority of these interrupts is ordered as shown above. These interrupts have a
higher priority than the INTR.

TRAP (Input)
Trap interrupt is a nonmaskable restart interrupt. It is recognized at the same time as INTR. It is
unaffected by any mask or Interrupt Enable. It has the highest priority of any interrupt.

RESET IN (Input)
Reset sets the Program Counter to zero and resets the Interrupt Enable and HLDA flipflops.
None of the other flags or registers (except the instruction register) are affected The CPU is held
in the reset condition as long as Reset is applied.

RESET OUT (Output)

Indicates CPlJ is being reset. Can be used as a system RESET. The signal is synchronized to the
processor clock.

X1, X2 (Input)
Crystal or R/C network connections to set the internal clock generator X1 can also be an external
clock input instead of a crystal. The input frequency is divided by 2 to give the internal operating
frequency.

CLK (Output)
Clock Output for use as a system clock when a crystal or R/ C network is used as an input to the
CPU. The period of CLK is twice the X1, X2 input period.

IO/M (Output)
IO/M indicates whether the Read/Write is to memory or l/O Tristated during Hold and Halt
modes.

SID (Input)
Serial input data line The data on this line is loaded into accumulator bit 7 whenever a
RIM instruction is executed.

SOD (output)
Serial output data line. The output SOD is set or reset as specified by the SIM instruction.

Vcc
+5 volt supply.

Vss
Ground Reference.

Addressing Modes
Every instruction of a program has to operate on a data. The method of specifying the data to be
operated by the instruction is called Addressing.The 8085 has the following 5 different types
of addressing.
1. Immediate Addressing
2. Direct Addressing
3. Register Addressing
4. Register Indirect Addressing
5. Implied Addressing
Immediate Addressing
In immediate addressing mode, the data is specified in the instruction itself. The data will be
apart of the program instruction. All instructions that have I in their mnemonics
are of Immediate addressing type.
Eg.MVI B, 3EH
- Move the data 3EH given in the instruction to B register.
Direct Addressing
In direct addressing mode, the address of the data is specified in the instruction. The data will be
in memory. In this addressing mode, the program instructions and data can be stored
in different m e m o r y b l o c k s . T h i s t y p e o f a d d r e s s i n g c a n b e
i d e n t i f i e d b y 1 6 - b i t a d d r e s s p r e s e n t i n t h e instruction.
Eg.LDA 1050 H
- Load the data available in memory location 1050H in accumulator.
Register Addressing
In register addressing mode, the instruction specifies the name of the register in
which the data is available. This type of addressing can be identified by register
names (such as A, B, ) in the instruction.
Eg. MOV A, B -Move the content of B register to A register.
Register Indirect Addressing
In register indirect addressing mode, the instruction specifies the name of the register in which
theaddress of the data is available. Here the data will be in memory and the address
will be in theregister pair. This type of addressing can be identified by letter M present in the
instruction.
Eg. MOV A, M - The memory data addressed by HL pair is moved to A register.

Implied Addressing
In implied addressing mode, the instruction itself specifies the type of operation and location of
datato be operated. This type of instruction does not have any address, register
name, immediate dataspecified along with it.
Eg.
CMA - Complement the content of accumulator.

Instruction Set Classification

An instruction is a binary pattern designed inside a microprocessor to perform a specific
function. The entire group of instructions, called the instruction set, determines what functions
the microprocessor can perform. These instructions can be classified into the following five
functional categories: data transfer (copy) operations, arithmetic operations, logical operations,
branching operations, and machine-control operations.

Data Transfer (Copy) Operations

This group of instructions copy data from a location called a source to another location called a
destination, without modifying the contents of the source. In technical manuals, the term data
transfer is used for this copying function. However, the term transfer is misleading; it creates the
impression that the contents of the source are destroyed when, in fact, the contents are retained
without any modification. The various types of data transfer (copy) are listed below together
with examples ofeach type:

Arithmetic Operations
These instructions perform arithmetic operations such as addition, subtraction, increment, and
decrement.
Addition - Any 8-bit number, or the contents of a register or the contents of a memory location
can be added to the contents of the accumulator and the sum is stored in the accumulator. No two
other 8-bit registers can be added directly (e.g., the contents of register B cannot be added

directly to the contents of the register C). The instruction DAD is an exception; it adds 16-bit
data directly in register pairs.
Subtraction - Any 8-bit number, or the contents of a register, or the contents of a memory
location can be subtracted from the contents of the accumulator and the results stored in the
accumulator. The subtraction is performed in 2's compliment, and the results if negative, are
expressed in 2's complement. No two other registers can be subtracted directly.
Increment/Decrement - The 8-bit contents of a register or a memory location can be
incremented or decrement by 1. Similarly, the 16-bit contents of a register pair (such as BC) can
be incremented or decrement by 1. These increment and decrement operations differ from
addition and subtraction in an important way; i.e., they can be performed in any one of the
registers or in a memory location.

Logical Operations
These instructions perform various logical operations with the contents of the accumulator.
AND, OR Exclusive-OR - Any 8-bit number, or the contents of a register, or of a memory
location can be logically ANDed, Ored, or Exclusive-ORed with the contents of the accumulator.
The results are stored in the accumulator.
Rotate- Each bit in the accumulator can be shifted either left or right to the next position.
Compare- Any 8-bit number, or the contents of a register, or a memory location can be
compared for equality, greater than, or less than, with the contents of the accumulator.
Complement - The contents of the accumulator can be complemented. All 0s are replaced by 1s
and all 1s are replaced by 0s.

Branching Operations
This group of instructions alters the sequence of program execution either conditionally or
unconditionally.
Jump - Conditional jumps are an important aspect of the decision-making process in the
programming. These instructions test for a certain conditions (e.g., Zero or Carry flag) and alter
the program sequence when the condition is met. In addition, the instruction set includes an
instruction called unconditional jump.
Call, Return, and Restart - These instructions change the sequence of a program either by
calling a subroutine or returning from a subroutine. The conditional Call and Return instructions
also can test condition flags.

Machine Control Operations

These instructions control machine functions such as Halt, Interrupt, or do nothing.
The microprocessor operations related to data manipulation can be summarized in
four functions:
1. Copying data

2. Performing arithmetic operations

3. Performing logical operations
4. Testing for a given condition and alerting the program sequence
Some important aspects of the instruction set are noted below:
1. In data transfer, the contents of the source are not destroyed; only the contents of
the destination are changed. The data copy instructions do not affect the flags.
2. Arithmetic and Logical operations are performed with the contents of the
accumulator, and the results are stored in the accumulator (with some
expectations). The flags are affected according to the results.
3. Any register including the memory can be used for increment and decrement.
4. A program sequence can be changed either conditionally or by testing for a given
data condition.

Instruction Format
An instruction is a command to the microprocessor to perform a given task on a specified data.
Each instruction has two parts: one is task to be performed, called the operation code (opcode),
and the second is the data to be operated on, called the operand. The operand (or data) can be
specified in various ways. It may include 8-bit (or 16-bit ) data, an internal register, a memory
location, or 8-bit (or 16-bit) address. In some instructions, the operand is implicit.
INSTRUCTION FORMAT OF 8085
The 8085 have 74 basic instructions and 246 total instructions. The
i n s t r u c t i o n s e t o f 8 0 8 5 i s defined by the manufacturer Intel Corporation. Each instruction
of 8085 has 1 byte opcode. With 8 bit binary code, we can generate 256 different binary
codes. In this, 246 codes have been used for opcodes.

Instruction word size

The 8085 instruction set is classified into the following three groups according to
word size:
1. One-word or 1-byte instructions
2. Two-word or 2-byte instructions
3. Three-word or 3-byte instructions
In the 8085, "byte" and "word" are synonymous because it is an 8-bit microprocessor.
However, instructions are commonly referred to in terms of bytes rather than words.

One-Byte Instructions
A 1-byte instruction includes the opcode and operand in the same byte. Operand(s)
are internal register and are coded into the instruction.

For example:

These instructions are 1-byte instructions performing three different tasks. In the first
instruction, both operand registers are specified. In the second instruction, the operand
B is specified and the accumulator is assumed. Similarly, in the third instruction, the
accumulator is assumed to be the implicit operand. These instructions are stored in 8bit binary format in memory; each requires one memory location.
MOV rd, rs
rd rs copies contents of rs into rd.
Coded as 01 ddd sss where ddd is a code for one of the 7 general registers which is
the destination of the data, sss is the code of the source register.
Example: MOV A,B
Coded as 01111000 = 78H = 170 octal (octal was used extensively in instruction
design of such processors).
ADD r
AA+r

Two-Byte Instructions
In a two-byte instruction, the first byte specifies the operation code and the second
byte specifies the operand. Source operand is a data byte immediately following the
opcode. For example:

Assume that the data byte is 32H. The assembly language instruction is written as

The instruction would require two memory locations to store in memory.

MVI r,data
r data
Example: MVI A,30H coded as 3EH 30H as two contiguous bytes. This is an
example of immediate addressing.
ADI data
A A + data
OUT port
where port is an 8-bit device address. (Port) A. Since the byte is not the data but
points directly to where it is located this is called direct addressing.

Three-Byte Instructions
In a three-byte instruction, the first byte specifies the opcode, and the following two
bytes specify the 16-bit address. Note that the second byte is the low-order address
and the third byte is the high-order address.
opcode + data byte + data byte
For example:

This instruction would require three memory locations to store in memory.

Three byte instructions - opcode + data byte + data byte
LXI rp, data16
rp is one of the pairs of registers BC, DE, HL used as 16-bit registers. The two data
bytes are 16-bit data in L H order of significance.
rp - data16
Example:
LXI H,0520H coded as 21H 20H 50H in three bytes. This is also immediate
addressing.
;_-3?_p

DATA TRANSFER INSTRUCTIONS

Output data from accumulator to a port

with 8-bit address

Input data to accumulator from a port

with 8-bit address

ARITHMETIC INSTRUCTIONS

Subract register or memory from

accumulator

Subract register or memory from

accumulator with borrow

BRANCHING INSTRUCTIONS

Return from subroutine unconditionally

Load program counter with HL contents

Compare register or memory with

accumulator

Logical AND register or memory with

accumulator

Logical AND immediate with

accumulator

Exclusive OR register or memory with

accumulator

Exclusive OR immediate with

accumulator

Logical OR register or memory with

accumulator

Logical OR immediate with accumulator

CONTROL INSTRUCTIONS

8085 Assembly Language Programs & Explanations1. Statement

: Store the data byte 32H into memory location 4000H.
P r o g r a m
M V I
S T A

A ,

1 :
3 2 H

4 0 0 0 H

a d d r e s s

C o p y

4 0 0 0 H

e x e c u t i o n

S t o r e

H L T

3 2 H

i n

t h e

a c c u m u l a t o r
:

T e r m i n a t e

a c c u m u l a t o r

c o n t e n t s

p r o g r a m

a t

P r o g r a m
M

S t o r e

r e g i s t e r
H L T

2 :

L X I

3 2 H

i n

p a i r

L o a d

m e m o r y

( 4 0 0 0 H )

T e r m i n a t e

p r o g r a m

2. Statement:

H L

w i t h

l o c a t i o n

4 0 0 0 H

M V I

p o i n t e d

b y

H L

e x e c u t i o n

Exchange the contents of memory locations 2000H and 4000H

P r o g r a m

1 :

L D A

2 0 0 0 H

l o c a t i o n

2 0 0 0 H

M OV

B ,

L D A

4 0 0 0 H

S T A

2 0 0 0 H

l o c a t i o n

a t

A ,

r e g i s t e r
S T A

G e t

S av e
:

t h e

i n t o

t h e

G e t

t h e

Ge t

4 0 0 0 H

a d d r e s s

P r o g r a m

S t o r e

t h e

4 0 0 0 H

i n t o

c o n t e n t s

o f

a c c u m u l a t o r

s av ed

S t o r e

o f

a c c u m u l a t o r

t h e

2 0 0 0 H

c o n t e n t s

c on t en t s

4 0 0 0 H i n t o

a d d r e s s

M OV

a t

t h e

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