Proceedings of International Conference On Current Innovations In Engineering And Technology

ISBN : 978 - 1502851550

DESIGN AND IMPLEMENTATION OF PSEUDO RANDOM NUMBER GENERATOR

USED IN AES ALGORITHM
N.Madhavi (1) R.Viswanadham (2)
N.Madhavi(1), M.TECH Student, DEPARTMENT of ECE, Shri Vishnu Engg college for women
R.Viswanadham(2), ASST.PROFESSOR, DEPARTMENT of ECE, Shri Vishnu Engg college for women
ABSTRACT
This paper present a new Design for the
generation of Advanced encryption of (bit) data. The
Design opted to obtain this encrypted data is RMPRNG. This design also enhances the statistical
properties of a chaos-based logistic map pseudo
random number generator (PRNG) and extends the
system period length. The reseeding method removes
the short periods of the digitized logistic map and the
mixing method extends the system period length to
by XOring with a DX generator. This design also
attains the throughput rate of 6.4 Gb/s. The mixing
method extends the system period length by Xoring
with ALG and the reseeding method removes the
short periods which are occurred by CB-PRNG
Index Terms- pseudo random number generator
(PRNG), reseeding, Linear Congruential Generator
(LCG), Carry-Look ahead Adder (CLA), Gate
Equivalent (GE).
1. INTRODUCTION
Pseudo random number generator (PRNG) is an
algorithm for generating a sequence generator. PRNG
has been widely find applications in Monte carlo
generation, telecommunication systems, test pattern
generation.
A good PRNG should have characteristics of
1) Long-period random number sequence
2) Fit in statistical properties
3) A high throughput rate
4) Unpredictability

Linear PRNGs, such as linear feedback shift

registers (LFSRs), linear congruential generators
(LCGs), and multiple re- cursive generators (MRGs)
can produce long-period random number sequences.
Linear PRNGs when implemented gives efficient
throughput rate and hardware cost, but the output of
such Prngs can be predictable due to the linear
structure. Someone linear PRNGs in dealt with the
predictability problem but incurred higher hardware
cost and more process time . To overcome that
predictability problem non linear chaos-based PRNG
(CB-PRNG) is proposed. we propose a reseedingmixing PRNG (RM-PRNG) that consists of a CBPRNG and a long-period MRG. The reseeding
method removes the disadvantages of short periods
in CB-PRNG while the mixing of the CB-PRNG with
an MRG pushes the overall system period length to a
value (> 2253 in 32-b implementation ) based on
simple theoretical calculation. By outputting multiple
bits per iteration high throughput rate of (6.4 Gb/s) is
achieved. So there is a need to implement a design
which produce long periods and high throughput
rate. Thus RM-PRNG is proposed.
2. EXISTING SYSTEM
In general, mixing multiple CB-PRNGs results
in higher hardware cost, lower throughput rate, and
longer but unpredictable period length. Furthermore,
one cannot be sure that the random numbers
produced by these mixed PRNGs will have
acceptable statistical properties. Since higher
hardware cost is due to implementation of multiple
CB-PRNG switch are more complex than linear
PRNGs, mixing a CB-PRNG with a linear MRG
instead of mixing two CB-PRNGs will reduced the
hardware cost.

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Proceedings of International Conference On Current Innovations In Engineering And Technology

EXISTING SYSTEM DRAWBACKS

Hardware cost.
Lower Throughput Rate
unpredictable period length
Its not sure that the random numbers
produced by these mixed PRNGs will have
acceptable statistical properties.

3. PROPOSED DESIGN (RM-PRNG)

In our proposed RM-PRNG, which consists
of a CB-PRNG and an MRG, the period length is
considerably extended because the period length of
the MRG is much longer than that of the CB-PRNG
while the short periods of the CB-PRNG can be
removed by our reseeding algorithm. We can
analytically calculate the lower bound of the period
length in RM-PRNG in terms of the period length of
the CB-PRNG and that of the MRG. The
enhancement of throughput rate is achieved by using
a vector-mixing technique in the proposed RMPRNG. As the linear structure of the MRGs is broken
by mixing with a CB-PRNG, the statistical properties
will get improved.
4 .DESIGN APPROACH

ISBN : 978 - 1502851550

RM-PRNG is composed of three modules:

Non linear module, Reseeding module, Vector
mixing module. In a 32-b implementation , the
Non linear Module has a controlled 32-b state
register and a Next- state construction circuitry.
The controlled register stores the state value Xi
which can be set to seed 1 by the start command.
The Next - state construction circuitry produces the
next state
value according to the recursive
formula. For each
state value generated, the
reseeding control unit (RCU) in the Reseeding
Module compares the values of and for checking the
fixed point condition and increases the reseeding
counter (RC) at the same time. The RC will be reset
and the reseeding operation will be activated when
either the fixed point condition is detected or the RC
reaches the reseeding period.
4.1 NONLINEAR MODULE
For Next state construction , LCM is used
in the Non linear Module so that

with
and
as an initial seed.
Choosing a value 4 for not only makes the LGM
chaotic but also simplifies the implementation of
equation to merely left-shifting the product of Xt
and 1-Xt by 2 b. The state size decreases from 32 to
31 b, as the dynamics and in the equation are the
same. This is equivalent to a degradation of
resolution by 1 b. In addition, fixed points (at Xt=0
and 0.75) as well as short periods exist when the
LGM is digitized. From exhaustive runs for all of the
seeds, we obtain all other periods for the 32-b LGM
without reseeding. The performance of a CB-PRNG
using only the Nonlinear Module is unsatisfactory.
So, to solve the fixed points and short-period
problem, a new Reseeding Module is in proposed.
4.2 RESEEDING MODULE

Fig.1 Structure of the proposed RM-PRNG

Reseeding mechanism is obvious for the

removal of the fixed points. When the reseeding
period is reached or fixed point condition is detected,
the value Zt+1 loaded to the state register will be
perturbed away from Xt+1 in the RCU by the fixed
pattern according to the formula

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Proceedings of International Conference On Current Innovations In Engineering And Technology

ISBN : 978 - 1502851550

4.3.1 DX GENERATOR

where subscripts i,j are the bit-index L is

integer, and
. Degradation of the statistical
properties of chaos dynamics can be minimized by
making the magnitude of the perturbation of the fixed
pattern R small compared with Xt. Here, we set L=5
so that the maximum relative perturbation is only
and the degradation can be ignored.
The effectiveness in the removal of short periods
depends on the reseeding pattern R and the reseeding
period Tr. for suitable combination of Tr and R. First,
the reseeding period should avoid being the values or
the multiples of the short periods Ts of the
unperturbed digitized LGM. Otherwise, if the 5 LSBs
of Xt+1 equal to R when the reseeding procedure is
activated, Zt+1 will be equal to Xt+1. Then no effective
reseeding will be realized and the system will be
trapped in the short period cycle. Hence, prime
numbers should be used as the reseeding period
candidate.

DX generator implementation is (the ALG)

done by using 8-word registers, circular-left-shift
(CLS), circular 3-2 counter and End Around Carrycarry look ahead adder (EAC-CLA). By using flipflops the eight-word register was implemented. For
generating two partial products signal Yt-7 is
circular-left-shifted 28 and 8 b, using the modules
CLS-28 and CLS-8 respectively. To combine these
three 31-b operands into two 31-b operands a circular
3-2 counter is used, which consumes 247 gates. To
evaluate Yt+1 31-b EAC-CLA is used with 348 gates.
The schematic design of the 31-b EAC-CLA [4], [9]
is shown in the below Figure. The schematic design
of the 31-b EAC-CLA includes four modules they are
propagation and generation (PG) generators, endaround-carry (EAC) generator, internal carry (IC)
generator, and CLAs .When EAC is generated by
group of PGs, EAC is then fed to the IC generator
and then to least-significant 8-b CLA. On CLAs, the
final addition was performed.
.

4.3 VECTOR MIXING MODULE

The DX generator which is an efficient
MRG serves as the ALG in Vector Mixing Module.
Specifically, we choose the DX generator with the
following recurrence equation:
Yt+1= Yt+ BDX . Yt-7 mod M,

t>=7

Using an efficient search algorithm[8], we find that

the particular choice of BDX =228+28and M=231-1
gives the maximum period of the DX generator. The
LSBs of Yt+1 and that of Xt+1 are mixed in the
Output Construction unit using a XOR operation to
obtain the least significant bits of the output
according to the equation

(a)

Fig.2 (a) Structure of the DX generator

OUTt+1[1:31] = Xt+1[1:31] (ex-or) Yt+1[1:31]

Then, the most significant bit (MSB) of
Xt+1 is attached to OUTt+1 [1:31] to form the full
32-b output vector OUTt+1.

(b)

(b) Structure of the 31-b EAC-CLA

5 . DIGITIZATION
Digitization is the process of converting
information into a digital format . In this format,
information is organized into discrete units of data

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(called bit s) that can be separately addressed (usually

in multiple-bit groups called byte s). This is
the binary data that computers and many devices with
computing capacity (such as digital camera s
and digital hearing aid s) can process.
Text and images can be digitized similarly:
a scanner captures an image (which may be an image
of text) and converts it to an image file, such as
a bitmap . An optical character recognition ( OCR )
program analyzes a text image for light and dark
areas in order to identify each alphabetic letter or
numeric digit, and converts each character into an
ASCII code.
we make digitization of the logistic map as
follows: Firstly, the chaotic sequence is generated
through Equations, which has to be amplified by a
scaling factor (10^4) and round to integer-sequence
according to Equations
Zk=round((xk *104)mod 256)
This transformation implies that, when the
randomly generated chaotic sequence (input values)
is uniformly distributed, the output of the digitization
process is also uniformly distributed Random
numbers have been used extensively in many
simulation applications like Monte Carlo Integration
or computer modeling. But recently security
applications have increased the need for strong
(secure) random number generation like automatic
password generation, encryption algorithms, on-line
gambling etc. Thus random number generation has
become a challenging and an interesting task. Most
classical random number generators, generate
sequences that are either linear or predictable hence
not suitable for cryptographic and security
applications. Others generate sequences that even
though they are secure they are not cryptographically
strong and above all are slow in execution. Also
recent advances in random number generation like
the construction of Multiple Recursive Generator
(MRG) with large orders, Fast Multiple Recursive.
Generator (FMRG) and DX (system of
multiple recursive generators proposed by Deng and
Xu generators does not generate a strong random

ISBN : 978 - 1502851550

number sequences. Though MRGs have extremely

long period of length with good empirical
performance, its recurrence equation can be solved
given a small set of its generated sequence, this
implies that MRGs and FMRGs are not strong
cryptographic generators. We propose an algorithm
that will transform linear sequences generated by
both classical LCG, MRGs, FMRGs and DX
generators and make them cryptographically strong
generators by hiding the entire sequence generated by
the generators, thus it will be difficult for
cryptanalyst to predict or infer the generator sequence
if even the partial sequence or the parameters or
knowledge of the algorithm used in the
transformation of the generators are known
Experimental results and tests have shown that
classical generators like LCGs that generate
pseudorandom linear sequences are not suitable for
cryptographic purposes, even though it is simple,
efficient and easy to generate. Other classical
generators like BBS, RSA, and BM etc that are
thought to be secure are equally not good enough for
cryptographic purposes as they are slow in generating
the next random bit sequence. Also the recent
advances in random number generation (MRGs and
FMRGs) are fast and efficient in generating linear
sequences with long periods and good empirical
performance, but still they are not cryptographically
strong as the linear system can be predicated using a
system of unique k equations. Our proposed
algorithm produces a strong pseudorandom sequence
that is suitable for cryptographic purposes and
difficult to predict/infer by transforming the linear
sequences and breaking its linear structure. The
transformation hides the linear bits of the generated
linear sequence preventing the attacker from
accessing the generated output sequence, even with
the knowledge of the partial sequence, parameters of
the generators and the algorithm used in transforming
the generator sequence. Thus knowing the parameters
and partial sequence of the generators does not pose
any threat any longer as the prediction of the
generator sequence will no longer be an easy one.
PROPOSED SYSTEM ADVANTAGES:
High Throughput Rate
Less hardware cost

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6 . SIMULATION RESULTS
RC (Reseeding counter )

ISBN : 978 - 1502851550

generator extends the period length to the

theoretically calculated value greater than 2253 when it
is get mixed with the CB_PRNG . Replacing a
hardware-demanding CB-PRNG with a hardwareefficient MRG, the hardware cost is reduced and the
hardware efficiency achieves 0.538 Mb/s-gate. Due
to the generation of multiple random bits in an
iteration by the RM-PRNG, the high throughput rate
( > 6.4 Gb/s) is attained. By improving the statiscal
properties of the reseeding method the randomness
will be enhanced. The generated random number
sequences by the proposed RM-PRNG pass all the
tests in NIST SP 800-22 test suite. Because of these
benefits the proposed nonlinear RMPRNG can serve
as a good technique in the cryptographic applications
and telecommunication.
FUTURE SCOPE

FINAL OUTPUT (Random number sequence)

Reseeding-Mixing method, proposed design

supports higher throughput and lower hardware cost
and generates a unpredictable random number
sequence. So, that sequence can be used as a secret
key in encryption and decryption circuits.
REFERENCES
[1] J. E. Gentle, Random Number Generation and
Monte Carlo Methods, 2nd ed. New York:
SpringerVerlag, 2003.
[2] M. P. Kennedy, R. Rovatti, and G. Setti, Chaotic
Electronics in Telecommunications. Boca Raton, FL:
CRC, 2000.
[3] D. Knuth, The Art of Computer Programming,
2nd ed. Reading, MA: Addison-Wesley, 1981.
[4] A. Klapper and M. Goresky, Feedback shift
registers, 2-adic span, and combiners with memory,
J. Cryptology, vol. 10, pp. 111147, 1997.
[5] D. H. Lehmer, Mathematical methods in
largescale computing units, in Proc. 2nd Symp.
Large Scale Digital Comput. Machinery, Cambridge,
MA, 1951, pp. 141146, Harvard Univ. Press.

7. CONCLUSION
The proposed reseeding mechanism solves
the short-period problem originated from the
digitization of the chaotic map. The long-period DX

[6] P. C. Wu, Multiplicative, congruential

randomnumber generators with multiplier
and
modulus , ACM Trans. Math. Software, vol. 23, pp.
255265, 1997.

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www.iaetsd.in

Proceedings of International Conference On Current Innovations In Engineering And Technology

ISBN : 978 - 1502851550

[7]
L. Y. Deng and H. Xu, A system of
highdimensional, efficient, longcycle and portable
uniform random number generators,
ACM
Trans.ModelComput. Simul., vol. 13, no. 4, pp. 299
309, Oct. 1, 2003.
[8] L. Y. Deng, Efficient and portable multiple
recursive generators of large order, ACM Trans.
Modeling Comput. Simul., vol. 15, no. 1, pp. 113,
Jan. 2005.
[9] L. Blum, M. Blum, and M. Shub, A simple
unpredictable pseudo- random number generator,
SIAM J. Comput., vol. 15, pp. 364383, 1986.
[10] B. M. Gammel, R. Goettfert, and O. Kniffler,
An NLFSR-based stream cipher, in Proc. IEEE Int.
Symp. Circuits Syst., 2006, pp. 29172920.
[11]D.Mukhopadhyay,D.R.Chowdhury,andC.Rebeiro
,Theory of composing non-linear machines with
predictable cyclic structures,inProc. 8th Int. Conf.
Cellular Autom. Res. Ind., 2008, pp. 210219,
Springer.
[12]D.Mukhopadhyay,Grouppropertiesofnonlinearc
ellularautomata, J. Cellular Autom., vol. 5, no. 1, pp.
139155, Oct. 2009.

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