Interface Communication Protocol

Version DBS 1.2

Originally taken from the X10 web page Dec 25, 1996.
Some mistakes corrected. DBS Jan 1, 1996
Updated Jan 24 to match the Jan 6th version of X10's doc. The main
difference was the cable pin-out.
1.

X-10 Transmission Coding (overview).

1.1

Housecodes and Device Codes.

The housecodes and device codes range from A to P and 1 to 16

respectively although they do not follow a binary sequence. The encoding
format for these codes is as follows
Housecode
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
P
1.2

Device Code
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

Binary Value
0110
1110
0010
1010
0001
1001
0101
1101
0111
1111
0011
1011
0000
1000
0100
1100

Function Codes.
Function
All Units Off
All Lights On
On
Off
Dim
Bright
All Lights Off
Extended Code
Hail Request
Hail Acknowledge
Pre-set Dim (1)
Pre-set Dim (2)
Extended Data Transfer
Status On
Status Off
Status Request

Binary Value
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111

NOTE: The only devices that I own that respond to the status request
command are the RR501 RF receivers. If anyone knows of others I'd like
to hear about them.
2.

Serial Parameters.

The serial parameters for communications between the interface and PC

are as follows:
Baud Rate:
Parity:
Data Bits:
Stop Bits:

4,800bps
None
8
1

2.1 Cable connections:

Signal
SIN
SOUT
GND
RI
where: SIN
SOUT
GND
RI

DB9
Pin
Pin
Pin
Pin

Connector
2
3
5
9

RJ11 Connector
Pin 1
Pin 3
Pin 4
Pin 2

Serial input to PC (output from the interface)

Serial output from PC (input to the interface)
Signal ground
Ring signal (input to PC)

3.

X-10 Transmission.

3.1.

Standard Transmission.

An X-10 transmission from the PC to the interface typically refers to

the communication of a Housecode and Device Code combination or the
transmission of a function code. The format of these transmissions is:
2
1
1
1

bytes
byte
byte
byte

PC
Header:Code

Interface
checksum

Acknowledge
interface ready to receive

This format is typical of all transmissions between the PC and the

interface with the difference being in the first transmission from the
PC.
3.1.1. Header:Code.
The Header:Code combination is configured thus:
Bit:
7 6 5 4
Header: < Dim amount

3
>

2 1 0
1 F/A E/S

Where:
Dim amount (dims) is a value between 0 and 22 identifying the number of dims to
be transmitted (22 is equivalent to 100%)
Bit 2 is always set to '1' to ensure that the interface is able to
maintain synchronization.
F/A defines whether the following byte is a function (1) or address (0).
E/S defines whether the following byte is an extended transmission (1)
or a standard transmission (0).

Bit:
7 6 5 4
Address: < Housecode >
Function:< Housecode >

3 2 1 0
<Device Code>
< Function >

Note the function only operates for devices addressed with the same Housecode.
3.1.2. Interface Checksum and PC Acknowledge
When the interface receives a transmission from the PC, it will sum all
of the bytes, and then return a byte checksum. If the checksum is
correct, the PC should return a value of 0x00 to indicate that the
transmission should take place. If however, the checksum is incorrect,
then the PC should again attempt to transmit the Header:Code combination
and await a new checksum.
3.1.3. Interface Ready to Receive.
Once the X-10 transmission has taken place (and this may be quite time
consuming in the case of Dim or Bright commands) the interface will send
0x55 to the PC to indicate that it is in a 'ready' state.
3.1.4. Example.
PC
0x04,0x66

Interface
0x6a

0x00
0x55
0x04,0x6e
0x72
0x00
0x55
0x86,0x64
0xe0
0x86,0x64
0xea
0x00
0x55

Description
Address A1
Checksum ((0x04 + 0x66)&0xff)
OK for transmission.
Interface ready.
Address A2
Checksum ((0x04 + 0x6e)&0xff)
OK for transmission.
Interface ready.
Function: A Dim 16/22*100%
Incorrect checksum.
Function re-transmission
Checksum ((0x86 + 0x64)&0xff)
OK for transmission.
Interface ready.

This transmission will address lamp modules A1 and A2, and then dim them
by 72%. Note multiple addresses cannot be made across housecodes, i.e.
A1, B2 Dim 72% is not valid, and would result in B2 being dimmed by
72%.
3.2.

Extended X-10 Transmission.

Extended X-10 transmission is simply an extension of the protocol to

allow two additional bytes of extended data to be transmitted. In this
case, the protocol may be shown as:
4
1
1
1

bytes
byte
byte
byte

PC
Interface
Header:Code:Data:Command
checksum
Acknowledge
interface ready to receive

The header for an extended transmission is always:

Bits: 7
Header: 0

6
0

5
0

4
0

3
0

2
1

1
1

0
1

Bits 7 to 3 are always zero because the dim level is not applicable to
extended transmissions.
Bit 2 must be set to '1' as in all PC header transmissions.
Bit 1 is set to '1' as the extended transmission is always a function.
Bit 0 is set to '1' to define an extended transmission rather than a
standard transmission.
The function byte is:
Bits:
7 6 5 4
Function: < Housecode >

3
0

2
1

1
1

0
1

Again, the housecode must be the same as any previously addressed

modules, and for extended data, the function code must be 0111.
Finally, the data and command bytes may take any value between 0x00 and 0xff.
Note that the checksum is one byte and is defined as:
checksum = (header + code + data + command)&0xff
4.

X-10 Reception.

Whenever the interface begins to receive data from the power-line, it

will immediately assert the serial ring (RI) signal to initiate the
wake-up procedure for the PC. Once the data reception is complete, the
interface will begin to poll the PC to upload its data buffer (maximum
10 bytes). If the PC does not respond, then the interface's data buffer
will overrun, and additional data will not be stored within the buffer.
4.1.

Interface Poll Signal.

In order to poll the PC, the interface will continually send:

bits:
Poll:

7
0

6
1

5
0

4
1

3
1

2
0

1
1

0
0

(0x5a)

This signal will be repeated once every second until the PC responds.
4.2.

PC Response to the Poll Signal.

To terminate the interface's polling and initiate the data transfer, the
PC must send an acknowledgment to the interface's poll signal. This
acknowledgment is:
bits:
Ack :

7
1

6
1

5
0

4
0

3
0

2
0

1
1

0
1

(0xc3)

Notice that bit #2 of the PC transmission is not set, indicating that

this cannot be the beginning of a transmission from the PC.
4.3.

Interface Serial Data Buffer.

The buffer consists of 10 bytes defined as follows:

Byte
0
1
2
3
4
5
6
7
8
9

Function
Upload Buffer Size
Function / Address Mask
Data Byte #0
Data Byte #1
Data Byte #2
Data Byte #3
Data Byte #4
Data Byte #5
Data Byte #6
Data Byte #7

The interface will only upload the specified number of bytes within
the buffer, and will not default to uploading 10 bytes in every
transmission. The number of bytes to receive is thus specified in byte
0 of the transmission. The counting of the number of bytes starts at
the mask (shown as byte 1).
The function address mask indicates whether the following 8 bytes
should be interpreted as an address or as a function. The position of
the bit in the mask corresponds to the Data byte index within the data
buffer. If the bit is set (1), the data byte is defined as a function,
and if reset (0), the byte is an address. Bit 0 coresponds to Data Byte 0.
The data bytes are in the same format as for the Code byte in the X-10
transmissions (i.e. Housecode:Device Code or Housecode:Function).
Note that once the data buffer has been uploaded, there is no
acknowledgment from the PC to the interface as the contents of the
serial data buffer will have been changed. This will not cause a problem
as this is simply informing the PC of the external status, rather than
controlling a device (as in the case of the PC transmission) which may
have safety implications.
4.4.

Dim or Bright.

After a dim or bright code, the PC will expect the following byte to be
the change in brightness level. An X-10 module has 210 discrete
brightness levels, and therefore this byte will be equivalent to a
brightness change of n/210*100%.
4.5.

Extended Code.

Extended code is processed in a similar way to Dim and Bright, except

that the PC will expect two bytes, which are the Data and Command
bytes.
4.6.

Example.
PC

Interface
0x5a

0xc3
0x06
0x04
0xe9
0xe5
0xe5

Description
Poll from interface.
'PC Ready' Response from PC
6 byte transmission
xxxx x100-> byte 0,1 addresses,
2 function
B6
B7
B Bright

0x58

0x58/210 * 100%

This transmission will wake the computer, and then indicate that a
transmission of length 5 bytes will occur, data bytes 0 and 1 are
addresses and byte 2 is a bright function, which means that the
following byte is the change in brightness level.
5.

Fast Macro Download.

The interface contains a 42 byte buffer which contains macro codes.

These macro codes are initiated upon the reception of a pre-defined
address (i.e. B7), and the code specifies the transmissions that the
interface should then make. Due to the shortage of bytes, the macro code
is 'compressed' by grouping similar functions.
Note, any error in the function codes may result in the interface
entering an endless loop and becoming 'locked-up', so steps should be
taken to ensure that the code is correct prior to transmission.
If the interface detects that it has suffered a power-down situation, it
will ring the PC and poll with a specialized code to indicate that the
macros must be refreshed.
5.1.

Power-fail Macro Download Poll Code.

NOTE: I beleive that this is mainly for the CP10. The
backed CM11 does send this poll after a power failure,
responds to a setclock directive rather than the macro
It waits till the resumption of power before it starts
DBS, Jan 1, 1997

battery
but it
download.
sending this byte.

In order to poll the PC, the interface will continually send:

Poll:
Value:

7
1

6
0

5
1

4
0

3
0

2
1

1
0

0
1

(0xa5)

This signal will be repeated once every second until the PC responds with
a clock update ( 0x9b see section 8).
5.2.

PC Response to Macro Download Poll Code.

To stop the polling, the PC must respond with:

PC Response:
Value
:

7
1

6
1

5
1

4
1

3
1

2
0

1
1

0
1

Once this has been transmitted, the macro must be immediately

downloaded. At this stage, the interface will wait until the 42 byte
macro has been received before any X-10 transmissions can occur.
5.3.

Macro Code (CM10).

Macro code is divided into individual macros, and functional groups

within the macros. The only limit to the number of macros and groups is
the number of available storage bytes.
Each macro begins with an initiator byte which details the Housecode and
Device code that will cause the macro to start.
Following the initiator byte is the length of this current macro, and

(0xfb)

the functional trigger (ie On or Off functions). The length is defined

by the lower 7 bits, and the functional trigger by the most significant
bit. If the most significant bit is set, the functional trigger is 'On',
and if reset, the functional trigger is 'Off'.
As mentioned previously, the macro is divided into functional groups,
and each group has a byte indicating the length of the group before the
macro is defined. This group length byte is exclusive of the function
code.
The group is then made up of a common housecode (1 nibble), followed by
a number of device codes (each takes 1 nibble) and finally a function
code (1 nibble). If the function code falls on a byte boundary, then it
is always the low nibble of the byte.
All unused bytes must take a value of 0x00.
5.3.1. Dimming and Brightening within a macro.
If the function is a bright or dim, then the next byte specifies the
change in brightness level in 22 steps. Note if the most significant bit
of this byte is set, the interface will send out enough bright commands
to ensure that the associated lamps are at 100%, and then dim the lamp
by the specified value.
5.3.2. Extended codes in macros.
Extended code cannot be grouped as for other functions, and consequently
an extended code group would be defined as:
Byte
0x01
0xa7
0x03
0xff
0x55

Description
Group length
Housecode D (1010 = D), Extended code function
Device code 11 (0011 = 11)
Data byte: 0xff
Command byte: 0x55

5.3.3. Checksum.
Once the macro has been downloaded, the interface calculates the 1 byte
checksum by summing all 42 bytes of the macro code (not including the PC
macro download start byte) and returns the appropriate value. If the
value is incorrect, the PC should again initiate the macro download by
transmitting the PC macro download start byte.
5.3.4. Example.
PC
0xfb
0x26
0x0a
0x04
0x66
0x2e
0x04
0x0b

Interface
0xa5

Description
Power-fail, macro poll.
Macro download start byte
Initiator C1
Functional Trigger: 'Off';
Macro length: 10 bytes
Group length: 4 nibbles
Macro housecode, A, device 1
Devices 2 and 3
Dim
Dim by 11/22*100% = 50%

0x02
0x6a
0x02

group length: 2 nibbles

Macro housecode, A, device 4
Function: On

0x26
0x8c

Initiator C1
Functional Trigger: 'On';
Macro length: 12 bytes
Group length: 2 nibbles
Macro housecode, A, device 1
Function: On
Group length: 3 nibbles
Macro housecode, A, device 2
Device 3, Function Dim (0100)
Dim by 6/22*100% = 27%
Group length: 2 nibbles
Macro housecode, A, device 4
Function: Off

0x02
0x66
0x02
0x03
0x6e
0x42
0x06
0x02
0x6a
0x03
0x00...

Remaining 20 bytes set to 0x00

Macro checksum: 0x91
Checksum correct
Interface ready

0x91
0x00
0x55
5.4.

EEPROM Code (CM11 and CP10).

The EEPROM code for the CM11 and CP10 contains both the downloaded
timers and also the macro data. The timers are resolved into 'pseudomacros' with the only difference being in the initiator (ie a timer as
opposed to a macro code).
In other words, a timer points to a macro. The timer initiator table is
checked every minute to see if any of the entrys should trigger
a macro. Macro initiators, on the other hand, are checked anytime an
X10 signal is detected over the power lines.
The EEPROM may be broken down into four categories:
Macro
Timer
Macro
Macro

Offset
Initiators
Initiators
Data.

(two bytes)
(continues until an 0xff byte)
(continues to start of macro offset)

5.4.1. Macro Offset.

The first two bytes of the EEPROM contain an offset to the macro
initiator table. The macro initiator table is offset rather than the
timers as the timers must be processed every minute, whereas the macros
are only processed whenever an X-10 transmission event is detected.
5.4.2. Timer Initiator.
The timers reside from address 0x0002 in the EEPROM and are delimited by
a 0xff at the end of the table. Each timer entry contains the following
data:
Bit range
71
70 to 64
63 to 56
55 to 48

Description
Reserved
Day of the week mask (bit 1 = Sunday, bit 7 = Saturday)
Start day range (day of the year) bits 0 to 7)
Stop day range (bits 0 to 7)

47 to 44
43 to 40
39
38 to 32
31
30 to 24
23 to 20
19 to 16
15 to 8
7 to 0

Event start time x 120 minutes

Event stop time x 120 minutes
Start day range (bit 8)
Event start time (0 to 120 minutes, bits 0 to 6)
Stop day range (bit 8)
Event stop time (0 to 120 minutes, bits 0 to 6)
Start event macro pointer (bits 8 to 11)
Stop event macro pointer (bits 8 to 11)
Start event macro pointer (bits 0 to 7)
Stop event macro pointer (bits 0 to 7)

The day of the week and day of the year are anded, so both have to match the
current time before the event will trigger a macro.
The event macro pointer has the address of the macro that will be executed
when this event is triggered.
5.4.3. Macro Initiator.
The macro initiators are configured thus:
Bit range
23 to 20
19 to 16
15
14 to 12
11 to 0

Description
Initiator house code
Initiator device code
Initiator function ('1' = on, '0' = off)
Reserved
Macro pointer (bits 0 to 11)

5.4.4. Macro data.

Macro data starts with a timer offset in minutes (0 for instant to 240
for 4 hours). Following the timer offset is the number of elements
within the macro (1 to 255). This is followed by the macro elements
themselves:
The macro elements are configured as follows:
Basic command:
Bit range
23 to 20
19 to 16
15 to 0

Description
Command house code
Command function
X10 format device bitmap

Bright or dim commands:

Bit range
31 to 28
27 to 24
23 to 8
7
6 to 5
4 to 0

Description
Command house code
Command function
X10 format device bitmap
Brighten first ('1') or simply dim ('0')
Reserved
Dim value (ranging from 0 to 22)

Extended data commands:

Bit range

Description

47
43
39
23

to
to
to
to

44
40
24
0

Command house code

Command function
X10 format device bitmap
Extended code data

Note: The timer offsets are relative to the previous timer value.
5.4.5. EEPROM Data Transfer.
The EEPROM is downloaded to the interface in blocks of 19 bytes. The
first byte is the macro download initiator command byte (0xfb), followed
by two bytes containing the actual EEPROM address (this does not need to
be sequential, although it must not cross the 16 bit page boundary). 16
bytes of EEPROM data follows the EEPROM address.
Once the interface has received the EEPROM data, it will return a
checksum. If the checksum is correct, the PC will acknowledge (0x00) and
after the data has been programmed into the EEPROM, the interface will
return a 'ready' command (0x55) to indicate that it is available to
process PC requests.
5.4.6. Example.
PC

Interface

Description

0xfb

EEPROM download start byte

(first block of data)

0x00
0x00

EEPROM address 0x0000 (lo byte)

(hi byte)

0x00
0x0c

EEPROM offset to macro initiators 0x000c

(hi byte)

0x3e
0x00
0x6d
0x49

Day mask x 0111110 (.FTWTM.)

Start day [0..7]
Stop day [0..7]
(Event start time, Event stop time)
x 120 minutes
Start day range [8],
Event start time [0..6]
Stop day range [8],
Event stop time [0..6]
Start macro pointer [8..11], Stop
macro pointer [8..11]
Start macro pointer [0..7]
Stop macro pointer [0..7]

0x00
0x80
0x00
0x1d
0x22

Summary: Start day: 0x000 (Jan 1)

Stop day: 0x16d (Dec 31)
Start time: 4 x 120mins = 08:00
Stop time: 9 x 120mins = 18:00
Start macro pointer: 0x01d
Stop macro pointer: 0x022
0xff

Timer table delimiter

0x6a

Macro initiator house and device

code (A4)
Macro function (On)

0x80

0x11

Macro pointer (0x011)

0xff
0xb8
0x00

Checksum from the interface

Checksum correct

0x55

Programming complete. Interface ready.

0xfb

Second block of data

0x00
0x10

EEPROM start address (lo byte)

EEPROM start address (hi byte)

0xff

Macro table delimiter

0x00
0x01
0x64
0x00
0x40
0x0b

Macro: instant
1 element
House code A, function Dim

0x0f
0x01
0x64
0x00
0x40
0x80

Macro: delayed by 15 minutes

1 element
House code A, function Dim

0x00
0x01
0x62

Macro: instant
1 element
House code A, function On

Bitmap: device #1
Dim level 11/22 = 50%

Bitmap: device #1
Brighten to 100%

0x56
0x00

Checksum from the interface

Checksum correct

0x55

Programming complete

0xfb

Third block of data

0x00
0x20

EEPROM start address

0x00
0x04

Bitmap: device #3

0x00
0x01
0x63
0x00
0x04

Macro: instant
1 element
House code A, function Off

0x00

Zero pad for remainder

of the data stream

0x00
0x00
0x00

Bitmap: device #3

0x00
0x00
0x00
0x00
0x00
0x8c

Checksum from the interface

Checksum correct

0x55

Programming complete

0x00

6.

Serial Ring Disable

If may be required, for the sake of 'trouble-shooting' to disable the

serial ring (RI) signal, although undesirable as macros held within the
computer will not operate, nor will the computer be able to track the
system status.
The following protocol will allow the serial ring (RI) signal to be
enabled and disabled:
Enable Ring:
PC
0xeb

Interface
0xeb

0x00
0x55

Description
Enable the ring signal
Checksum
Checksum correct
Interface ready

Disable Ring:
PC
0xdb

Interface
0xdb

0x00
0x55

Description
Disable the ring signal
Checksum
Checksum correct
Interface ready

The default state of the serial ring (RI) signal after a power on reset
is enabled.
7.

EEPROM Address (executed via macro initiator).

This command is purely intended for the CM11 and CP10.

When the interface receives a fast macro initiator, or when a timer
event is processed, it will immediately perform an asynchronous
transmission of the EEPROM address that is subsequently processed.
The command is of the form:
0x5b
0xhh
0xll

EEPROM address transmission

High byte of macro EEPROM address
Low byte of macro EEPROM address

This transmission is a one time transmission, and requires no

hand-shaking as the interface may not be connected to the PC.
8.

Set Interface Clock.

This command is purely intended for the CM11 and CP10.

The PC can set the interface clock with an unsolicited transmission at
any time. In addition, once the interface detects the absence of power,
it will request the current time from the PC when the PC is available as
follows:
CM11:
For a CM11, the time request from the interface is:

0xa5.

The PC must then respond with the following transmission

Note: The bit range is backwards from what you'd expect in serial
communications. Bit 55-48 is actually the first byte transmitted,
etc. To make matters worse, the bit orientation is correct within
the bit range, IE bits 4-7 of byte 6 _IS_ the monitored house code.
Further, bits 0 and 1 of byte 6 appear to be flipped. I get a
"monitor status clear" if bit 0 is set.
The original docs had bit 23 as part of current hours AND day.
DBS Jan 1, 1997
Bit range
55 to 48
47 to 40
39 to 32
31 to 24
23 to 15
14 to 8
7 to 4
3
2
1
0

Description
timer download header (0x9b)
Current time (seconds)
Current time (minutes ranging from 0 to 119)
Current time (hours/2, ranging from 0 to 11)
Current year day (MSB is bit 15)
Day mask (SMTWTFS)
Monitored house code
Reserved
Battery timer clear flag
Monitored status clear flag
* See note
Timer purge flag
* See note

CP10:
For a CP10, the time request is from the interface is: 0xa6.
The PC must then respond with the following transmission
Note: same as for the CM11.
Bit range
63 to 56
55 to 48
47 to 40
39 to 32
31 to 23
22 to 16
15 to 12
11
10
9
8
7 to 4
3 to 0

Description
Timer download header (0x7sb)
Current time (seconds)
Current time (minutes ranging from 0 to 119)
Current time (hours/2, ranging from 0 to 11)
Current year day
Day mask (SMTWTFS)
Monitored house code
Reserved
Battery timer clear flag
Monitored status clear flag
Timer purge flag
Power strip house code
Power strip device code

(byte
(byte
(byte
(byte
(byte
(byte
(byte

0)
1)
2)
3)
4+.1)
5-.1)
6...)

9.

Status Request.

This command is purely intended for the CM11 and CP10.

The PC can request the current status from the interface at any time as
follows:
CM11:
For a CM11, the status request is:

0x8b.

The status request is immediately followed by:

Note: This is really interesting. The btye order is reversed per
the note in section 8. The last 3 bytes are each mapped to show a
1 in the bit position if the unit with value equating to the nibble
(section 1) is set. Low byte comes first, hi byte second.
Example: if unit 1 is on, the nibble = 6, so the mask
would show 00...0100000
Note also that the hi bit of byte 6 must be multiplied by 256 and added to
the decimal value of byte 5 (+1) to find the Julian date.
DBS Jan 1, 1997
Bit range
111 to 96
95 to 88
87 to 80
79 to 72
71 to 63
62 to 56
55 to 52
51 to 48
47 to 32
31 to 16
15 to 0

Description
Battery timer (set to 0xffff on reset)
Current time (seconds)
Current time (minutes ranging from 0 to 119)
Current time (hours/2, ranging from 0 to 11)
Current year day (MSB bit 63)
Day mask (SMTWTFS)
Monitored house code
Firmware revision level 0 to 15
Currently addressed monitored devices
On / Off status of the monitored devices
Dim status of the monitored devices

CP10:
For a CP10, the status request is:

0x6b.

The status request is immediately followed by:

Bit range
119 to 104
103 to 96
95 to 88
87 to 80
79 to 71
70 to 64
63 to 60
59 to 56
55 to 48
47 to 32
31 to 16
15 to 0
10.

Description
Battery timer (set to 0xffff on reset)
Current time (seconds)
Current time (minutes ranging from 0 to 119)
Current time (hours/2, ranging from 0 to 11)
Current year day
Day mask (SMTWTFS)
Monitored house code
Firmware revision level 0 to 15
Power strip house and device code
Currently addressed monitored devices
On / Off status of the monitored devices
Dim status of the monitored devices

Power-up Timer.

This command is purely intended for the CP10.

(Byte
(Byte
(Byte
(Byte
(Byte
(Byte
(Byte
(Byte
(Byte
(Byte
(Byte

0-1)
2 )
3)
4)
5+)
6-)
7 lo)
7 hi)
8-9)
10-11)
12-13)

The interface contains a power-up timer that will turn on the remote
controlled sockets once it elapses on the assumption that the computer
has failed to boot-up. If it receives a message ('Relay Open' or 'Relay
Close', see item 7) from the computer before the timer elapses, then the
time-out is canceled and the sockets configured in accordance with the
message.
The power-up timer is the fifth byte of the six byte transmission for
the scheduled ring, and it is split into two nibbles. The upper nibble
is a reload value and the lower nibble is the actual timer. Each timer
tick is 2 seconds, so the maximum timer value is 30 seconds.
10.1.

Transmission Protocol

The PC can define the delay after which the power strip will turn the
controllable outlets on and off after detecting the PC turning on and
off.
Bit range
55 to 48
47 to 40
39 to 32
31 to 24
23 to 16
15 to 12
11 to 8
7 to 4
3 to 0

Description
Power-up timer download header (0xcb)
Reserved (0x00)
Reserved (0x00)
Reserved (0x00)
Reserved (0x00)
Power-up time-out (multiples of 2 seconds, range = 0 to 30s)
Reserved (0x0)
Power-down time-out (multiples of 2 seconds, range = 0 to 30s)
Reserved (0x0)

The interface will respond with a checksum excluding the header. If

correct the PC should respond with 0x00, or download the correct value
again. The interface will terminate the transfer with 0x55 indicating
that it is ready to communicate with the PC.
11.

Relay Control.

This command is purely intended for the CP10.

The power-strip contains a relay that controls four extension sockets.
These sockets are controllable via the PC with the following commands:
Close Relay (sockets on):
PC
0xab

Interface
0xab

0x00
0x55

Description
Close the relay
Checksum
Checksum correct
Interface ready

Open Relay (sockets off):

PC
0xbb

Interface
0xbb

0x00
0x55
12.

Input Filter Fail.

Description
Open the relay
Checksum
Checksum correct
Interface ready

This command is purely intended for the CP10.

The power-strip contains an input filter and electrical surge protection
that is monitored by the microcontroller. If this protection should
become compromised (i.e. resulting from a lightening strike) the
interface will attempt to wake the computer with a 'filter-fail poll'.
This poll signal takes the form:
Poll:
Value:

7
1

6
1

5
1

4
1

3
0

2
0

1
1

0
1

(0xf3)

The poll signal will be repeated to the PC every second until the PC
responds with the default poll response:
PC Response:
Value:

7
1

6
1

5
1

4
1

3
0

2
0

1
1

0
1

(0xf3)