ESD Lab Manual PDF
ESD Lab Manual PDF
ENGINEERING COLLEGE
EC-2404 ELECTRONICS SYSTEM DESIGN
LAB MANUAL
PREPARED BY
Mr.S.Rajeshkumar (A.P/ECE)
Mr.M.Bharathkumar (A.P/ECE)
Mr.K.Salmaanyusuf (A.P /ECE)
LIST OF EXPERIMENTS
Exp.No
Page No
10
Ex. No.1
AIM:
To design, construct and test an instrumentation amplifier using IC 741 and vary its gain
from 1 to 100.
APPARATUS REQUIRED:
S.No
1
2
Range
IC 741
10k
1k
150
Quantity
4
10
4
1
1
DRB
4
5
6
Bread Board
&Connecting wires
Dual Power Supply
Rheostat
(0-100)
1
1
Ammeter
(0-250)A
Multimeter
As required
THEORY:
INSTUMENTATION AMPLIFIER:
Instrumentation amplifier is generally required in any measurement system
using electrical transducers to enhance signal levels often in low voltage less than mV. Also
it is required to provide impedance matching and isolation. When the desired input rides over a
common mode signal special amplifier are needed so that difference signals get amplified to
an acceptable level while the common mode signals get attenuated.
The physical quantities can be converted into electrical quantities by using
transducer. The output of the transducer needs to be amplified to get the meter readings. This
amplification is done by using instrumentation amplifier. The output of instrumentation
amplifier drives of indicator or display system. The important features of an instrumentation
amplifier are high gain accuracy, high CMRR, high gain stability with low temperature
co-efficient, low dc offset, low output impedance.
Low input impedance may load the signal source heavily. Therefore high resistance
buffer is used preceding each input to avoid this loading effect. For V1 =V2 under common
mode condition. If V2 =V2 and V1 =V1 both the operational amplifiers act as voltage
follower. If V1 V2 the circuit has differential gain by the formula VO/ (V2-V1)=1+(2R/R).
CIRCUIT DIAGRAM:
BRIDGE CIRCUIT:
INSTRUMENTATION AMPLIFIER:
DESIGN:
Output voltage
V to I CONVERTER:
PIN DIAGRAM:
MODEL GRAPH:
TABULAR COLUMN:
Displacement Output
from initial
Voltage (volt)
place (cm)
Output
Gain =
Current (mA) (VO / (V2 -V1))
Gain =
20 log (VO / (V2 -V1)) in
dB
RESULT:
Thus the physical quantities are converted into electrical quantities and by
using electrical quantities instrumentation amplifier was designed, constructed and
outputs were verified.
Ex.No.2
AIM:
(i)To design, construct and test a AC voltage regulator using SCR.
(ii)To design, construct and test a DC voltage regulator using SCR.
APPARATUS REQUIRED:
AC VOLTAGE REGULATOR:
S.No
Range
Quantity
Transformer
230V/12V
SCR
2P4M
Diode
BY 127
Resistor
100 k
12 k
Bread Board
2
1
1
Connecting Wires
As required
CRO
DRB
DC VOLTAGE REGULATOR:
S.No
1
2
3
Range
230V/24V
TYN 604
1N4001
Quantity
1
1
4
4
5
Resistor
Bread Board
10 k
2
1
Connecting Wires
As required
CRO
DRB
IC
7812
10
Capacitors
1000f
100f
CIRCUIT DIAGRAM:
AC VOLTAGE REGULATOR:
DC VOLTAGE REGULATOR:
\
PIN DETAILS:
AC VOLTAGE REGULATOR:
DC VOLTAGE REGULATOR:
MODEL GRAPH:
AC VOLTAGE REGULATOR:
THEORY:
The SCR is switched ON and OFF to regulate the output voltage in AC and
DC voltage regulator.
AC VOLTAGE REGULATOR:
If the SCR is connected to AC supply and load, the power flow can be
controlled by varying the RMS value of AC voltage applied to the load and this type of
power circuit is caused as AC voltage regulator. Applications of AC voltage
regulator are in heating on load transformers for changing light controls, speed
controls and polyphase controls, induction motors and AC magnet controls for power
transfer. Two types of power control are normally used.
(1) ON-OFF control
(2) Polyphase Angle control
AC regulators are those converter which converts fixed ac voltage directly to
variable ac voltage of the same frequency. The load voltage is regulated by
controlling the firing angle of SCRs. AC voltage controllers are thyristor based
devices.
The most common circuit is the inverse parallel SCR pair in which two
isolated gate signals are applied. Each of the two SCRs are triggered at alternate half
cycles of the supply and the load voltage is part of input sine wave. The SCR is an
unidirectional device like diode, it allows current flow in only one direction but unlike
diode, it has built-in feature to switch ON and OFF. The switching of SCR is
controlled by gate and biasing condition. This switching property of SCR allows to
control the ON periods thus controlling average power delivered to the load.
In this circuit SCR1 is forward biased during positive half cycle and SCR2 is
forward biased during negative half cycle. SCR1 is triggered at the firing angle t=
and supply voltage is impressed on the load resistance(RL). It conducts from the
remaining positive half cycle, turning OFF when the anode voltage becomes zero at
t=.
SCR2 is triggered at the firing angle t=+ and conducts till t=2. Hence
the load is alternating in polarity and is part of sine wave. The firing angle of both
SCRs is controlled by gate circuit. The conduction period of SCR is controlled by
varying gate signals within specified values of maximum and minimum gate currents.
For gate triggering, a signal is applied between the gate and cathode of the
device. AC sources are normally used as gate signals. This provides proper isolation
between power.
DC VOLTAGE REGULATOR:
If SCRs are used to convert an AC voltage into DC voltage then they are
known as DC voltage regulators. Eg. Battery changes for high current capacity
batteries in DC voltage control only phase control is used.
The transformer is used to step down the voltage from 230V to 24V. This is
given as input to bridge rectifier. The bridge rectifier converts incoming ac signal to
unidirectional wave. Therefore we get full wave rectifier output at the output of bridge
rectifier. This is given as input to SCR. The gate of SCR is triggered with firing angle
of . During positive half cycle, diode D1 and D2 conducts and during negative half
cycle, diode D3 and D4 conducts. The full wave rectified output is given to capacitive
filter. The output of capacitor is dc that it eliminates ripple contents of bridge rectifier
output. The dc input is given to regulator IC. The unregulated output must be 2V
greater than regulated output voltage. The load current may vary from 0 to rated
maximum output current. The output voltage is regulated dc.
TABULAR COLUMN:
AC VOLTAGE REGULATOR:
DRB 1 value(K)
Amplitude (V)
TON(ms)
DRB 2 value(K)
Amplitude (V)
TOFF(ms)
DC VOLTAGE REGULATOR:
Resistance RL(K)
Output (V)
DESIGN:
AC VOLTAGE REGULATOR USING SCR:
Triggering circuit for SCR:
12 V ac is rectified by diode BY 127. SCR 2P4M is used to trigger.
Let the current be 1mA. R=V/I=12V/1mA=12K.
DC VOLTAGE REGULATOR USING SCR:
Triggering circuit for SCR:
24 V ac is rectified by diode 1N4001. SCR TYN604 is used to trigger.
Let the current be 1mA. R=V/I=12V/1mA=12K.
PROCEDURE:
AC VOLTAGE REGULATOR USING SCR:
1. Connections are made as shown in the circuit diagram.
2. The supply is given by means of step down transformer.
3. Anode terminal of SCR1 is connected to the anode terminal of diode, is
connected to cathode of SCR1 by means of resistor as the load.
4. Hence the voltage regulation is verified at load terminal.
DC VOLTAGE REGULATOR USING SCR:
1. Connect the two terminals at the top of bridge rectifier.
2. The positive terminal of the bridge rectifier is connected to one terminal at
the load and at the other terminal to anode terminal of SCR.
3. The pin 15 connected from the power supply to the load.
4. Then the DC voltage regulation is checked and verified.
RESULT:
Thus both AC and DC voltage regulators were designed, constructed and the
output waveforms were drawn.
Ex.No.3
SEQUENTIAL TIMER
AIM:
To design sequential timer to switch ON and OFF at least three delays in a
particular sequence using IC 555 timer.
APPARATUS REQUIRED:
S.No
1
2
3
4
5
6
RPS
Connecting wires
Capacitors
LED
Range
555
33k
100k
220
10 f
0.01 f
Quantity
3
1
3
3
3
1
As required
3
6
3
THEORY:
Sequential timer is the simplest form of the process control timer in which
many timing operations carried out sequentially one by one. Each timing operation is
kept in active condition for a predefined amount of time and then goes to off
condition. Similarly the controller activates all the operations as per the defined
timings.
This type of sequential controller is required for injection moulding machine,
back sealing experiments where it required to activate solenoids, relays other
activating mechanism for a predefined time sequentially one by one.
Sequential timer is used for control process. The timer IC 555 is operated in
monostable mode. The mode monostable multivibrator circuit is useful for generating
single output pulse of adjustable data form in response to a trigger signal. The width
of the output pulse depends only on external component connected to the op-amp. The
output of first multivibrator is given to the trigger input of the second one. Similarly it
is connected in sequential order. The time period of each timer determine the
triggering period of LED.
PIN DIAGRAM:
MODEL GRAPH:
OBSERVATION:
LED 1 ON Time
LED 2 ON Time
LED 3 ON Time
DESIGN:
This relay should be energised for 1 sec.
ON Time TH=1.1*R*C
Here we design for 1 sec.
By choosing the value of R=100k
The value of C approximated to C=10 f
Similarly we have
RA=RB=RC=R=100k
CA=CB=CC=C=10 f
PROCEDURE:
1. The circuit connections were given as shown in circuit diagram.
2. The triggering is given to pin 2 of timer 1.
3. When the trigger pulse is given the LED glows one by one sequentially.
RESULT:
Thus the circuits for sequential timer was designed, constructed and outputs
were verified.
Ex.No.4
AIM:
To design, construct and test wireless data modem using FSK modulator(555)
and FSK demodulator (565).
APPARATUS REQUIRED:
S.No
Range
Quantity
Transistor
BC557
IC
Each one
Resistors
58K
47K
1K
10K
600
1
2
1
5
2
Capacitors
0.01 f , 0.1 f
0.02 f
2
5
6
7
1
As required
THEORY:
FREQUENCY SHIFT KEYING:
A digital-to-analog modulation technique. Data is transmitted by shifting
between two close frequencies with ones represented by one frequency and zeroes by
the other.
Frequency-shift keying (FSK) is a method of transmitting digital signals. The
two binary states, logic 0 (low) and 1 (high), are each represented by an analog
waveform. Logic 0 is represented by a wave at a specific frequency, and logic 1 is
represented by a wave at a different frequency. A modem converts the binary data
from a computer to FSK for transmission over telephone lines, cables, optical fiber, or
wireless media. The modem also converts incoming FSK signals to digital low and
high states, which the computer can understand.
Whenever the message or information signal rides over the carrier it is called
modulation. In electrical sense the operation of riding over the amplitude of carrier
means to alter the amplitude of carrier. This is called amplitude modulation of the
carrier. Thus the message signal becomes the modulating signal and it is transmitted
by variations in the amplitude of the carrier.
The transmission media suffers three major problems
A. Attenuation
B. Distortion
C. Noise
FSK DEMODULATOR:
CIRCUIT DIAGRAM:
FSK MODULATOR:
FSK DEMODULATOR:
DESIGN:
FSK MODULATOR:
ON time TH=0.693RBC
OFF time TL=0.693(RA+RB)C
Total time T=TH+TL=0.693(RA+2RB)C
1
f1=-------------------------0.69(RA+2RB) C1
(1)
1
f2=-----------------------------------(2)
0.69(RA+2RB) C 1C2
----------C1+C2
Duty cycle D=ON time/Total time=(RB)/(RA+2RB)=0.3
RB= 0.3RA+0.6RB
RB=0.75RA
Let f1= 1050 Hz, f2= 1250 Hz, C1=0.01f
From (1)
1
1050=--------------------------------0.69(RA+2*0.75RA) 0.01f
1
=--------------------------------0.69*2.5RA*0.01f
RA=55.2K
RB=0.75RA
RB=41.4K
PIN DIAGRAM:
MODEL GRAPH:
From (2)
1
1250=-----------------------------------------------0.69(55.2K +2(41.4K )) 0.01f*C2
---------------0.01f+C2
0.01f+C2
C2 =----------------------------------0.69(138K )1250*0.01f
0.01f+C2
C2 =--------------1.19
1.19C2 - C2 = 0.01f
0.19C2 = 0.01f
C2 = 52.63 nf
FSK DEMODULATOR:
Upper cut off frequency of RC ladder circuit fH=1/(2 RC)
Assume R2=R3=R4=R
C2=C3=C4=C
fH=(key in frequency+2 maximum frequency)/2
=(150+2(1250))/2=1325Hz
Let C=0.02f then R=1/(2 CfH)=1/(2 *1325Hz*0.02f )=7K
f0=0.3/(R1C1)
f0=(f1+f2)/2=(1050+1250)/2=1150Hz
Let C1=0.01f
R1=0.3/(1150*0.01f)=26K
flock=8f0/10=(8*1150)/10=920Hz
fcapture should be less than flock.
Choose fcapture =400Hz
fcapture =(1/2 ) (2 *flock)/(R0C0)
R0=internal resistance=3.6K
2
OBSERVATION:
INPUT:
Amplitude =
ON time TH =
ms
ms
Frequency f =
Hz
FSK MODULATOR:
For positive half cycle
Amplitude =
ON time TH =
ms
ms
Frequency f =
Hz
ON time TH =
ms
ms
Frequency f =
Hz
FSK DEMODULATOR:
Amplitude =
ON time TH =
ms
ms
Frequency f =
Hz
PROCEDURE:
FSK MODULATOR:
1. Connections are given as per the circuit diagram.
2. The digital input was applied at the input of FSK modulator.
3. The square wave output was noted in astable mode by CRO.
FSK DEMODULATOR:
1. Connections are given as per the circuit diagram.
2. The FSK modulated output is given as a input in the demodulation
circuit.
3. The output of the demodulator gives a modulating signal by using
voltage comparator was noted.
RESULT:
Thus the circuit for wireless data modem using FSK modulator (555) and
demodulator (NE 656) were designed, constructed and outputs were verified.
CIRCUIT DIAGRAM:
Ex.No.5
AIM:
To design Component/Board layout, PCB layout of the given circuit
using AutoCAD 2000.
PROCEDURE:
1. Double click on AutoCAD 2000 or ACAD.
2. Ensure that you select metric (i.e. you are telling AutoCAD that you will be
drawing in metres and millimetres NOT feet and inches) in the dialog box.
3. AutoCAD will now create a new drawing file named drawing1.dwg.
4. Select various electronic components from FileOpenAutoCAD
folderSample folderDesign Center folderAnalog Integrated
Circuits& Basic Electronics& CMOS Integrated Circuits.
5. Thus Component/Board layout is drawn by various AutoCAD commands.
6. Then PCB layout is drawn by various AutoCAD commands.
COMPONENT/BOARD LAYOUT:
RESULT:
Thus the Component/Board layout, PCB layout of the given circuit using
AutoCAD 2000 was designed.
APPENDIX AUTOCAD
COMMANDS
CAD is a abbreviation of Computer Aided Design and the term Auto indicates the
company Name AutoDesk Inc., U.S., developed the Package AutoCAD.
Starting AutoCAD:
First, your computer should have Windows XP or Win 2000 Operating System.When
u switch ON your computer, the Operating System is automatically loaded. Youcan
start AutoCad by double clicking on AutoCAD icon on desktop of a computer.
DONUT:
Draws filled circles and rings.
Command: Donut or Do
Specify inside diameter of donut<10.0000>:Enter your value
Specify outside diameter of donut<20.0000>:Enter your value
Specify center of donut or <exit>:Click any point as center point
VIEWRES:
Sets the resolutions for objects in current view port.
Command:viewers
Do u want fast zooms[yes/no]<Y>: Press enter(fast zooms is no longer a functioning
option of this command and remains for script compatibility only)
Enter circle zoom present(1 20000 )<current>: Enter an integer from 1 20000 or
press Enter The model is regenerated.
VIEWRES controls the appearance of circles, arcs, ellipses and splines using short
vectors. The greater the no of vectors the smoother the appearance of circle or arc.
For eg if u create a very small circle and then zoom in it might to appear to be
polygon. Using VIEWRES to increase the zoom percentage and regenerate the
drawing updates and smoothes the circle appearance. Decreasing the zoom percentage
has the opposite effect.
Before VIEWRES
After VIEWRES
VIEWRES at 15
VIEWRES at 500
most common commands on one toolbar. For example, the dimensioning toolbar is
one that you will not want taking up space on your screen while drawing, but is very
handy when you're dimensioning your drawing.
Opening
AutoCAD
Open up AutoCAD, you should be greeted with a screen asking if you want to open
an existing drawing or start from scratch. (Dependant on your version of AutoCAD,
the screen will be slightly different - The image shown below is for AutoCAD 2002).
Select 'Create Drawings', then 'Start from Scratch'. Ensure that you select metric (i.e
you are telling AutoCAD that you will be drawing in metres and millimetres NOT
feet and inches).
AutoCAD will now create a new drawing file named drawing1.dwg.
AutoCAD will default to 'model space'. For now it is sufficient to say that model
space is the blank space where all the drawing is carried out. Paperspace (now called
Layout space since AutoCAD 2000) isn't really required until we are ready to plot
(print)
the
drawing.
Toolbars
There are many toolbars available in AutoCAD. Go to View > Toolbars from the drop
down menu to see them all. For now make sure that the following toolbars are
checked:
Draw
Contains
AutoCADs
most
common
drawing
tools
Modify - Contains all of the common editing commands such as erase, copy etc.
Object Properties - Contains 'layer' information as well as object colours and line style
options.
(Covered
Later).
Standard Toolbar - Contains open & save options as well as zoom & pan options.
Object Snap - AutoCAD's intelligent drawing aid - joins lines at specific points.
(Covered
later).
Arrange the icons to where is comfortable for you (A typical layout is shown below):
The
Command
Line
The command line appears at the bottom of the AutoCAD screen (as shown above)
and displays the commands entered. Commands can be entered into the command line
in text format, or by using the icons or drop down menus. 'Old School' Cad users tend
to type each command into the command line, as was required with older versions of
AutoCAD. It is much quicker to familiarise yourself with the tool bars and drop down
menus. There are times however when commands need to be typed into the command
line,
these
will
be
covered
later.
Title Bar - This will show you what program you are running and what the current
filename is.
Pull-down menus - These are the standard pull-down menus through which
you can access almost all commands.
Main toolbar - This has most of the standard Windows icons, as well as the
most common AutoCAD commands.
Property toolbar - This toolbar gives a way to quickly modify an object's
properties, such as layer and linetype.
Floating toolbar - This is a toolbar that can be moved around the screen, or
'docked' as the main toolbar is.
Drawing space - This is where you draw. You have an almost infinite area to
draw and this is just a 'section' of the entire space.
Scrollbars - These work like in other windows programs. You can also use the
PAN command to move around your drawing.
WCS Icon - This is here to show you which direction positive X and positive
Y go. The W means you're in the World Co-ordinate System. (It can be
changed to a User Co-ordinate System.)
Status Bar Tray Icons - These icons give you updates on items like reference
files program updates and print status.
Command line - When you type a command, you will see it here. AutoCAD
uses this space to 'prompt' you for information. It will give you a lot of
information and tell you where you are in the command. Watch this line while
learning.
Status bar - This allows to see and change different modes of drawing such as
Ortho, Osnaps, Grid, Otrack, etc.
Tool Palette - Collection of tools in one area that can be organized into
common catagories.
Command
Properties
Keystroke
PROPERTIES
Icon
Menu
Modify
Properties
Result
Displays
the
properties
of
>
the object in the
Properties
Palette
Command
Description
Options
COPY
or
CP
Draws a copy of selected objects using two methods - "base point" method, or "displacement" method.
BASE
can be transparent
DONUT or
DOUGHNUT
ERASE or E
EXPLODE
Separates a block, dimension or hatch pattern into its constituent entities or makes a
polyline into a series of straight lines. In the case of a block that is exploded, if it
was originally drawn on the 0 layer, it returns to that layer, regardless of the layer it
was inserted on, and it loses its referential connection to the original block. In the
case of a dimension or hatch pattern that has been exploded, their parts go back to
the 0 layer, and are assigned the logical color (BYBLOCK) regardless of the layer
they were drawn on. In the case of an exploded polyline, it loses any width it may
have had.
LINE or L
MOVE or M
NEW
OFFSET
<number>
specifies
offset distance
T "Through" allows
specification of a point
through which the
offset line, polyline,
arc or circle is to pass
OPEN
ORTHO
can be transparent
OSNAP
can be transparent
CEN CENter of arc or
circle
END
closest
ENDpoint of arc or
line
INS INSertion point of
Text or Block
INT INTersection of
line, arc, or circle
MID MIDpoint of
line, arc, rectangle
side, or polygon side
NEA NEArest point
selected by aperture on
line, polyline, arc, or
circle
NOD NODe (another
name for a Point)
NON NONe -- used
when a "Running
OSNAP" is on to
temporarily turn off
OSNAP selection
PER PERpendicular
point to line, arc or
circle -- when used
with an arc or circle it
will draw a line to the
surface of the arc or
circle heading toward
the center point
QUA QUAdrant point
of arc or circle (top,
bottom, right or left
side)
QUI QUIck mode -this is a modifier to
one of the other
OSNAP options -- it
will find the first point
that
meets
the
requirements,
not
necessarily the closest
point to the aperture.
TAN TANgent point
to arc or circle
QSAVE
Saves the current drawing "Quickly" without requesting a filename (as long as file
has already been given a name)
QUIT
Exits AutoCAD -- if the current drawing has not been Saveds in its current state, a
dialogue box will appear asking if you want to Save the drawing, Discard the
changes, or Cancel the Exit command
SNAP
can be transparent
<number> sets snap alignment
resolution
ON aligns designated points
OFF does not align designatged
points
A sets aspect ratio (differing X
and Y spacing)
VIEWRES
Allows you to control the precision and speed of circle and arc drawing on the
monitor by specifying the number of sides in a circle. Acts like an AutoCAD
variable. Recommend that it be set to 2000.
ZOOM
Enlarges
or
reduces
the
display
magnification of the drawing, without
changing the actual size of the entities
can be transparent
<number> multiplier from original
magnification
<number X> multiplier
current magnification
from
<number
XP>multiplier
of
magnification relative to paper
space -- used for plotting to get
right plot scale in each viewport
A ("All") fills limits of drawing to
screen
C ("Center") makes picked point
the center of the screen
D ("Dynamic") makes an adjustible
rectangular lens appear on the
screen which is capable of being
made smaller or larger and moved
to different positions over the
drawing and once set by the user,
the drawing will quickly zoom to
the location and magnification set
for the lens. This sub-command is
no longer useful because all
computers have very fast zooms
naturally now.
E ("Extents") makes the farthest
edges of the actual visible drawing
fill up the graphics screen
L ("Lower-Left") makes the point
picked become shoved to the lowerleft corner of the graphics screen
P ("Previous") zooms back to
whatever the last zoom, previous to
the current zoom was -- AutoCAD
stores about 10 of these, so you can
walk
backward
in
magnification 10 times
zoom
Ex.No.6
AIM:
To design microcontroller based system for simple applications like security
systems combination lock etc. using 89c series flash micro controller.
APPARATUS REQUIRED:
1. PC with windows operating system, RIDE IDE software, WINISP
software
2. 8051 microcontroller
3. RS 232C Serial Cable
4. Home Security System
PROCEDURE:
1. Use RS 232C Serial Cable to connect 8051 microcontroller through serial
port.
2. Set the DIP switch as follows
DIP switch1: RS 232
DIP switch2: PGM for Programming Flash mode, EXE for execution
Mode DIP switch3: INT
3. Write the ALP program (text document) in notepad, save as ASM
language (ASM format) in
Micro 51.
4. Set the DIP switch2 in PGM for Programming Flash.
5. Run WINISP.
6. Set the parameter for the following fields in WINISP window
A CHIP: P89C51RD2
B PORT: Select Serial port connected to RS 232C Serial Cable
C OSC: 12MHz
7. If flash is not blanked, perform erase operation.
8. Load hexa file containing the object code to be programmed into flash
from Micro 51 by clicking load file.
9. Program the flash by clicking program part.
10. Set the DIP switch2 in EXE for execution mode.
11. Enter the password in Home Security System.
12. If a valid password is given, door will open.
PROGRAM:
$include(reg51xa.inc)
org 0000h;
IOCONT
equ 0ffc0h
DCONT
equ 0ffc4h
CONTR1
equ 0ff0fh
Port1A
equ 0ff0ch
Port1B
equ 0ff0dh
Port1C
equ 0ff0eh
Contr
equ 0ff13h
PortA
equ 0ff10h
PortB
equ 0ff11h
PortC
equ 0ff12h
call Bussy_check
call lcd_IOCONT
mov A,#38h
mov dptr,#DCONT
movx @dptr,A
call Bussy_check
call lcd_IOCONT
mov A,#80h
mov dptr,#DCONT
movx @dptr,A
call Bussy_check
call lcd_IOCONT
mov A,#04h
mov dptr,#DCONT
movx @dptr,A
call Bussy_check
call lcd_IOCONT
mov A,#0Eh
mov dptr,#DCONT
movx @dptr,A
;
;address assign for lcd data line
;Control register of the 8255_1.
;Port A
;Port B
;Port C
;Control register of the 8255_2.
;Port A.
;Port B.
;Port C.
;
;
;
;
; 5*7 matrix lcd init.
;
;
;
;
; starting location .
;
;
;
;
; Set cursor move direction.
;
;
;
;
; enable display,cursor ,cursor blining
call Bussy_check
;
call lcd_IOCONT
;
mov A,#01
;
mov dptr,#DCONT
;
movx @dptr,A
; clear display.
mov dptr,#MYDATA
;
mov r7,#80h
;1st line data display
mov r3,#16
; r3 load display characters length
lcall display
;call display routine
mov dptr,#MYDATA1
;
mov r7,#0c0h
;2nd line data display
mov r3,#16
; r3 load display characters length
lcall display
; call display routine
call delay
;
call delay
;
call delay routine
mov r4,#3
;this value initialise for no time wrong password access
jump_start:call Bussy_check
;
call lcd_IOCONT
;
mov A,#01
;
mov dptr,#DCONT
;
movx @dptr,A
; clear display.
mov dptr,#MYDATA2
;
mov r7,#80h
;1st line data display
mov r3,#9
; r3 load display characters length
lcall display
;
;~~~~~~
;4*4 matrix key read
;8255_1 Assign Port A and Port C are output port and port B is input port
key_start:mov dptr,#CONTR1
;Dptr load Control register address.
mov A,#83h
;Acc load 83hex.
movx @dptr,A
;Dptr point to Acc .
mov r2,#06
;no of character use in password.
mov dptr,#4000h
;dptr contain address of 4000h.;this address location
continiously contain password character.
back_keystart:mov r0,dpl
;dpl contain lower byte of dptr.
mov r1,dph
;dph contain higher byte of dptr.
dec r2
;decrement r2 value.
mov a,r2
;Acc load r2.
jnz getdata
;Acc!=0 load another char.
ljmp end1
;If Acc==0 goto password compare.
getdata:mov A,#00
;Acc load 0.
mov dptr,#Port1A
;PortA init.
movx @dptr,A
;Port1A load 0.
continue:mov dptr,#Port1B
;key Read continiously checking
movx A,@dptr
;Acc load dptr point to the value.
anl A,#0fh
;logical operation of Acc and 0f.
cjne A,#0fh,key_Next
;if Acc!=0x0f read char
sjmp continue
;if Acc==0x0f key continiously checking
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;ROW 1 ;;;;;;;;;;;;;;;;;;;;;;;;;
key_Next:mov a,#0eh
;Acc load 0x0e.0x0e is 4th row of key pad.
mov dptr,#Port1A
;dptr load port1A address.
movx @dptr,A
;dptr point to Acc.Port1A load Acc value.
mov dptr,#Port1B
;dptr contain Port1B address.
movx A,@dptr
;Acc load dptr point to the value.
anl A,#0fh
;AND operation for Acc and 0x0f.
cjne A,#0fh,ctrow1
;compare Acc and 0x0fh
sjmp row1
;Acc==0x0f go to row1.if Acc!=0x0f go to ctrow1.
ctrow1:cjne A,#0eh,Next30
;compare to colomn wise key.
mov A,#30h
;Acc load
0x30.0x30 ASCII char is '0'; ljmp
key_end
;
Next30:cjne A,#0dh,Next31
;
mov A,#31h
;Acc load 0x31.0x31 ASCII char is '1';
ljmp key_end
;
Next31:cjne A,#0bh,Next32
;
mov A,#32h
;Acc load 0x32.0x32 ASCII char is '2';
ljmp key_end
;
Next32:cjne A,#07h,row1
;
mov A,#33h
;Acc load 0x33.0x33 ASCII char is '3';
ljmp key_end
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ROW 2 ;;;;;;;;;;;;;;;;;;;;;;;;;
row1 :
mov a,#0dh
;Acc load 0x0d.0x0d is 3rd row of key pad.
mov dptr,#Port1A
;
movx @dptr,A
;
mov dptr,#Port1B
;
movx A,@dptr
;
anl A,#0fh
;
cjne A,#0fh,ctrow2
;
sjmp row2
;
ctrow2:cjne A,#0eh,Next34
;
mov A,#34h
;Acc load
0x34.0x34 ASCII char is '4';
sjmp key_end
;
Next34:cjne A,#0dh,Next35
;
mov A,#35h
;Acc load 0x35.0x35 ASCII char is '5';
sjmp key_end
;
Next35:cjne A,#0bh,Next36
;
mov A,#36h
;Acc load 0x36.0x36 ASCII char is '6';
sjmp key_end
;
Next36:cjne A,#07h,row2
;
mov A,#37h
;Acc load 0x37.0x37 ASCII char is '7';
sjmp key_end
;
call display2
;display key read char.
mov dpl,r0
;
mov dph,r1
;
mov A,r7
;
movx @dptr,A
;get char Store to Dptr .Dptr Base address 4000h.
inc dptr
;Vary dptr.each char contion cotinious memory 4000hto4004h.
lcall delay
;delay routine.
jump:ljmp back_keystart
;if get another char goto back_key start.
END1:lcall compare
;two string compare routine.; compare Enter password
routine compare
:
mov r2,#5
;r2 load count of char .
mov dptr,#Password
;dptr contain base address of the Password.
mov r3,#00
;r3 load 0x00.
equal:mov r0,dpl
;r0 contain lower byte of dptr.
mov r1,dph
;r1 load higher byte of dptr.
mov a,#00
; Acc load 0x00;
movc a,@a+dptr
;Acc contain code segment data.
mov B,A
;B reg. load Acc.
mov dptr,#4000h
;dptr contain address 4000h.
inc r3
;
mov a,r3
;
sjmp jump2
;
incr:
inc dptr
;
jump2:djnz r3,incr
;
mov r3,A
;
mov A,#00
;
movx a,@dptr
;
cjne A,B,NOT_equal
;compare Acc value And B reg.value.
mov dpl,r0
;
mov dph,r1
;
inc dptr
;
djnz r2,equal
;
lcall step_motor
;Call step_motor routine .
mov r4,#3
;
ljmp jump_start
;
NOT_equal:djnz r4,busser_0ff
;
mov A,#82h
;
mov dptr,#CONTR1
;
movx @dptr,A
;
mov A,#01
;
mov dptr,#Port1C
;minimum 3 times Put wrong password.after buffer is ON.
movx @dptr,A
;
lcall access_stop
;display Access denied.and system not access it when after
reset.
sjmp Re_start
;
busser_0ff:call Bussy_check
;
call lcd_IOCONT
;
mov A,#01
;
mov dptr,#DCONT
;
movx @dptr,A
; clear display.
mov dptr,#MYDATA4
;
mov r7,#80h
;1st line data display
mov r3,#16
; r3 load display characters length
lcall display
;
mov dptr,#MYDATA5
;
mov r7,#0c0h
;2nd line data display
mov r3,#16
; r3 load display characters length
lcall display
;
lcall delay
;
lcall delay
;
ljmp jump_start
;
Re_start:sjmp Re_start
;
;Access denied subroutine
access_stop : call Bussy_check
;
call lcd_IOCONT
;
mov A,#01
;
mov dptr,#DCONT
;
movx @dptr,A
; clear display.
mov dptr,#MYDATA6
;
mov r7,#80h
;1st line data display
mov r3,#16
; r3 load display characters length
lcall display
;
ret
;
mov r0,#04h
call rotate
djnz r3,back_6
ret
;
;call rotate subroutine.
;
;
;Bussy_check subroutine
Bussy_check :
mov A,#02
;
mov dptr,#IOCONT
;
movx @dptr,A
; mov
dptr,#DCONT
;
back:movx A,@dptr
;
anl A,#80h
;
cjne A,#00,back
;
mov A,#00
;
mov dptr,#IOCONT
;
movx @dptr,A
;
ret
;
;lcd enable rotine
lcd_IOCONT :
mov A,#00
;
mov dptr,#IOCONT
;
movx @dptr,A
;
ret;
;
;
;
;
RESULT:
Thus microcontroller based system for simple applications like security systems combination
lock etc. using 89c series flash micro controller was designed and executed.
Ex. No.7
Date:
AIM:
To design AM signal using multiplier IC for the given carrier frequency and
modulation index and demodulate
APPARATUS REQUIRED:
S.No
1
2
3
Range
MC1496
51
k
4k
k
k
k
Quantity
1
1
3,5,1,1
2,2,1,1,
1
k
4
5
6
RPS
Connecting wires
Capacitors
7
8
FG
Diode
10 f
0.001 f,0.1 f,0.0
1 f
IN 4001
1
As required
1
1,2,1
2
1
PROCEDURE:
Connections are made as per the circuit diagram
Give the modulating signal to pin no 10 through the FG.
Give the carrier signal to pin no 10 through the capacitor of 0.1 f using
another FG.
Note down the AM signal at pin no 6.
Choose the amplitude level of converter keeping frequency at constant depth
of modulation was calculated.
Give AM signal to pin no 1 of demodulator circuit.
Note down the demodulator signal at pin no 2 of IC 14
CIRCUIT DIAGRAM
WAVEFORM:
THEORY:
Modulation: It is the process in which the characteristics of high
frequency carrier wave is varied in accordance with instantaneous value of
other wave.
Amplitude Modulation: The amplitude of carrier wave is varied in accordance
with the instantaneous values of message signal is called amplitude
modulation.The bandwidth of the AM is twice the bandwidth of the base band
signal. The amplitude modulation wave also produces two sidebands(Upper
and Lower).
The extent of amplitude variation in AM about unmodulated carrier amplitude
is measured in terms of a factor called modulation index defined as the ratio
of modulating signal amplitude to carrier amplitude. This factor also known
as depth of modulation, degree of modulation and modulation factor(ma).
If ma<1 then the modulation is called under modulation, ma>1 then the
modulation is called over modulation, ma=1 then the modulation is called
critical modulation.
AM Demodulation: It is the process of extracting the message signal by using
a same carrier that was used for modulation from the modulated signal.
The most commonly used AM detector is simple diode detector. The
signal at the secondary is half wave rectified by diode D. This diode is the
detector diode the resistance R is the load resistance to rectifier and C is the
filter capacitor. In the positive half cycle of the AM signal diode conducts and
current flows through R, where as in negative half cycle, the diode is
reverse biased and no current flows. Therefore only positive half of the AM
signal appears across R. Capacitor reconstructs the original modulating signal
and high frequency carrier is removed.
RESULT:
Thus the AM modulation and demodulation circuits were constructed
and modulation index was calculated.
Ex. No.7
Date:
AIM:
To design FM signal using IC 566 for the given carrier frequency and
demodulat the FM using PLLNE 565.
APPARATUS REQUIRED:
S.
Name of the Apparatus
No
1
IC
2
Bread Board
3
Resistors
4
5
6
7
RPS
Connecting wires
Capacitors
FG
Range
Quantity
566
1
1
1,1,
1
1
As required
1,2
1
39 k
k
0.01 f, 0.001 f
THEORY:
Modulation:
It is the process in which the characteristics of high frequency carrier
wave are varied in accordance with instantaneous value of other wave.
Frequency Modulation:
Frequency modulation is the process of varying the frequency of a
carrier wave in proportion to the instantaneous amplitude of the modulating signal
without any variation in the amplitude of the carrier wave. Because the amplitude of
the wave remains unchanged, the power associated with an FM wave is constant.
When the modulating signal is zero, the output frequency equals fc
(centre frequency).When the modulating signal reaches its positive peak, the
frequency of the modulated signal is maximum and equals(fc + fm). At negative peaks
of the modulating signal, the frequency of the FM wave becomes minimum and equal
to(fc - fm).
Thus, the process of frequency modulation makes the frequency of the
FM wave to deviate from its centre frequency(fc).By an amount ( + or - f) where f
is termed as the frequency deviation of the system. During this process, the total
power in the wave does not change but a part of the carrier power is transferred to the
side bands. There are two types of FM they are
1.Narrow band FM
2.Wide band FM
Frequency demodulation
It is a process which is used to receive the origin of signals.
MODEL GRAPH:
PROCEDURE:
Connections are made as per the circuit diagram
Give the modulating signal to pin no 5 through the FG.
Note down the corresponding amplitude and time period of the FM modulated
signal.
Apply the modulated signal as input to the PLL.
FREQUENCY MODULATION:
RESULT:
Thus the frequency modulation and its demodulation circuits were designed
and waveforms are plotted.
Ex. No.8
Date:
AIM:
To generate the pseudo random sequence using linear feedback shift
register and verify the output using truth table.
SOFTWARE USED:
XILINX ISE 9.2i
PROCEDURE:
i)
ii)
iii)
iv)
v)
vi)
vii)
viii)
ix)
x)
xi)
xii)
xiii)
xiv)
PROGRAM :
ENTITY PRSG7 IS
PORT(
CLK : IN BIT;
Q : BUFFER BIT_VECTOR (7 DOWNTO 1)
);
END ENTITY PRSG7;
ARCHITECTURE BEHAVIORAL OF PRSG7 IS
BEGIN
PROCESS(Q,CLK)
BEGIN
IF CLK'EVENT AND CLK = '1' THEN
Q <= Q(6 DOWNTO 1) & (Q(7) XNOR Q(6));
ELSE
Q <= Q;
END IF;
END PROCESS;
END ARCHITECTURE BEHAVIORAL;
RESULT:
Thus the pseudo random sequence was generated using linear feedback shift
register and the output was verified using truth table.
Ex. No.9
Date:
AIM:
To write HDL program for designing arithmetic logic unit and
simulate it using xilinx ISE9.2i.
SOFTWARE USED:
XILINX ISE 9.2i
PROCEDURE:
i)
ii)
iii)
iv)
v)
vi)
vii)
viii)
ix)
x)
xi)
xii)
xiii)
xiv)
begin
case sel is
when "0000" =>
z<= a and b;
when "0001" =>
z<= a or b;
when "0010" =>
z<= a xor b;
when "0011" =>
z<= a nand b;
when "0100" =>
z<= a nor b;
when "0101" =>
z<=a+b;
when "0110" =>
z<=a-b;
when "0111" =>
z(3)<=a(2);
z(2)<=a(1);
z(1)<=a(0);
z(0)<= '0';
when "1000" =>
z(0)<=a(1);
Z(1)<=a(2);
z(2)<=a(3);
z(3)<='0';
end if;
when "1110" =>
if(a(3)='0' and b(3)='1') then
l(0)<='0';
g(0)<='1';
e(0)<='0';
elsif(a(3)='1' and b(3)='0') then
l(0)<='1';
g(0)<='0';
e(0)<='0';
elsif(a(3)='1' and b(3)='1') then
if(a<b) then
l(0)<='0';
g(0)<='1';
e(0)<='0';
elsif(a>b) then
l(0)<='1';
g(0)<='0';
e(0)<='0';
elsif(a=b) then
l(0)<='0';
g(0)<='0';
e(0)<='1';
end if;
elsif(a(3)='0' and b(3)='0') then
if(a<b) then
l(0)<='1';
g(0)<='0';
e(0)<='0';
elsif(a>b) then
l(0)<='0';
g(0)<='1';
e(0)<='0';
elsif(a=b) then
l(0)<='0';
g(0)<='0';
e(0)<='1';
end if;
end if;
end Behavioral;
RESULT:
Thus the HDL program was written for arithmetic logic unit and simulated
using xilinx.
PROGRAM:
clc; clear all; close all;
format short
T=input('enter the symbol interval T');
br=input('enter the bit rate value br');
rf=input('enter the roll off factor rf');
n=[-10 10];
y=5000*rcosfir(rf,n,br,T);
ds=[5 2 5 2 5 2 5 2 5 5 5 5 2 2 2 5 5 5 5];
m=length(ds);
n1=length(y);
i=1;
z=conv([ds(i),y)
; while (i)
z1=[z,zeros(1,1.75*br)];
z=conv(ds(i+1),y);
z2=[zeros(1,i*1.7*br),z];
z=z1+z2;
i=i+1;
end
%plot(z);
h=randn(1,length(ds));
rs1=filter(h,1,z);
for i=1;length(ds),
rs(i)=rs1(i)/15;
end
for i=1:round(x3/3),
rs(i)=randn(1);
end
fs=[5 5 2 2 2 2 2 5 2 2 2 5 5 5 2 5 2 5 2];
m=length(ds);
n1=length(y);
i=1;
z=conv(fs(i),y);
while(i)
z1=[z,zeros(1,1.75*br)];
z=conv(fs(i+1),y);
z2=[zeros(1,i*1.75*br),z];
z=z1+z2;
i=i+1;
end
fs1=rs+fs;
ar=xcorr(ds,ds);
crd=xcorr(rs,ds);
l1=length(ar);
j=1;
for i=round(11/2):11,
ar1(j)=ar(i);
j=j+1;
end
r=toeplitz(ar1);
l2=length(crd);
j=1;
for i=round(12/2):12,
crd1(j)=crd(i);
j=j+1;
end p=crd1;
lam=max(eig(r));
la=min(eig(r));
l=lam/la;
w=inv(r)*p;
e=rs-filter(w,1,ds);
s=1;mu=1.5/lam;
ni=1;
while(sle -10)
w1=w-2*mu*(e.*ds);
rs
y4=filter(w1,1,ds);
e=y4-rs;
s=0;e1=xcorr(e);
for i=1:length(e1),
s=s/length(e1);
if(y4==rs)
break
end
ni=ni+1;
w=w1;
end
figure(1);
subplot(2,2,1);
plot(z);
title('near end signal');
subplot(2,2,2);
plot(rs);
title('echo produced in the hybrid');
subplot(2,2,3);
plot(fs);
title('desired signal');
subplot(2,2,4);
plot(fs1);
title(' echo added with desired signal');
figure(2);
subplot(2,1,1);
plot(y4);
title('estimated echo signal using LMS algorithm');
subplot(2,1,2);
plot(fs1-y4);
title('echo cancelled signal');
RESULT:
Thus the LMS Algorithm based Echo cancellation System has been
designed and verified using MATLAB.