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Lab10 2011

This document describes an experiment involving bipolar junction transistors (BJTs) and amplifiers. The objectives are to analyze BJT circuits using DC and small signal models and examine the performance of a common emitter amplifier. The experiment involves: 1) Constructing and analyzing a DC voltage splitter circuit to find operating points. 2) Modifying the circuit to a common emitter amplifier and measuring input resistance, voltage gain, and bandwidth both with and without a bypass capacitor across the emitter resistor. 3) Analyzing the role of various circuit components like the bypass capacitor in enhancing gain based on small signal models.

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Venkat Ramanan
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© © All Rights Reserved
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Download as DOCX, PDF, TXT or read online on Scribd
145 views

Lab10 2011

This document describes an experiment involving bipolar junction transistors (BJTs) and amplifiers. The objectives are to analyze BJT circuits using DC and small signal models and examine the performance of a common emitter amplifier. The experiment involves: 1) Constructing and analyzing a DC voltage splitter circuit to find operating points. 2) Modifying the circuit to a common emitter amplifier and measuring input resistance, voltage gain, and bandwidth both with and without a bypass capacitor across the emitter resistor. 3) Analyzing the role of various circuit components like the bypass capacitor in enhancing gain based on small signal models.

Uploaded by

Venkat Ramanan
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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EXPERIMENT 10

BIPOLAR JUNCTION TRANSISTORS AND AMPLIFIERS (EXPERIMENTAL)


1.

OBJECTIVES

- To conduct a DC analysis and compare the theoretical values with the values after the
implementation of the circuit.
- To examine the performance of the Common Emitter BJT Single stage amplifier.
2.

THEORY IN ORDER TO APPRECIATE HOW THESE CIRCUITS AMPLIFY AN INPUT, YOU


SHOULD KNOW THE SMALL SIGNAL MODEL FOR BJT.
3.

EXPERIMENTAL PROCEDURE

The maximum rating and diagram for P2N2222A BJT is given below.
Maximum Ratings of P2N2222A Bipolar Transistor
VCE(V)

IC(mA)

max./typical

PD(mW)

Freq.(MHz)

40

600

300/100

625

300

The picture below shows the appearance of either the BJT that you will find in the lab. The
pins are described in the table below. It would be useful to mount the devices on the longlegged holders before you put together your circuit on the breadboard.
Pin No.

P2N2222A
BJT
1

Collector

Base

Emitter

58

Figure 9.1

3.1 Preliminary work


Conduct the DC analysis for the circuit shown in figure 9.2. Assume 100 ,
VCE 7.5V and VB 4.5V .
b) Assume 100 , 0.99 and VT 25mV for the circuit shown in figure 9.3. Use a
small signal model to analyze the circuit and calculate the input resistance Ri and the
a)

voltage gain with and without the bypass capacitor. For this analysis ignore 10 F
capacitors and the biasing resistors. Also ignore the load resistor of 10 K. Do you know
why we make these simplifications? What is the role of biasing resistors?
3.2 Required components
Transistors
P2N2222A

Resistors
NPN

4.7, 10, 33,75 K

Capacitors
10, 47 F

3.3 DC ANALYSIS
The circuit shown in figure 9.2 is known as voltage splitter. Use the following values to locate
the operating point in the active region, VCE 7.5V , VB 4.5V , 100 . Choose R1 75k ,
compute the value of R2 ( 33k ). Select the closest standard values for the resistors, and then
construct the circuit shown in the figure 7.2. Make sure you mount your BJT on the
transistor-holder before you assemble your circuit on the breadboard.
1- Use the DMM to measure all the DC values in the table below. Compute and verify all
the previous values.
VCE
IC
VBE
VB
IE
IB

2- Apply 4Vpeak-peak 1 kHz sine wave to the input Vin in Figure 9.2. Use channels 1& 2 of
Vout1
the oscilloscope to display first, Vin and Vout1 and then, Vin and Vout 2 . Compute the gain Vin

Vout 2
and Vin , record the phase shift between the input and the two outputs. The gains must be
close to one. What is the phase shift due to?

59

V cc = 15V

R 1

R
V

10uF
V

in

V
V

= 4 .7 K

R 2

o u t1

C E

3.4

o u t2

= 4 .7 K

Figure 9.2
AC ANALYSIS FOR COMMON EMITTER (CE) AMPLIFIER

Modify the connection of the circuit shown in figure 9.2 to obtain the circuit in figure 9.3.
NOTICE that the capacitor of 47 F is connected across the emitter resistor RE , also a resistor
is added between the signal generator and the coupling capacitor. If the circuit draws any
current from the signal generator it must pass through the 10 K resistor. The voltage across
the 10 K resistor is equal to vs vx , and the current passing through is equal to ( vs vx )/
10 K . Looking at the direction indicated by the arrow, the input resistance of the amplifier can
be computed from the equation below.
vx
10k
Ri
vs v x
The amplifier bandwidth (operating frequency range) is defined as the difference in Hz
between the upper and lower 3dB points. The 3dB point is known as the point where the
G
1
Gout MID BAND
2
2
amplifier gain falls below the mid-band gain by the factor
i.e.
. The
following equation is used as a formal definition for the 3dB point.
Gout
1
3dB 10 log(
) 20 log(
)
G MID Band
2
EXPERIMENTAL PROCEDURE
1- Apply a sinusoidal input signal with 100 mV peak-peak and 4 KHz.
2- Use the oscilloscope to measure the following peak-peak values: v s , v x and vout . Be ready
to adjust input amplitude if Vout saturates.
3- Display Vin on CH1 and vout on CH2, then change the frequency (if needed) and measure
the peak-to-peak value of the maximum output voltage that is V out = VMID-BAND. Now decrease
the frequency more and observe the peak-peak values of the output signal vOUT , when
60

vOUT

v MID BAND
2

record the frequency of the input signal. This is the frequency at the lower

3dB point.
4- Set the input frequency to 50KHz. Slowly increase the frequency till the output peak-peak
v MID BAND
2
equal to
. Determine this frequency at the upper 3dB point. Determine the
bandwidth.
5- From the above readings compute the following: input resistance, the gain (Vout/Vin), and
the bandwidth of the CE amplifier.
6- Remove the 47F capacitor from the circuit and obtain the maximum gain (Vout/Vin) and
the bandwidth.

VC C =15V

75k
Vs

Vx
10k
V in

VOFF = 0
V A M P L = 50m V

VB

Rc

4 .7 k

33k

10u

Q 1

P 2N2222A

10u

FRE Q = 4K Hz

Vout

RE

4 .7 k

10k
47u

Ri

Figure 9.3
4.

QUESTIONS AND DISCUSSION


1. Explain how the emitter resistance RE stabilizes the Q point.
2. Which of the 3 capacitors is the bypass capacitor? What is its role? What is the role of
other two 10 F capacitors?
3. Using your DC measurement in section 3.3, calculate the power dissipation in the BJT.
4. If the small-signal model for BJT has been covered by your professor then using
theoretical analysis, show that the presence of bypass capacitor in Fig 9.3 significantly
enhances the gain in the mid-band region. In answering you may assume that the bypass

61

capacitor creates a virtual ground at the capacitor. You may also ignore the coupling
capacitors and the biasing resistors.
5. Take a look at the data-sheet for P2N2222A and state the maximum collector current
(dc) available with this transistor.

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