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The document discusses dynamic logic circuits and synchronous dynamic circuit techniques. It introduces dynamic logic circuits and describes how they offer advantages over static logic circuits by using transient charge storage rather than steady-state behavior. It then discusses basic principles of pass transistor circuits and the fundamental building block. It also covers synchronous dynamic circuit techniques including dynamic pass transistor circuits and CMOS transmission gate logic, where logic blocks are cascaded via clock-controlled switches.

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99 views

Mtech Handouts

The document discusses dynamic logic circuits and synchronous dynamic circuit techniques. It introduces dynamic logic circuits and describes how they offer advantages over static logic circuits by using transient charge storage rather than steady-state behavior. It then discusses basic principles of pass transistor circuits and the fundamental building block. It also covers synchronous dynamic circuit techniques including dynamic pass transistor circuits and CMOS transmission gate logic, where logic blocks are cascaded via clock-controlled switches.

Uploaded by

Jyothi Poorna
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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UNIT-IV

DYNAMICLOGIC CIRCUIS
Introduction
In high-density, high-performance digital implementations where reduction of circuit delay and silicon
area is a major objective, dynamic logic circuits offer several significant advantages over static logic
circuits. The operation of all dynamic logic gates depends on temporary (transient) storage of charge in
parasitic node capacitances, instead of relying on steady-state circuit behavior.
Basic Principles of Pass Transistor Circuits
The fundamental building block of nMOS dynamic logic circuits,
consisting of an nMOS pass transistor driving the gate of another
nMOS transistor, is shown in Fig

Synchronous Dynamic Circuit Techniques


Dynamic Pass Transistor Circuits

Consider the generalized view of a multi-stage


synchronous circuit shown in Fig. The circuit
consists of cascaded combinational logic stages,
which are interconnected through nMOS pass
transistors. All inputs of each combinational logic
block are driven by a single clock signal.
CMOS Transmission Gate Logic

The basic two-phase synchronous logic circuit


principle, in which individual logic blocks are
cascaded via clock-controlled switches, can
easily be adopted to CMOS structures as well.
Here, static CMOS gates are used for
implementing the logic blocks, and CMOS
transmission gates are used for transferring the
output levels of one stage to the inputs of the
next stage

TEXT BOOKS:
1. Digital Integrated Circuit Design Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design Sung-Mo Kang, Yusuf Leblebici,
TMH, 3rd Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective Ming-BO Lin, CRC
Press, 2011
2. Digital Integrated Circuits A Design Perspective, Jan M. Rabaey, Anantha Chandrakasan,
Borivoje Nikolic, 2nd Ed., PHI.

UNIT-V
SEMICONDUCTOR MEMORIES
Introduction
Semiconductor memory arrays capable of storing large quantities of digital informationare essential to all
digital systems. The amount of memory required in a particular systemdepends on the type of application,
but, in general, the number of transistors utilized forthe information (data) storage function is much larger
than the number of transistors used in logic operations and for other purposes.

Types of semiconductor memories

Static Read-Write Memory (SRAM) Circuits


The memory circuit is said to be static if the stored data can be retained indefinitely (as long as a
sufficient power supply voltage is provided), without any need for a periodic refresh operation.
Dynamic Read-Write Memory (DRAM) Circuits
In a dynamic RAM cell, binary data is stored simply as charge in a capacitor, where the presence or
absence of stored charge determines the value of the stored bit.

TEXT BOOKS:
1. Digital Integrated Circuit Design Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design Sung-Mo Kang, Yusuf Leblebici,
TMH, 3rd Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective Ming-BO Lin, CRC
Press, 2011
2. Digital Integrated Circuits A Design Perspective, Jan M. Rabaey, Anantha Chandrakasan,
Borivoje Nikolic, 2nd Ed., PHI.

UNIT III
Sequential MOS Logic Circuits
Clocked Latch and Flip-Flop Circuits

Clocked SR Latch
All of the SR latch circuits examined in the previous section are
essentially asynchronous sequential circuits, which will respond
to the changes occurring in input signals at a circuit-delaydependent time point during their operation.

CMOS D-Latch and Edge-Triggered Flip-Flop


The gate-level representation of the D-latch is simply
obtained by modifying the clocked NOR-based SR latch
circuit. Here, the circuit has a single input D, which is
directly connected to the S input of the latch.
CMOS
implementation of D-latch is as shown in fig below
The D-latch finds many applications in digital circuit design,
primarily for temporary storage of data or as a delay
element. which shows a basic two-inverter loop and two
CMOS transmission gate (TG) switches.The TG at the input
is activated by the CK signal, whereas the TG in the inverter

TEXT BOOKS:
1. Digital Integrated Circuit Design Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design Sung-Mo Kang, Yusuf Leblebici,
TMH, 3rd Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective Ming-BO Lin, CRC
Press, 2011
2. Digital Integrated Circuits A Design Perspective, Jan M. Rabaey, Anantha Chandrakasan,
Borivoje Nikolic, 2nd Ed., PHI.

UNIT II
Combinational MOS Logic Circuits

Introduction
Combinational logic circuits, or gates, which perform Boolean
operations on multiple input variables and determine the outputs as
Boolean functions of the inputs, are the basic building blocks of all
digital systems.

MOS Logic Circuits with Depletion nMOS Loads


Two-Input NOR Gate

The first circuit to be examined in this


section is the two-input NOR gate. The
circuit diagram, the logic symbol, and the
corresponding truth table of the gate are
given in Fig.

AOI and OIA gates

The AOI gates Enable the sum-of-products realization of a Boolean function in one logic stage The
OAI gates Enable the product-of-sums realization of a Boolean function in one logic stage

TEXT BOOKS:
1. Digital Integrated Circuit Design Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design Sung-Mo Kang, Yusuf Leblebici,
TMH, 3rd Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective Ming-BO Lin, CRC
Press, 2011
2. Digital Integrated Circuits A Design Perspective, Jan M. Rabaey, Anantha Chandrakasan,
Borivoje Nikolic, 2nd Ed., PHI.

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